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author | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2021-03-16 11:19:46 +0100 |
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committer | Robert Schwebel <r.schwebel@pengutronix.de> | 2021-03-16 11:58:33 +0100 |
commit | f0e6f489fe142fca4b1191c1307a42885b9fa96f (patch) | |
tree | 9cd18b8e25af9d2b4251b12981c5203c54c7ce75 /configs/platform-v8a/patches/barebox-2020.08.1/0004-clk-imx8mm-fix-CPU-clock.patch | |
parent | ea9e81f394fbcb2879cb6359be787f7f0be99aca (diff) | |
download | DistroKit-f0e6f489fe142fca4b1191c1307a42885b9fa96f.tar.gz DistroKit-f0e6f489fe142fca4b1191c1307a42885b9fa96f.tar.xz |
v8a/imx8m: barebox: Version bump: 2020.08.1 -> 2021.02.0
This gets rid of all patches, they are included in 2020.09.0.
Diffstat (limited to 'configs/platform-v8a/patches/barebox-2020.08.1/0004-clk-imx8mm-fix-CPU-clock.patch')
-rw-r--r-- | configs/platform-v8a/patches/barebox-2020.08.1/0004-clk-imx8mm-fix-CPU-clock.patch | 53 |
1 files changed, 0 insertions, 53 deletions
diff --git a/configs/platform-v8a/patches/barebox-2020.08.1/0004-clk-imx8mm-fix-CPU-clock.patch b/configs/platform-v8a/patches/barebox-2020.08.1/0004-clk-imx8mm-fix-CPU-clock.patch deleted file mode 100644 index 9d51128..0000000 --- a/configs/platform-v8a/patches/barebox-2020.08.1/0004-clk-imx8mm-fix-CPU-clock.patch +++ /dev/null @@ -1,53 +0,0 @@ -From: Lucas Stach <l.stach@pengutronix.de> -Date: Thu, 20 Aug 2020 21:45:47 +0200 -Subject: [PATCH] clk: imx8mm: fix CPU clock - -This is a port of the Linux kernel commit d3b70cd87e77 (clk: imx: imx8mm: -fix a53 cpu cloc). This allows the reparenting as specified in the new DTs -to succeed. - -Signed-off-by: Lucas Stach <l.stach@pengutronix.de> -Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> ---- - drivers/clk/imx/clk-imx8mm.c | 13 +++++++++---- - 1 file changed, 9 insertions(+), 4 deletions(-) - -diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c -index a31741af884f..17cb0177f758 100644 ---- a/drivers/clk/imx/clk-imx8mm.c -+++ b/drivers/clk/imx/clk-imx8mm.c -@@ -26,6 +26,8 @@ static const char *sys_pll3_bypass_sels[] = {"sys_pll3", "sys_pll3_ref_sel", }; - static const char *imx8mm_a53_sels[] = {"osc_24m", "arm_pll_out", "sys_pll2_500m", "sys_pll2_1000m", - "sys_pll1_800m", "sys_pll1_400m", "audio_pll1_out", "sys_pll3_out", }; - -+static const char *imx8mm_a53_core_sels[] = {"arm_a53_div", "arm_pll_out", }; -+ - static const char *imx8mm_m4_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll2_250m", "sys_pll1_266m", - "sys_pll1_800m", "audio_pll1_out", "video_pll1_out", "sys_pll3_out", }; - -@@ -396,6 +398,9 @@ static int imx8mm_clocks_init(struct device_node *ccm_np) - clks[IMX8MM_CLK_GPU3D_DIV] = imx_clk_divider2("gpu3d_div", "gpu3d_cg", ccm + 0x8180, 0, 3); - clks[IMX8MM_CLK_GPU2D_DIV] = imx_clk_divider2("gpu2d_div", "gpu2d_cg", ccm + 0x8200, 0, 3); - -+ /* CORE SEL */ -+ clks[IMX8MM_CLK_A53_CORE] = imx_clk_mux2_flags("arm_a53_core", ccm + 0x9880, 24, 1, imx8mm_a53_core_sels, ARRAY_SIZE(imx8mm_a53_core_sels), CLK_IS_CRITICAL); -+ - /* BUS */ - clks[IMX8MM_CLK_MAIN_AXI] = imx8m_clk_composite_critical("main_axi", imx8mm_main_axi_sels, ccm + 0x8800); - clks[IMX8MM_CLK_ENET_AXI] = imx8m_clk_composite("enet_axi", imx8mm_enet_axi_sels, ccm + 0x8880); -@@ -556,11 +561,11 @@ static int imx8mm_clocks_init(struct device_node *ccm_np) - clks[IMX8MM_CLK_DRAM_ALT_ROOT] = imx_clk_fixed_factor("dram_alt_root", "dram_alt", 1, 4); - clks[IMX8MM_CLK_DRAM_CORE] = imx_clk_mux2_flags("dram_core_clk", ccm + 0x9800, 24, 1, imx8mm_dram_core_sels, ARRAY_SIZE(imx8mm_dram_core_sels), CLK_IS_CRITICAL); - -- clks[IMX8MM_CLK_ARM] = imx_clk_cpu("arm", "arm_a53_div", -- clks[IMX8MM_CLK_A53_DIV], -- clks[IMX8MM_CLK_A53_SRC], -+ clks[IMX8MM_CLK_ARM] = imx_clk_cpu("arm", "arm_a53_core", -+ clks[IMX8MM_CLK_A53_CORE], -+ clks[IMX8MM_CLK_A53_CORE], - clks[IMX8MM_ARM_PLL_OUT], -- clks[IMX8MM_SYS_PLL1_800M]); -+ clks[IMX8MM_CLK_A53_DIV]); - - imx_check_clocks(clks, ARRAY_SIZE(clks)); - |