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Diffstat (limited to 'configs/platform-v7a/patches/barebox-2016.05.0/0201-rpi2-add-basic-boot-spec-devicetree-support.patch')
-rw-r--r--configs/platform-v7a/patches/barebox-2016.05.0/0201-rpi2-add-basic-boot-spec-devicetree-support.patch462
1 files changed, 462 insertions, 0 deletions
diff --git a/configs/platform-v7a/patches/barebox-2016.05.0/0201-rpi2-add-basic-boot-spec-devicetree-support.patch b/configs/platform-v7a/patches/barebox-2016.05.0/0201-rpi2-add-basic-boot-spec-devicetree-support.patch
new file mode 100644
index 0000000..40d67be
--- /dev/null
+++ b/configs/platform-v7a/patches/barebox-2016.05.0/0201-rpi2-add-basic-boot-spec-devicetree-support.patch
@@ -0,0 +1,462 @@
+From: Alexander Aring <aar@pengutronix.de>
+Date: Thu, 9 Jun 2016 11:26:03 +0200
+Subject: [PATCH] rpi2: add basic boot-spec devicetree support
+
+Signed-off-by: Alexander Aring <aar@pengutronix.de>
+---
+ arch/arm/dts/Makefile | 1 +
+ arch/arm/dts/bcm2835-rpi.dtsi | 60 +++++++++++
+ arch/arm/dts/bcm2836-rpi-2-b.dts | 35 +++++++
+ arch/arm/dts/bcm2836.dtsi | 78 ++++++++++++++
+ arch/arm/dts/bcm283x.dtsi | 212 +++++++++++++++++++++++++++++++++++++++
+ arch/arm/mach-bcm283x/core.c | 4 +-
+ 6 files changed, 389 insertions(+), 1 deletion(-)
+ create mode 100644 arch/arm/dts/bcm2835-rpi.dtsi
+ create mode 100644 arch/arm/dts/bcm2836-rpi-2-b.dts
+ create mode 100644 arch/arm/dts/bcm2836.dtsi
+ create mode 100644 arch/arm/dts/bcm283x.dtsi
+
+diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
+index b83c1109ef39..960d8aac3933 100644
+--- a/arch/arm/dts/Makefile
++++ b/arch/arm/dts/Makefile
+@@ -9,6 +9,7 @@ obj- += dummy.o
+
+ pbl-dtb-$(CONFIG_MACH_AFI_GF) += am335x-afi-gf.dtb.o
+ pbl-dtb-$(CONFIG_MACH_BEAGLEBONE) += am335x-bone.dtb.o am335x-boneblack.dtb.o am335x-bone-common.dtb.o
++pbl-dtb-$(CONFIG_MACH_RPI2) += bcm2836-rpi-2-b.dtb.o
+ pbl-dtb-$(CONFIG_MACH_CM_FX6) += imx6dl-cm-fx6.dtb.o imx6q-cm-fx6.dtb.o imx6q-utilite.dtb.o
+ pbl-dtb-$(CONFIG_MACH_DFI_FS700_M60) += imx6q-dfi-fs700-m60-6q.dtb.o imx6dl-dfi-fs700-m60-6s.dtb.o
+ pbl-dtb-$(CONFIG_MACH_DUCKBILL) += imx28-duckbill.dtb.o
+diff --git a/arch/arm/dts/bcm2835-rpi.dtsi b/arch/arm/dts/bcm2835-rpi.dtsi
+new file mode 100644
+index 000000000000..3afb9fefe2d1
+--- /dev/null
++++ b/arch/arm/dts/bcm2835-rpi.dtsi
+@@ -0,0 +1,60 @@
++/ {
++ memory {
++ reg = <0 0x10000000>;
++ };
++
++ leds {
++ compatible = "gpio-leds";
++
++ act {
++ label = "ACT";
++ default-state = "keep";
++ linux,default-trigger = "heartbeat";
++ };
++ };
++
++ soc {
++ firmware: firmware {
++ compatible = "raspberrypi,bcm2835-firmware";
++ mboxes = <&mailbox>;
++ };
++ };
++};
++
++&gpio {
++ pinctrl-names = "default";
++
++ gpioout: gpioout {
++ brcm,pins = <6>;
++ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
++ };
++
++ alt0: alt0 {
++ brcm,pins = <0 1 2 3 4 5 7 8 9 10 11 14 15 40 45>;
++ brcm,function = <BCM2835_FSEL_ALT0>;
++ };
++
++ alt3: alt3 {
++ brcm,pins = <48 49 50 51 52 53>;
++ brcm,function = <BCM2835_FSEL_ALT3>;
++ };
++};
++
++&i2c0 {
++ status = "okay";
++ clock-frequency = <100000>;
++};
++
++&i2c1 {
++ status = "okay";
++ clock-frequency = <100000>;
++};
++
++&i2c2 {
++ status = "okay";
++};
++
++&sdhci {
++ status = "okay";
++ bus-width = <4>;
++};
+diff --git a/arch/arm/dts/bcm2836-rpi-2-b.dts b/arch/arm/dts/bcm2836-rpi-2-b.dts
+new file mode 100644
+index 000000000000..ff946661bd13
+--- /dev/null
++++ b/arch/arm/dts/bcm2836-rpi-2-b.dts
+@@ -0,0 +1,35 @@
++/dts-v1/;
++#include "bcm2836.dtsi"
++#include "bcm2835-rpi.dtsi"
++
++/ {
++ compatible = "raspberrypi,2-model-b", "brcm,bcm2836";
++ model = "Raspberry Pi 2 Model B";
++
++ memory {
++ reg = <0 0x40000000>;
++ };
++
++ leds {
++ act {
++ gpios = <&gpio 47 0>;
++ };
++
++ pwr {
++ label = "PWR";
++ gpios = <&gpio 35 0>;
++ default-state = "keep";
++ linux,default-trigger = "default-on";
++ };
++ };
++};
++
++&gpio {
++ pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>;
++
++ /* I2S interface */
++ i2s_alt0: i2s_alt0 {
++ brcm,pins = <18 19 20 21>;
++ brcm,function = <BCM2835_FSEL_ALT0>;
++ };
++};
+diff --git a/arch/arm/dts/bcm2836.dtsi b/arch/arm/dts/bcm2836.dtsi
+new file mode 100644
+index 000000000000..9d0651d8f373
+--- /dev/null
++++ b/arch/arm/dts/bcm2836.dtsi
+@@ -0,0 +1,78 @@
++#include "bcm283x.dtsi"
++
++/ {
++ compatible = "brcm,bcm2836";
++
++ soc {
++ ranges = <0x7e000000 0x3f000000 0x1000000>,
++ <0x40000000 0x40000000 0x00001000>;
++ dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
++
++ local_intc: local_intc {
++ compatible = "brcm,bcm2836-l1-intc";
++ reg = <0x40000000 0x100>;
++ interrupt-controller;
++ #interrupt-cells = <1>;
++ interrupt-parent = <&local_intc>;
++ };
++
++ arm-pmu {
++ compatible = "arm,cortex-a7-pmu";
++ interrupt-parent = <&local_intc>;
++ interrupts = <9>;
++ };
++ };
++
++ timer {
++ compatible = "arm,armv7-timer";
++ interrupt-parent = <&local_intc>;
++ interrupts = <0>, // PHYS_SECURE_PPI
++ <1>, // PHYS_NONSECURE_PPI
++ <3>, // VIRT_PPI
++ <2>; // HYP_PPI
++ always-on;
++ };
++
++ cpus: cpus {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ v7_cpu0: cpu@0 {
++ device_type = "cpu";
++ compatible = "arm,cortex-a7";
++ reg = <0xf00>;
++ clock-frequency = <800000000>;
++ };
++
++ v7_cpu1: cpu@1 {
++ device_type = "cpu";
++ compatible = "arm,cortex-a7";
++ reg = <0xf01>;
++ clock-frequency = <800000000>;
++ };
++
++ v7_cpu2: cpu@2 {
++ device_type = "cpu";
++ compatible = "arm,cortex-a7";
++ reg = <0xf02>;
++ clock-frequency = <800000000>;
++ };
++
++ v7_cpu3: cpu@3 {
++ device_type = "cpu";
++ compatible = "arm,cortex-a7";
++ reg = <0xf03>;
++ clock-frequency = <800000000>;
++ };
++ };
++};
++
++/* Make the BCM2835-style global interrupt controller be a child of the
++ * CPU-local interrupt controller.
++ */
++&intc {
++ compatible = "brcm,bcm2836-armctrl-ic";
++ reg = <0x7e00b200 0x200>;
++ interrupt-parent = <&local_intc>;
++ interrupts = <8>;
++};
+diff --git a/arch/arm/dts/bcm283x.dtsi b/arch/arm/dts/bcm283x.dtsi
+new file mode 100644
+index 000000000000..971e741e5467
+--- /dev/null
++++ b/arch/arm/dts/bcm283x.dtsi
+@@ -0,0 +1,212 @@
++#include <dt-bindings/pinctrl/bcm2835.h>
++#include <dt-bindings/clock/bcm2835.h>
++#include "skeleton.dtsi"
++
++/* This include file covers the common peripherals and configuration between
++ * bcm2835 and bcm2836 implementations, leaving the CPU configuration to
++ * bcm2835.dtsi and bcm2836.dtsi.
++ */
++
++/ {
++ compatible = "brcm,bcm2835";
++ model = "BCM2835";
++ interrupt-parent = <&intc>;
++
++ chosen {
++ bootargs = "earlyprintk console=ttyAMA0";
++ };
++
++ soc {
++ compatible = "simple-bus";
++ #address-cells = <1>;
++ #size-cells = <1>;
++
++ timer@7e003000 {
++ compatible = "brcm,bcm2835-system-timer";
++ reg = <0x7e003000 0x1000>;
++ interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
++ /* This could be a reference to BCM2835_CLOCK_TIMER,
++ * but we don't have the driver using the common clock
++ * support yet.
++ */
++ clock-frequency = <1000000>;
++ };
++
++ dma: dma@7e007000 {
++ compatible = "brcm,bcm2835-dma";
++ reg = <0x7e007000 0xf00>;
++ interrupts = <1 16>,
++ <1 17>,
++ <1 18>,
++ <1 19>,
++ <1 20>,
++ <1 21>,
++ <1 22>,
++ <1 23>,
++ <1 24>,
++ <1 25>,
++ <1 26>,
++ <1 27>,
++ <1 28>;
++
++ #dma-cells = <1>;
++ brcm,dma-channel-mask = <0x7f35>;
++ };
++
++ intc: interrupt-controller@7e00b200 {
++ compatible = "brcm,bcm2835-armctrl-ic";
++ reg = <0x7e00b200 0x200>;
++ interrupt-controller;
++ #interrupt-cells = <2>;
++ };
++
++ watchdog@7e100000 {
++ compatible = "brcm,bcm2835-pm-wdt";
++ reg = <0x7e100000 0x28>;
++ };
++
++ clocks: cprman@7e101000 {
++ compatible = "brcm,bcm2835-cprman";
++ #clock-cells = <1>;
++ reg = <0x7e101000 0x2000>;
++
++ /* CPRMAN derives everything from the platform's
++ * oscillator.
++ */
++ clocks = <&clk_osc>;
++ };
++
++ rng@7e104000 {
++ compatible = "brcm,bcm2835-rng";
++ reg = <0x7e104000 0x10>;
++ };
++
++ mailbox: mailbox@7e00b800 {
++ compatible = "brcm,bcm2835-mbox";
++ reg = <0x7e00b880 0x40>;
++ interrupts = <0 1>;
++ #mbox-cells = <0>;
++ };
++
++ gpio: gpio@7e200000 {
++ compatible = "brcm,bcm2835-gpio";
++ reg = <0x7e200000 0xb4>;
++ /*
++ * The GPIO IP block is designed for 3 banks of GPIOs.
++ * Each bank has a GPIO interrupt for itself.
++ * There is an overall "any bank" interrupt.
++ * In order, these are GIC interrupts 17, 18, 19, 20.
++ * Since the BCM2835 only has 2 banks, the 2nd bank
++ * interrupt output appears to be mirrored onto the
++ * 3rd bank's interrupt signal.
++ * So, a bank0 interrupt shows up on 17, 20, and
++ * a bank1 interrupt shows up on 18, 19, 20!
++ */
++ interrupts = <2 17>, <2 18>, <2 19>, <2 20>;
++
++ gpio-controller;
++ #gpio-cells = <2>;
++
++ interrupt-controller;
++ #interrupt-cells = <2>;
++ };
++
++ uart0: uart@7e201000 {
++ compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
++ reg = <0x7e201000 0x1000>;
++ interrupts = <2 25>;
++ clocks = <&clocks BCM2835_CLOCK_UART>,
++ <&clocks BCM2835_CLOCK_VPU>;
++ clock-names = "uartclk", "apb_pclk";
++ arm,primecell-periphid = <0x00241011>;
++ };
++
++ i2s: i2s@7e203000 {
++ compatible = "brcm,bcm2835-i2s";
++ reg = <0x7e203000 0x20>,
++ <0x7e101098 0x02>;
++
++ dmas = <&dma 2>,
++ <&dma 3>;
++ dma-names = "tx", "rx";
++ status = "disabled";
++ };
++
++ spi: spi@7e204000 {
++ compatible = "brcm,bcm2835-spi";
++ reg = <0x7e204000 0x1000>;
++ interrupts = <2 22>;
++ clocks = <&clocks BCM2835_CLOCK_VPU>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "disabled";
++ };
++
++ i2c0: i2c@7e205000 {
++ compatible = "brcm,bcm2835-i2c";
++ reg = <0x7e205000 0x1000>;
++ interrupts = <2 21>;
++ clocks = <&clocks BCM2835_CLOCK_VPU>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "disabled";
++ };
++
++ aux: aux@0x7e215000 {
++ compatible = "brcm,bcm2835-aux";
++ #clock-cells = <1>;
++ reg = <0x7e215000 0x8>;
++ clocks = <&clocks BCM2835_CLOCK_VPU>;
++ };
++
++ sdhci: sdhci@7e300000 {
++ compatible = "brcm,bcm2835-sdhci";
++ reg = <0x7e300000 0x100>;
++ interrupts = <2 30>;
++ clocks = <&clocks BCM2835_CLOCK_EMMC>;
++ status = "disabled";
++ };
++
++ i2c1: i2c@7e804000 {
++ compatible = "brcm,bcm2835-i2c";
++ reg = <0x7e804000 0x1000>;
++ interrupts = <2 21>;
++ clocks = <&clocks BCM2835_CLOCK_VPU>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "disabled";
++ };
++
++ i2c2: i2c@7e805000 {
++ compatible = "brcm,bcm2835-i2c";
++ reg = <0x7e805000 0x1000>;
++ interrupts = <2 21>;
++ clocks = <&clocks BCM2835_CLOCK_VPU>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "disabled";
++ };
++
++ usb@7e980000 {
++ compatible = "brcm,bcm2835-usb";
++ reg = <0x7e980000 0x10000>;
++ interrupts = <1 9>;
++ };
++ };
++
++ clocks {
++ compatible = "simple-bus";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ /* The oscillator is the root of the clock tree. */
++ clk_osc: clock@3 {
++ compatible = "fixed-clock";
++ reg = <3>;
++ #clock-cells = <0>;
++ clock-output-names = "osc";
++ clock-frequency = <19200000>;
++ };
++
++ };
++};
+diff --git a/arch/arm/mach-bcm283x/core.c b/arch/arm/mach-bcm283x/core.c
+index 64f37813883a..f11221dd6685 100644
+--- a/arch/arm/mach-bcm283x/core.c
++++ b/arch/arm/mach-bcm283x/core.c
+@@ -42,15 +42,17 @@ static int bcm2835_clk_init(void)
+
+ clk = clk_fixed("uart0-pl0110", 3 * 1000 * 1000);
+ clk_register_clkdev(clk, NULL, "uart0-pl0110");
++ clk_register_clkdev(clk, NULL, "3f201000.uart");
+
+ clk = clk_fixed("bcm2835-cs", 1 * 1000 * 1000);
+ clk_register_clkdev(clk, NULL, "bcm2835-cs");
++ clk_register_clkdev(clk, NULL, "3f003000.timer");
+
+ add_generic_device("bcm2835-cs", DEVICE_ID_SINGLE, NULL, BCM2835_ST_BASE, 0x1C, IORESOURCE_MEM, NULL);
+
+ return 0;
+ }
+-postcore_initcall(bcm2835_clk_init);
++pure_initcall(bcm2835_clk_init);
+
+ void bcm2835_register_uart(void)
+ {
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