diff options
Diffstat (limited to 'configs/platform-v7a/patches/barebox-2019.11.0/0001-ARM-am335x-Enable-MMC2-clock.patch')
| -rw-r--r-- | configs/platform-v7a/patches/barebox-2019.11.0/0001-ARM-am335x-Enable-MMC2-clock.patch | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/configs/platform-v7a/patches/barebox-2019.11.0/0001-ARM-am335x-Enable-MMC2-clock.patch b/configs/platform-v7a/patches/barebox-2019.11.0/0001-ARM-am335x-Enable-MMC2-clock.patch new file mode 100644 index 0000000..4d89a1b --- /dev/null +++ b/configs/platform-v7a/patches/barebox-2019.11.0/0001-ARM-am335x-Enable-MMC2-clock.patch @@ -0,0 +1,39 @@ +From fb9c0086b2e3ffe2fd18a9b3f5178d14b33b9d15 Mon Sep 17 00:00:00 2001 +From: Sascha Hauer <s.hauer@pengutronix.de> +Date: Mon, 11 Nov 2019 14:20:45 +0100 +Subject: [PATCH] ARM: am335x: Enable MMC2 clock + +Since Kernel commit 5b63fb90adb9 ("ARM: dts: Fix incomplete dts data for +am3 and am4 mmc") (barebox commit 419db1f984 ("dts: update to +v5.3-rc7")) the AM33xx MMC2 controller is unconditionally enabled in the +dts. This has the effect that the driver probes for this device and then +can't access the registers as the clock is disabled. Enable the clock to +let the driver probe successfully. + +Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> +--- + arch/arm/mach-omap/am33xx_clock.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/mach-omap/am33xx_clock.c b/arch/arm/mach-omap/am33xx_clock.c +index e63e93601e..0a49038270 100644 +--- a/arch/arm/mach-omap/am33xx_clock.c ++++ b/arch/arm/mach-omap/am33xx_clock.c +@@ -142,11 +142,13 @@ void am33xx_enable_per_clocks(void) + __raw_writel(PRCM_MOD_EN, CM_PER_CPSW_CLKSTCTRL); + while ((__raw_readl(CM_PER_CPGMAC0_CLKCTRL) & 0x30000) != 0x0); + +- /* MMC 0 & 1 */ ++ /* MMC 0, 1 & 2 */ + __raw_writel(PRCM_MOD_EN, CM_PER_MMC0_CLKCTRL); + while (__raw_readl(CM_PER_MMC0_CLKCTRL) != PRCM_MOD_EN); + __raw_writel(PRCM_MOD_EN, CM_PER_MMC1_CLKCTRL); + while (__raw_readl(CM_PER_MMC1_CLKCTRL) != PRCM_MOD_EN); ++ __raw_writel(PRCM_MOD_EN, CM_PER_MMC2_CLKCTRL); ++ while (__raw_readl(CM_PER_MMC2_CLKCTRL) != PRCM_MOD_EN); + + /* Enable the control module though RBL would have done it*/ + __raw_writel(PRCM_MOD_EN, CM_WKUP_CONTROL_CLKCTRL); +-- +2.24.0 + |