OSELAS.BSP-EnergyMicro-Gecko: geckoboot: improve pinmux documentation

The only intended code change is that PC11 is set to 0 as already
documented before and dropping some clock enables

1 files changed, 79 insertions, 38 deletions

diff --git a/local_src/geckoboot-2013.01.0/geckoboot.S b/local_src/geckoboot-2013.01.0/geckoboot.S
index 80acf43..17e93db 100644
--- a/local_src/geckoboot-2013.01.0/geckoboot.S
+++ b/local_src/geckoboot-2013.01.0/geckoboot.S
@@ -29,7 +29,7 @@ reset:
 	ldrh	r2, [r0, #2]
 	add	r1, r1, #BC_REGISTER
 	strh	r2, [r1]
-	add	r0, r0, 4
+	add	r0, r0, #4
 	cmp	r0, #(bcinit_end)
 	blo	1b
 
@@ -147,44 +147,85 @@ reginit:
 	.int	0x439008b4, 0x00000001		@ CMU_HFPERCLKEN0 |= GPIO via bitband
 	.int	0x43900890, 0x00000001		@ CMU_HFPERCLKEN0 |= UART1 via bitband
 
-	/* XXX: these should be enabled in Linux */
-	.int	0x43900884, 0x00000001		@ CMU_HFPERCLKEN0 |= USART1 via bitband
-	.int	0x439008c0, 0x00000001		@ CMU_HFPERCLKEN0 |= ADC via bitband
-
 	/* pinmuxing */
-	.int	0x40006000, 0x00000000		@ GPIO_PA_CTRL, reset default
-	.int	0x40006014, 0x0000807f		@ GPIO_PA_DOUTCLR; EBI AD8..15 set dataout to 0
-	.int	0x40006004, 0x04444444		@ GPIO_PA_MODEL; EBI AD9..15 set mode=pushpull
-	.int	0x40006008, 0x40000000		@ GPIO_PA_MODEH; EBI AD8 set mode=pushpull
-
-	.int	0x40006024, 0x00000000		@ GPIO_PB_CTRL, reset default
-/* XXX join following two */
-	.int	0x40006038, 0x00008000		@ GPIO_PB_DOUTCLR; EBI mode on PB15 MCU_EBI_CONNECT (0)
-	.int	0x40006038, 0x0000007f		@ GPIO_PB_DOUTCLR; EBI A16-22
-	.int	0x40006028, 0x04444444		@ GPIO_PB_MODEL; EBI A16-22
+	/*  A0: EBI_AD09
+	 *  A1: EBI_AD10
+	 *  A2: EBI_AD11
+	 *  A3: EBI_AD12
+	 *  A4: EBI_AD13
+	 *  A5: EBI_AD14
+	 *  A6: EBI_AD15
+	 * A15: EBI_AD08
+	 */
+	.int	0x40006014, 0x0000807f		@ GPIO_PA_DOUTCLR
+	.int	0x40006004, 0x04444444		@ GPIO_PA_MODEL
+	.int	0x40006008, 0x40000000		@ GPIO_PA_MODEH
+
+	/*  B0: EBI_A16
+	 *  B1: EBI_A17
+	 *  B2: EBI_A18
+	 *  B3: EBI_A19
+	 *  B4: EBI_A20
+	 *  B5: EBI_A21
+	 *  B6: EBI_A22
+	 *  B9: UART1_TX#2
+	 * B10: UART1_RX#2
+	 * B15: MCU_EBI_CONNECT, output, 0
+	 */
+	.int	0x40006038, 0x0000807f		@ GPIO_PB_DOUTCLR
 	.int	0x40006034, 0x00000200		@ GPIO_PB_DOUTSET; set UART_TX to avoid false start
-	.int	0x4000602c, 0x40000140		@ GPIO_PB_MODEH; MCU_EBI_CONNECT -> output, UART_TX, UART_RX
-
-	.int	0x40006048, 0x00000000		@ GPIO_PC_CTRL, reset default
-	.int	0x4000605c, 0x00000001		@ GPIO_PC_DOUTCLR; PC11 (EBI_ALE)
-	.int	0x40006050, 0x00004000		@ GPIO_PC_MODEH; PC11: Push-pull output
-
-	.int	0x4000606c, 0x00000000		@ GPIO_PD_CTRL, reset default
-	.int	0x4000607c, 0x0000fe08		@ GPIO_PD_DOUTSET, I2C, EBI CS0-3, spiconnect set dataout to 1; ETH_SPI_#CS (D3)
-	.int	0x40006080, 0x00000007		@ GPIO_PD_DOUTCLR, ETH_SPI_{TX, RX, CLK}
-	.int	0x40006070, 0x00004414		@ GPIO_PD_MODEL; ETH_SPI_
-	.int	0x40006074, 0x88444440		@ GPIO_PD_MODEH; EBI CS0-3, spiconnect set mode=pushpull
-
-	.int	0x40006090, 0x00000000		@ GPIO_PE_CTRL, reset default
-	.int	0x400060a0, 0x00000011		@ GPIO_PE_DOUTSET; FPGA irq with pullup (E0), SPI_CS (E4)
-	.int	0x400060a4, 0x0000ffe0		@ GPIO_PE_DOUTCLR; EBI AD0..7 set dataout to 0, SPI_{TX, RX, CLK}
-	.int	0x40006094, 0x41440002		@ GPIO_PE_MODEL; FPGA irq input with pullup, SPI for microsd
-	.int	0x40006098, 0x44444444		@ GPIO_PE_MODEH; EBI AD0..7 set mode=pushpull
-
-	.int	0x400060b4, 0x00000000		@ GPIO_PF_CTRL, reset default
-	.int	0x400060c8, 0x000003c0		@ GPIO_PF_DOUTCLR; EBI Wen+Ren set dataout to 0
-	.int	0x400060b8, 0x44000000		@ GPIO_PF_MODEL; EBI Byte Lane 0 support BL0/BL1
-	.int	0x400060bc, 0x00000044		@ GPIO_PF_MODEH; EBI WEN, REN
+	.int	0x40006028, 0x04444444		@ GPIO_PB_MODEL
+	.int	0x4000602c, 0x40000140		@ GPIO_PB_MODEH
+
+	/* C11:	EBI_ALE
+	 */
+	.int	0x4000605c, 0x00000800		@ GPIO_PC_DOUTCLR
+	.int	0x40006050, 0x00004000		@ GPIO_PC_MODEH
+
+	/*  D0: USART1_TX#1 -> Ethernet (KSZ8851SNL)
+	 *  D1: USART1_RX#1
+	 *  D2: USART1_CLK#1
+	 *  D3: USART1_CS#1
+	 *  D9: EBI_CS0
+	 * D10: EBI_CS1
+	 * D11: EBI_CS2
+	 * D12: EBI_CS3
+	 * D13: #MCU_SPI_CONNECT, output, 1
+	 * D14: I2C0_SDA#3
+	 * D15: I2C0_SCL#3
+	 */
+	.int	0x4000607c, 0x0000fe08		@ GPIO_PD_DOUTSET
+	.int	0x40006080, 0x00000007		@ GPIO_PD_DOUTCLR
+	.int	0x40006070, 0x00004414		@ GPIO_PD_MODEL
+	.int	0x40006074, 0x88444440		@ GPIO_PD_MODEH
+
+	/*  E0: irq line from Board controller
+	 *  E4: USART0_CS#1 -> Micro SD
+	 *  E5: USART0_CLK#1
+	 *  E6: USART0_RX#1
+	 *  E7: USART0_TX#1
+	 *  E8: EBI_AD00
+	 *  E9: EBI_AD01
+	 * E10: EBI_AD02
+	 * E11: EBI_AD03
+	 * E12: EBI_AD04
+	 * E13: EBI_AD05
+	 * E14: EBI_AD06
+	 * E15: EBI_AD07
+	 */
+	.int	0x400060a0, 0x00000011		@ GPIO_PE_DOUTSET
+	.int	0x400060a4, 0x0000ffe0		@ GPIO_PE_DOUTCLR
+	.int	0x40006094, 0x41440002		@ GPIO_PE_MODEL
+	.int	0x40006098, 0x44444444		@ GPIO_PE_MODEH
+
+	/*  F6: EBI_BL0
+	 *  F7: EBI_BL1
+	 *  F8: EBI_WEn
+	 *  F9: EBI_REn
+	 */
+	.int	0x400060c8, 0x000003c0		@ GPIO_PF_DOUTCLR
+	.int	0x400060b8, 0x44000000		@ GPIO_PF_MODEL
+	.int	0x400060bc, 0x00000044		@ GPIO_PF_MODEH
 
 	.int	0x40006100, 0x00000004		@ GPIO_EXTIPSELL: select port E for irq 0
 	.int	0x4000610c, 0x00000001		@ GPIO_EXTIFALL: trigger for falling FPGA irq line
@@ -218,7 +259,7 @@ reginit:
 #endif
 	.int	0x40008044, 0x00000008		@ EBI_POLARITY3, ARDY_, ALE, WE_, RE_, CS_, BL_
 
-	.int	0x40008014, 0x105e00bb		@ EBI_ROUTE
+	.int	0x40008014, 0x105e00bb		@ EBI_ROUTE, location=1
 	.int	0x40008000, 0x4f00dd51		@ EBI_CTRL, enable ITS, mode0=mode2=mode3=D16A16ALE, bl0-3, noidle[023], bank[023]en
 
 	.int	UARTBASE + 0x00, 0x00000000		@ UART1_CTRL