OSELAS.BSP-EnergyMicro-Gecko: geckoboot: optionally setup SWO tracing

To setup for SWO press PB1 during reset. Functionallity is untested as
there is a bug in the Linux JLink library which breaks tracing.

Also the output is expanded:

 'G': first sign of life
 'e'/'E': SWO off/on
 'c'/'C': don't/do wait for PB2 being pressed
 'k': about to copy oftree to RAM
 'o', '\n': done with oftree, about to jump into Linux

2 files changed, 69 insertions, 2 deletions

diff --git a/local_src/geckoboot-2013.01.0/Makefile b/local_src/geckoboot-2013.01.0/Makefile
index 880dd03..534c0dd 100644
--- a/local_src/geckoboot-2013.01.0/Makefile
+++ b/local_src/geckoboot-2013.01.0/Makefile
@@ -1,6 +1,6 @@
 all: geckoboot.bin
 
-CFLAGS += -Wa,-mimplicit-it=always
+ASFLAGS += -Wa,-mimplicit-it=always
 
 %.bin: %.o
 	$(OBJCOPY) -O binary $< $@
diff --git a/local_src/geckoboot-2013.01.0/geckoboot.S b/local_src/geckoboot-2013.01.0/geckoboot.S
index ebf9a60..7ae6ae0 100644
--- a/local_src/geckoboot-2013.01.0/geckoboot.S
+++ b/local_src/geckoboot-2013.01.0/geckoboot.S
@@ -43,15 +43,58 @@ reset:
 	mov	r1, #'G'
 	str	r1, [r0]
 
+	/* if PB1 is pressed setup for SWO */
+	ldr	r0, =(BC_REGISTER)
+	ldr	r1, [r0, #8]		@ BC_REGISTER->UIF_PB
+	tst	r1, #1
+	ldrne	r0, =(UARTBASE + 0x34)
+	movne	r1, #'e'
+	strne	r1, [r0]
+	bne	wait_boot_linux
+
+	ldr	r0, =(UARTBASE + 0x34)
+	mov	r1, #'E'
+	str	r1, [r0]
+
+	/* poll for CMU_STATUS_AUXHFRCORDY */
+	ldr	r0, =(0x400c8000)
+1:
+	ldr	r1, [r0, 0x2c]		@ CMU_STATUS
+	tst	r1, #0x20
+	beq	1b
+
+	adr	r0, swoinit
+1:
+	ldmia	r0!, {r1, r2, r3} /* load addr, mask, value */
+	teq	r2, #0xffffffff
+	ldrne	r4, [r1]
+	bicne	r4, r2
+	orrne	r3, r4
+	str	r3, [r1]
+	cmp	r0, #(swoinit_end)
+	blo	1b
+
+wait_boot_linux:
 #ifdef CONFIG_WAIT_FOR_PB2
+	ldr	r0, =(UARTBASE + 0x34)
+	mov	r1, #'C'
+	str	r1, [r0]
 	/* only boot into Linux when PB2 is pressed */
 	ldr	r0, =(BC_REGISTER)
 1:	ldr	r1, [r0, #8]		@ BC_REGISTER->UIF_PB
 	tst	r1, #2
 	bne	1b
+#else
+	ldr	r0, =(UARTBASE + 0x34)
+	mov	r1, #'c'
+	str	r1, [r0]
 #endif
 
 boot_linux:
+	ldr	r0, =(UARTBASE + 0x34)
+	mov	r1, #'k'
+	str	r1, [r0]
+
 	/* Copy oftree to RAM */
 	ldr	r0, =(DTB_DST)
 	ldr	r1, =(DTB_SRC)
@@ -60,6 +103,14 @@ boot_linux:
 
 	bl	memcpy
 
+	ldr	r0, =(UARTBASE + 0x34)
+	mov	r1, #'o'
+	str	r1, [r0]
+	mov	r1, #'\r'
+	str	r1, [r0]
+	mov	r1, #'\n'
+	str	r1, [r0]
+
 	/* boot Linux */
 	mov	r0, #0
 	ldr	r1, =#0xf11
@@ -85,7 +136,7 @@ memcpy:
 	.align 3
 	.type reginit, %object
 reginit:
-	.int	0x400c8020, 0x00000004		@ CMU_OSCENCMD = HFXOEN
+	.int	0x400c8020, 0x00000014		@ CMU_OSCENCMD = HFXOEN | AUXHFRCOEN
 
 	.int	0x400c8008, 0x00000100		@ CMU_HFPERCLKDIV, reset default
 	.int	0x43900814, 0x00000001		@ CMU_HFCORECLKEN0 |= EBI via bitband
@@ -185,3 +236,19 @@ bcinit:
 
 bcinit_end:
 	.size	bcinit, . - bcinit
+
+	.align 3
+	.type	swoinit, %object
+swoinit:
+	.int	0x40006120, 0x00000304, 0x00000004	@ GPIO_ROUTE: SWOPEN + LOCATION = 0
+	.int	0x400060b8, 0x00000f00, 0x00000400	@ configure F2 as pushpull output
+	.int	0xe000edf0, 0x00000001, 0x00000001	@ CoreDebug->DHCSR |= 1
+	.int	0xe000edfc, 0x01000000, 0x01000000	@ CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk
+	.int	0xe0001000, 0xffffffff, 0x400113ff	@ Enable PC and IRQ sampling output
+	.int 	0xe0040010, 0xffffffff, 0x0000000f	@ Set TPIU prescaler to 16.
+	.int	0xe00400f0, 0xffffffff, 0x00000002	@ Set protocol to NRZ
+	.int	0xe0000fb0, 0xffffffff, 0xc5acce55	@ Unlock ITM
+	.int	0xe0000e80, 0xffffffff, 0x00010009	@ output data
+	.int	(UARTBASE + 0x34), 0xffffffff, 0x00000043 @ some output to uart
+swoinit_end:
+	.size	swoinit, . - swoinit