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authorMichael Olbrich <m.olbrich@pengutronix.de>2013-01-18 18:58:21 +0100
committerMichael Olbrich <m.olbrich@pengutronix.de>2013-01-18 18:58:30 +0100
commit36d3fde609792bdb1a3ff2338497583cada94073 (patch)
treee991c1e58b3578094971bb33540457c89487b8b2
parentbaba23e4d67b2980ac40974dfe77514691e1e85b (diff)
downloadOSELAS.Toolchain-36d3fde609792bdb1a3ff2338497583cada94073.tar.gz
gcc: add patch for: Bug 55981 - std::atomic store is split in two smaller stores
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55981 Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
-rw-r--r--patches/gcc-4.7.2/0050-Backport-PR-target-55981-from-mainline.patch154
-rw-r--r--patches/gcc-4.7.2/series4
-rw-r--r--patches/gcc-linaro-4.7-2012.11/series2
3 files changed, 159 insertions, 1 deletions
diff --git a/patches/gcc-4.7.2/0050-Backport-PR-target-55981-from-mainline.patch b/patches/gcc-4.7.2/0050-Backport-PR-target-55981-from-mainline.patch
new file mode 100644
index 0000000..24fcc4a
--- /dev/null
+++ b/patches/gcc-4.7.2/0050-Backport-PR-target-55981-from-mainline.patch
@@ -0,0 +1,154 @@
+From: Uros Bizjak <ubizjak@gmail.com>
+Date: Thu, 17 Jan 2013 22:51:00 +0000
+Subject: [PATCH] Backport PR target/55981 from mainline
+
+ Backport from mainline
+ 2012-01-17 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/55981
+ * config/i386/sync.md (atomic_store<mode>): Generate SWImode
+ store through atomic_store<mode>_1.
+ (atomic_store<mode>_1): Macroize insn using SWI mode iterator.
+
+testsuite/ChangeLog:
+
+ Backport from mainline
+ 2012-01-17 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/55981
+ * gcc.target/pr55981.c: New test.
+
+Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
+---
+ gcc/ChangeLog | 10 +++++++
+ gcc/config/i386/sync.md | 13 +++++++--
+ gcc/testsuite/ChangeLog | 8 ++++++
+ gcc/testsuite/gcc.target/pr55981.c | 54 ++++++++++++++++++++++++++++++++++++
+ 4 files changed, 83 insertions(+), 2 deletions(-)
+ create mode 100644 gcc/testsuite/gcc.target/pr55981.c
+
+diff --git a/gcc/ChangeLog b/gcc/ChangeLog
+index b84d286..47d35a0 100644
+--- a/gcc/ChangeLog
++++ b/gcc/ChangeLog
+@@ -1,3 +1,13 @@
++2012-01-17 Uros Bizjak <ubizjak@gmail.com>
++
++ Backport from mainline
++ 2012-01-17 Uros Bizjak <ubizjak@gmail.com>
++
++ PR target/55981
++ * config/i386/sync.md (atomic_store<mode>): Generate SWImode
++ store through atomic_store<mode>_1.
++ (atomic_store<mode>_1): Macroize insn using SWI mode iterator.
++
+ 2012-09-20 Release Manager
+
+ * GCC 4.7.2 released.
+diff --git a/gcc/config/i386/sync.md b/gcc/config/i386/sync.md
+index ddff1e6..79d3305 100644
+--- a/gcc/config/i386/sync.md
++++ b/gcc/config/i386/sync.md
+@@ -227,8 +227,9 @@
+ DONE;
+ }
+
+- /* Otherwise use a normal store. */
+- emit_move_insn (operands[0], operands[1]);
++ /* Otherwise use a store. */
++ emit_insn (gen_atomic_store<mode>_1 (operands[0], operands[1],
++ operands[2]));
+ }
+ /* ... followed by an MFENCE, if required. */
+ if (model == MEMMODEL_SEQ_CST)
+@@ -236,6 +237,14 @@
+ DONE;
+ })
+
++(define_insn "atomic_store<mode>_1"
++ [(set (match_operand:SWI 0 "memory_operand" "=m")
++ (unspec:SWI [(match_operand:SWI 1 "<nonmemory_operand>" "<r><i>")
++ (match_operand:SI 2 "const_int_operand")]
++ UNSPEC_MOVA))]
++ ""
++ "mov{<imodesuffix>}\t{%1, %0|%0, %1}")
++
+ (define_insn_and_split "atomic_storedi_fpu"
+ [(set (match_operand:DI 0 "memory_operand" "=m,m,m")
+ (unspec:DI [(match_operand:DI 1 "register_operand" "x,m,?r")]
+diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
+index 2d88614..d30a45f 100644
+--- a/gcc/testsuite/ChangeLog
++++ b/gcc/testsuite/ChangeLog
+@@ -1,3 +1,11 @@
++2012-01-17 Uros Bizjak <ubizjak@gmail.com>
++
++ Backport from mainline
++ 2012-01-17 Uros Bizjak <ubizjak@gmail.com>
++
++ PR target/55981
++ * gcc.target/pr55981.c: New test.
++
+ 2012-09-20 Release Manager
+
+ * GCC 4.7.2 released.
+diff --git a/gcc/testsuite/gcc.target/pr55981.c b/gcc/testsuite/gcc.target/pr55981.c
+new file mode 100644
+index 0000000..36498d6
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/pr55981.c
+@@ -0,0 +1,54 @@
++/* { dg-do compile { target { ! { ia32 } } } } */
++/* { dg-options "-O2" } */
++
++volatile int a, b, c, d, e, f, g, h, i, j, k, l, m, n, o, p;
++
++volatile long long y;
++
++void
++test ()
++{
++ int a_ = a;
++ int b_ = b;
++ int c_ = c;
++ int d_ = d;
++ int e_ = e;
++ int f_ = f;
++ int g_ = g;
++ int h_ = h;
++ int i_ = i;
++ int j_ = j;
++ int k_ = k;
++ int l_ = l;
++ int m_ = m;
++ int n_ = n;
++ int o_ = o;
++ int p_ = p;
++
++ int z;
++
++ for (z = 0; z < 1000; z++)
++ {
++ __atomic_store_n (&y, 0x100000002ll, __ATOMIC_SEQ_CST);
++ __atomic_store_n (&y, 0x300000004ll, __ATOMIC_SEQ_CST);
++ }
++
++ a = a_;
++ b = b_;
++ c = c_;
++ d = d_;
++ e = e_;
++ f = f_;
++ g = g_;
++ h = h_;
++ i = i_;
++ j = j_;
++ k = k_;
++ l = l_;
++ m = m_;
++ n = n_;
++ o = o_;
++ p = p_;
++}
++
++/* { dg-final { scan-assembler-times "movabs" 2 } } */
diff --git a/patches/gcc-4.7.2/series b/patches/gcc-4.7.2/series
index 54b2312..2bdc836 100644
--- a/patches/gcc-4.7.2/series
+++ b/patches/gcc-4.7.2/series
@@ -1,5 +1,7 @@
# generated by git-ptx-patches
#tag:base
+#tag:Upstream --start-number 050
+0050-Backport-PR-target-55981-from-mainline.patch
#tag:OSELAS.toolchain --start-number 100
0100-no-host-includes.patch
0101-gcc-i386-use-pure64-CLFS-patch.patch
@@ -18,4 +20,4 @@
0500-Fix-Argument-list-too-long-error.patch
#tag:Linaro --start-number 600
0600-Backport-the-change-to-the-hard-float-loader-path.-C.patch
-# 4987a1a030fd14433ae05b3624255ffa - git-ptx-patches magic
+# 27fdf2575d0f5aeef476629f8f727783 - git-ptx-patches magic
diff --git a/patches/gcc-linaro-4.7-2012.11/series b/patches/gcc-linaro-4.7-2012.11/series
index 2324f2b..25d1b1e 100644
--- a/patches/gcc-linaro-4.7-2012.11/series
+++ b/patches/gcc-linaro-4.7-2012.11/series
@@ -1,5 +1,7 @@
# generated by git-ptx-patches
#tag:base
+#tag:Upstream --start-number 050
+../gcc-4.7.2/0050-Backport-PR-target-55981-from-mainline.patch
#tag:OSELAS.toolchain --start-number 100
../gcc-4.7.2/0100-no-host-includes.patch
../gcc-4.7.2/0101-gcc-i386-use-pure64-CLFS-patch.patch