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authorMichael Olbrich <m.olbrich@pengutronix.de>2011-11-03 12:53:01 +0100
committerMichael Olbrich <m.olbrich@pengutronix.de>2011-11-23 16:50:26 +0100
commit9b2cac56cd09f7ba63460408d2b46d27895a0529 (patch)
tree35e53615b1e312bb239a1200f1af21937be11382
parent81291f683e7d4dfaacbd41af665dac732b3860a8 (diff)
downloadOSELAS.Toolchain-9b2cac56cd09f7ba63460408d2b46d27895a0529.tar.gz
OSELAS.Toolchain-9b2cac56cd09f7ba63460408d2b46d27895a0529.tar.xz
add patches for glibc-2.14.1
* copied from glibc-2.13. * Obsolete patches removed. * Patch headers cleaned up. * new patch 0020-revert-sunrpc-removal.patch from openSUSE to avoid breaking busybox and other packages using rpc/rpc.h Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
Diffstat
-rw-r--r--patches/glibc-2.14.1/0001-add-install-lib-all-target.patch35
-rw-r--r--patches/glibc-2.14.1/0002-fix-build-error-with-static-nss.patch56
-rw-r--r--patches/glibc-2.14.1/0003-configure.in-detect-readelf-with-AC_CHECK_TARGET_TOO.patch43
-rw-r--r--patches/glibc-2.14.1/0004-stdlib-longlong.patch41
-rw-r--r--patches/glibc-2.14.1/0005-respect-env-CPPFLAGS.patch40
-rw-r--r--patches/glibc-2.14.1/0006-i586-chk.patch39
-rw-r--r--patches/glibc-2.14.1/0007-i386-x86_64-revert-clone-cfi.patch58
-rw-r--r--patches/glibc-2.14.1/0008-queue-header-updates.patch92
-rw-r--r--patches/glibc-2.14.1/0009-don-t-regen-docs-if-perl-is-not-found.patch35
-rw-r--r--patches/glibc-2.14.1/0010-localedef-fix-trampoline.patch67
-rw-r--r--patches/glibc-2.14.1/0011-posix-awk.patch24
-rw-r--r--patches/glibc-2.14.1/0012-resolv-dynamic.patch47
-rw-r--r--patches/glibc-2.14.1/0013-section-comments.patch34
-rw-r--r--patches/glibc-2.14.1/0014-no-inline-gmon.patch38
-rw-r--r--patches/glibc-2.14.1/0015-strict-aliasing.patch94
-rw-r--r--patches/glibc-2.14.1/0016-undefine-__i686.patch52
-rw-r--r--patches/glibc-2.14.1/0017-fpscr-values.patch42
-rw-r--r--patches/glibc-2.14.1/0018-optimized-string-functions-for-NEON-from-Linaro.patch1292
-rw-r--r--patches/glibc-2.14.1/0019-add-libc_hidden_builtin_def-for-all-cortex-functions.patch76
-rw-r--r--patches/glibc-2.14.1/0020-revert-sunrpc-removal.patch80
-rw-r--r--patches/glibc-2.14.1/series23
21 files changed, 2308 insertions, 0 deletions
diff --git a/patches/glibc-2.14.1/0001-add-install-lib-all-target.patch b/patches/glibc-2.14.1/0001-add-install-lib-all-target.patch
new file mode 100644
index 0000000..fe2f4a1
--- /dev/null
+++ b/patches/glibc-2.14.1/0001-add-install-lib-all-target.patch
@@ -0,0 +1,35 @@
+From: Michael Olbrich <m.olbrich@pengutronix.de>
+Date: Tue, 1 Nov 2011 19:22:27 +0100
+Subject: [PATCH] add install-lib-all target
+
+From http://svn.exactcode.de/t2/trunk/package/base/glibc32/make-install-lib-all.patch
+
+Rule to install all needed libraries, not just the ones installed by install-lib,
+yet not install programs.
+Needed because we can't use the main install target, as we can't build programs before
+we have the final gcc installed; linking fails because libeh.a is not present,
+and glibc insists on linking programs with that library.
+
+Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
+---
+ Makerules | 7 +++++++
+ 1 files changed, 7 insertions(+), 0 deletions(-)
+
+diff --git a/Makerules b/Makerules
+index 82ffa1e..3381d28 100644
+--- a/Makerules
++++ b/Makerules
+@@ -866,6 +866,13 @@ endef
+ installed-libcs := $(foreach o,$(filter-out .os,$(object-suffixes-for-libc)),\
+ $(inst_libdir)/$(patsubst %,$(libtype$o),\
+ $(libprefix)$(libc-name)))
++
++install-lib-all: $(inst_slibdir)/libc.so$(libc.so-version) \
++ $(inst_slibdir)/libc-$(version).so \
++ $(inst_libdir)/libc.so \
++ $(inst_libdir)/libc.a \
++ install-lib
++
+ install: $(installed-libcs)
+ $(installed-libcs): $(inst_libdir)/lib$(libprefix)%: lib $(+force)
+ $(make-target-directory)
diff --git a/patches/glibc-2.14.1/0002-fix-build-error-with-static-nss.patch b/patches/glibc-2.14.1/0002-fix-build-error-with-static-nss.patch
new file mode 100644
index 0000000..d72b973
--- /dev/null
+++ b/patches/glibc-2.14.1/0002-fix-build-error-with-static-nss.patch
@@ -0,0 +1,56 @@
+From: Dan Kegel <dank@kegel.com>
+Date: Wed, 15 Jun 2005 09:12:43 -0700
+Subject: [PATCH] fix build error with static-nss
+
+This patch fixes
+
+build-glibc/libc.a(nsswitch.o)(.data+0x64): undefined reference to `_nss_files_getaliasent_r'
+build-glibc/libc.a(nsswitch.o)(.data+0x6c): undefined reference to `_nss_files_endaliasent'
+... 53 lines deleted ...
+build-glibc/libc.a(nsswitch.o)(.data+0x21c): undefined reference to `_nss_files_getspnam_r'
+collect2: ld returned 1 exit status
+make[2]: *** [/build/gcc-3.4.3-glibc-2.3.5-hdrs-2.6.11.2/i686-unknown-linux-gnu/build-glibc/elf/ldconfig] Error 1
+
+when building glibc with --enable-static-nss.
+
+See http://sources.redhat.com/bugzilla/show_bug.cgi?id=631
+
+Signed-off-by: Robert Schwebel <r.schwebel@pengutronix.de>
+[mol: adapted for glibc-2.14.1]
+Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
+---
+ Makeconfig | 2 +-
+ elf/Makefile | 7 +++++++
+ 2 files changed, 8 insertions(+), 1 deletions(-)
+
+diff --git a/Makeconfig b/Makeconfig
+index b34cacf..1915afa 100644
+--- a/Makeconfig
++++ b/Makeconfig
+@@ -537,7 +537,7 @@ endif
+
+ # The static libraries.
+ ifeq (yes,$(build-static))
+-link-libc-static = -Wl,--start-group $(common-objpfx)libc.a $(static-gnulib) -Wl,--end-group
++link-libc-static = -Wl,--start-group $(common-objpfx)libc.a $(static-gnulib) $(otherlibs) -Wl,--end-group
+ else
+ ifeq (yes,$(build-shared))
+ # We can try to link the programs with lib*_pic.a...
+diff --git a/elf/Makefile b/elf/Makefile
+index 1c5bdee..e19e639 100644
+--- a/elf/Makefile
++++ b/elf/Makefile
+@@ -152,6 +152,13 @@ install-others = $(inst_slibdir)/$(rtld-installed-name)
+ install-bin-script = ldd
+ endif
+
++ifeq (yes,$(build-static-nss))
++nssobjdir := $(patsubst ../$(subdir),.,$(common-objpfx)nss)
++resolvobjdir := $(patsubst ../$(subdir),.,$(common-objpfx)resolv)
++otherlibs += $(nssobjdir)/libnss_files.a $(resolvobjdir)/libnss_dns.a \
++ $(resolvobjdir)/libresolv.a
++endif
++
+ others = sprof sln
+ install-bin = sprof
+ others-static = sln
diff --git a/patches/glibc-2.14.1/0003-configure.in-detect-readelf-with-AC_CHECK_TARGET_TOO.patch b/patches/glibc-2.14.1/0003-configure.in-detect-readelf-with-AC_CHECK_TARGET_TOO.patch
new file mode 100644
index 0000000..d2aa4f9
--- /dev/null
+++ b/patches/glibc-2.14.1/0003-configure.in-detect-readelf-with-AC_CHECK_TARGET_TOO.patch
@@ -0,0 +1,43 @@
+From: Michael Olbrich <m.olbrich@pengutronix.de>
+Date: Tue, 1 Nov 2011 23:45:06 +0100
+Subject: [PATCH] configure.in: detect readelf with AC_CHECK_TARGET_TOOL
+
+This patch was introduced with patches for Mac. Probably because
+a nonstandard readelf is needed there.
+
+Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
+---
+ configure.in | 6 ++++--
+ 1 files changed, 4 insertions(+), 2 deletions(-)
+
+diff --git a/configure.in b/configure.in
+index fbc64b9..f13cba3 100644
+--- a/configure.in
++++ b/configure.in
+@@ -1457,6 +1457,8 @@ EOF
+ fi
+ fi
+
++ AC_CHECK_TARGET_TOOL([READELF],[readelf],[readelf],[$PATH])
++
+ AC_CACHE_CHECK(for .preinit_array/.init_array/.fini_array support,
+ libc_cv_initfini_array, [dnl
+ cat > conftest.c <<EOF
+@@ -1468,7 +1470,7 @@ EOF
+ if AC_TRY_COMMAND([${CC-cc} $CFLAGS $CPPFLAGS $LDFLAGS -o conftest conftest.c
+ -static -nostartfiles -nostdlib 1>&AS_MESSAGE_LOG_FD])
+ then
+- if readelf -S conftest | fgrep INIT_ARRAY > /dev/null; then
++ if $READELF -S conftest | fgrep INIT_ARRAY > /dev/null; then
+ libc_cv_initfini_array=yes
+ else
+ libc_cv_initfini_array=no
+@@ -1655,7 +1657,7 @@ dnl cross-platform since the gcc used can be a cross compiler. Without
+ dnl introducing new options this is not easily doable. Instead use a tool
+ dnl which always is cross-platform: readelf. To detect whether -z combreloc
+ dnl look for a section named .rel.dyn.
+- if readelf -S conftest.so | grep '\.rel\(a\|\)\.dyn' > /dev/null; then
++ if $READELF -S conftest.so | grep '\.rel\(a\|\)\.dyn' > /dev/null; then
+ libc_cv_z_combreloc=yes
+ else
+ libc_cv_z_combreloc=no
diff --git a/patches/glibc-2.14.1/0004-stdlib-longlong.patch b/patches/glibc-2.14.1/0004-stdlib-longlong.patch
new file mode 100644
index 0000000..a59cb95
--- /dev/null
+++ b/patches/glibc-2.14.1/0004-stdlib-longlong.patch
@@ -0,0 +1,41 @@
+From: unknown author <unknown.author@example.com>
+Date: Tue, 1 Nov 2011 18:58:26 +0100
+Subject: [PATCH] stdlib longlong
+
+---
+ stdlib/longlong.h | 14 ++++++++++++++
+ 1 files changed, 14 insertions(+), 0 deletions(-)
+
+diff --git a/stdlib/longlong.h b/stdlib/longlong.h
+index 1bab76d..68596aa 100644
+--- a/stdlib/longlong.h
++++ b/stdlib/longlong.h
+@@ -220,6 +220,14 @@ UDItype __umulsidi3 (USItype, USItype);
+ "rI" ((USItype) (bh)), \
+ "r" ((USItype) (al)), \
+ "rI" ((USItype) (bl)) __CLOBBER_CC)
++/* v3m and all higher arches have long multiply support. */
++#if !defined(__ARM_ARCH_2__) && !defined(__ARM_ARCH_3__)
++#define umul_ppmm(xh, xl, a, b) \
++ __asm__ ("umull %0,%1,%2,%3" : "=&r" (xl), "=&r" (xh) : "r" (a), "r" (b))
++#define UMUL_TIME 5
++#define smul_ppmm(xh, xl, a, b) \
++ __asm__ ("smull %0,%1,%2,%3" : "=&r" (xl), "=&r" (xh) : "r" (a), "r" (b))
++#else
+ #define umul_ppmm(xh, xl, a, b) \
+ {register USItype __t0, __t1, __t2; \
+ __asm__ ("%@ Inlined umul_ppmm\n" \
+@@ -241,7 +249,13 @@ UDItype __umulsidi3 (USItype, USItype);
+ : "r" ((USItype) (a)), \
+ "r" ((USItype) (b)) __CLOBBER_CC );}
+ #define UMUL_TIME 20
++#endif
+ #define UDIV_TIME 100
++#if defined(__ARM_ARCH_5__) || defined(__ARM_ARCH_5T__) || defined(__ARM_ARCH_5TE__)
++#define count_leading_zeros(COUNT,X) ((COUNT) = __builtin_clz (X))
++#define COUNT_LEADING_ZEROS_0 32
++#endif
++
+ #endif /* __arm__ */
+
+ #if defined(__arm__)
diff --git a/patches/glibc-2.14.1/0005-respect-env-CPPFLAGS.patch b/patches/glibc-2.14.1/0005-respect-env-CPPFLAGS.patch
new file mode 100644
index 0000000..5aa9c88
--- /dev/null
+++ b/patches/glibc-2.14.1/0005-respect-env-CPPFLAGS.patch
@@ -0,0 +1,40 @@
+From: Robert Schwebel <r.schwebel@pengutronix.de>
+Date: Tue, 1 Nov 2011 23:51:05 +0100
+Subject: [PATCH] respect env CPPFLAGS
+
+Respect environment CPPFLAGS when we run ./configure so we can inject
+random -D things without having to set CFLAGS/ASFLAGS
+
+This patch was taken from gentoo.
+
+Signed-off-by: Robert Schwebel <r.schwebel@pengutronix.de>
+Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
+---
+ Makeconfig | 1 +
+ config.make.in | 1 +
+ 2 files changed, 2 insertions(+), 0 deletions(-)
+
+diff --git a/Makeconfig b/Makeconfig
+index 1915afa..c5ead1d 100644
+--- a/Makeconfig
++++ b/Makeconfig
+@@ -699,6 +699,7 @@ CPPFLAGS = $($(subdir)-CPPFLAGS) $(+includes) $(defines) \
+ $(foreach lib,$(libof-$(basename $(@F))) \
+ $(libof-$(<F)) $(libof-$(@F)),$(CPPFLAGS-$(lib))) \
+ $(CPPFLAGS-$(<F)) $(CPPFLAGS-$(@F)) $(CPPFLAGS-$(basename $(@F)))
++CPPFLAGS += $(CPPFLAGS-config)
+ override CFLAGS = -std=gnu99 $(gnu89-inline-CFLAGS) \
+ $(filter-out %frame-pointer,$(+cflags)) $(+gccwarn-c) \
+ $(sysdep-CFLAGS) $(CFLAGS-$(suffix $@)) $(CFLAGS-$(<F)) \
+diff --git a/config.make.in b/config.make.in
+index d722a8b..e8f26ff 100644
+--- a/config.make.in
++++ b/config.make.in
+@@ -108,6 +108,7 @@ CC = @CC@
+ CXX = @CXX@
+ BUILD_CC = @BUILD_CC@
+ CFLAGS = @CFLAGS@
++CPPFLAGS-config = @CPPFLAGS@
+ ASFLAGS-config = @ASFLAGS_config@
+ AR = @AR@
+ MAKEINFO = @MAKEINFO@
diff --git a/patches/glibc-2.14.1/0006-i586-chk.patch b/patches/glibc-2.14.1/0006-i586-chk.patch
new file mode 100644
index 0000000..3d3bbe4
--- /dev/null
+++ b/patches/glibc-2.14.1/0006-i586-chk.patch
@@ -0,0 +1,39 @@
+From: "H.J. Lu" <hongjiu.lu@intel.com>
+Date: Tue, 1 Nov 2011 18:58:26 +0100
+Subject: [PATCH] i586 chk
+
+2007-09-13 H.J. Lu <hongjiu.lu@intel.com>
+
+ * sysdeps/i386/i586/memcpy_chk.S: New file.
+ * sysdeps/i386/i586/mempcpy_chk.S: Likewise.
+ * sysdeps/i386/i586/memset_chk.S: Likewise.
+---
+ i386/i586/memcpy_chk.S | 1 +
+ i386/i586/mempcpy_chk.S | 1 +
+ i386/i586/memset_chk.S | 1 +
+ 3 files changed, 3 insertions(+), 0 deletions(-)
+ create mode 100644 i386/i586/memcpy_chk.S
+ create mode 100644 i386/i586/mempcpy_chk.S
+ create mode 100644 i386/i586/memset_chk.S
+
+diff --git a/i386/i586/memcpy_chk.S b/i386/i586/memcpy_chk.S
+new file mode 100644
+index 0000000..ab8a95c
+--- /dev/null
++++ b/i386/i586/memcpy_chk.S
+@@ -0,0 +1 @@
++#include <sysdeps/i386/i686/memcpy_chk.S>
+diff --git a/i386/i586/mempcpy_chk.S b/i386/i586/mempcpy_chk.S
+new file mode 100644
+index 0000000..9a1de1d
+--- /dev/null
++++ b/i386/i586/mempcpy_chk.S
+@@ -0,0 +1 @@
++#include <sysdeps/i386/i686/mempcpy_chk.S>
+diff --git a/i386/i586/memset_chk.S b/i386/i586/memset_chk.S
+new file mode 100644
+index 0000000..09f9d42
+--- /dev/null
++++ b/i386/i586/memset_chk.S
+@@ -0,0 +1 @@
++#include <sysdeps/i386/i686/memset_chk.S>
diff --git a/patches/glibc-2.14.1/0007-i386-x86_64-revert-clone-cfi.patch b/patches/glibc-2.14.1/0007-i386-x86_64-revert-clone-cfi.patch
new file mode 100644
index 0000000..ea84891
--- /dev/null
+++ b/patches/glibc-2.14.1/0007-i386-x86_64-revert-clone-cfi.patch
@@ -0,0 +1,58 @@
+From: unknown author <unknown.author@example.com>
+Date: Tue, 1 Nov 2011 18:58:26 +0100
+Subject: [PATCH] i386/x86_64 revert clone cfi
+
+revert cfi additions to clone on i386/x86_64 to workaround problems in
+gcc's unwinder code. this is not a bug in glibc, it triggers problems
+elsewhere. this cfi code does not gain us a whole lot anyways.
+
+http://gcc.gnu.org/ml/gcc/2006-12/msg00293.html
+---
+ sysdeps/unix/sysv/linux/i386/clone.S | 4 ----
+ sysdeps/unix/sysv/linux/x86_64/clone.S | 4 ----
+ 2 files changed, 0 insertions(+), 8 deletions(-)
+
+diff --git a/sysdeps/unix/sysv/linux/i386/clone.S b/sysdeps/unix/sysv/linux/i386/clone.S
+index f73a4b5..54524ec 100644
+--- a/sysdeps/unix/sysv/linux/i386/clone.S
++++ b/sysdeps/unix/sysv/linux/i386/clone.S
+@@ -120,9 +120,6 @@ L(pseudo_end):
+ ret
+
+ L(thread_start):
+- cfi_startproc;
+- /* Clearing frame pointer is insufficient, use CFI. */
+- cfi_undefined (eip);
+ /* Note: %esi is zero. */
+ movl %esi,%ebp /* terminate the stack frame */
+ #ifdef RESET_PID
+@@ -155,7 +152,6 @@ L(nomoregetpid):
+ jmp L(haspid)
+ .previous
+ #endif
+- cfi_endproc;
+
+ cfi_startproc
+ PSEUDO_END (BP_SYM (__clone))
+diff --git a/sysdeps/unix/sysv/linux/x86_64/clone.S b/sysdeps/unix/sysv/linux/x86_64/clone.S
+index db42f20..8a12b09 100644
+--- a/sysdeps/unix/sysv/linux/x86_64/clone.S
++++ b/sysdeps/unix/sysv/linux/x86_64/clone.S
+@@ -89,9 +89,6 @@ L(pseudo_end):
+ ret
+
+ L(thread_start):
+- cfi_startproc;
+- /* Clearing frame pointer is insufficient, use CFI. */
+- cfi_undefined (rip);
+ /* Clear the frame pointer. The ABI suggests this be done, to mark
+ the outermost frame obviously. */
+ xorl %ebp, %ebp
+@@ -116,7 +113,6 @@ L(thread_start):
+ /* Call exit with return value from function call. */
+ movq %rax, %rdi
+ call HIDDEN_JUMPTARGET (_exit)
+- cfi_endproc;
+
+ cfi_startproc;
+ PSEUDO_END (BP_SYM (__clone))
diff --git a/patches/glibc-2.14.1/0008-queue-header-updates.patch b/patches/glibc-2.14.1/0008-queue-header-updates.patch
new file mode 100644
index 0000000..c2d79ca
--- /dev/null
+++ b/patches/glibc-2.14.1/0008-queue-header-updates.patch
@@ -0,0 +1,92 @@
+From: unknown author <unknown.author@example.com>
+Date: Tue, 1 Nov 2011 18:58:26 +0100
+Subject: [PATCH] queue header updates
+
+grab some updates from FreeBSD
+
+http://bugs.gentoo.org/201979
+---
+ misc/sys/queue.h | 37 +++++++++++++++++++++++++++++++++++++
+ 1 files changed, 37 insertions(+), 0 deletions(-)
+
+diff --git a/misc/sys/queue.h b/misc/sys/queue.h
+index daf4553..f2678ba 100644
+--- a/misc/sys/queue.h
++++ b/misc/sys/queue.h
+@@ -136,6 +136,11 @@ struct { \
+ (var); \
+ (var) = ((var)->field.le_next))
+
++#define LIST_FOREACH_SAFE(var, head, field, tvar) \
++ for ((var) = LIST_FIRST((head)); \
++ (var) && ((tvar) = LIST_NEXT((var), field), 1); \
++ (var) = (tvar))
++
+ /*
+ * List access methods.
+ */
+@@ -197,6 +202,16 @@ struct { \
+ #define SLIST_FOREACH(var, head, field) \
+ for((var) = (head)->slh_first; (var); (var) = (var)->field.sle_next)
+
++#define SLIST_FOREACH_SAFE(var, head, field, tvar) \
++ for ((var) = SLIST_FIRST((head)); \
++ (var) && ((tvar) = SLIST_NEXT((var), field), 1); \
++ (var) = (tvar))
++
++#define SLIST_FOREACH_PREVPTR(var, varp, head, field) \
++ for ((varp) = &SLIST_FIRST((head)); \
++ ((var) = *(varp)) != NULL; \
++ (varp) = &SLIST_NEXT((var), field))
++
+ /*
+ * Singly-linked List access methods.
+ */
+@@ -242,6 +257,12 @@ struct { \
+ (head)->stqh_last = &(elm)->field.stqe_next; \
+ } while (/*CONSTCOND*/0)
+
++#define STAILQ_LAST(head, type, field) \
++ (STAILQ_EMPTY((head)) ? \
++ NULL : \
++ ((struct type *)(void *) \
++ ((char *)((head)->stqh_last) - __offsetof(struct type, field))))
++
+ #define STAILQ_INSERT_AFTER(head, listelm, elm, field) do { \
+ if (((elm)->field.stqe_next = (listelm)->field.stqe_next) == NULL)\
+ (head)->stqh_last = &(elm)->field.stqe_next; \
+@@ -286,6 +307,11 @@ struct { \
+ #define STAILQ_FIRST(head) ((head)->stqh_first)
+ #define STAILQ_NEXT(elm, field) ((elm)->field.stqe_next)
+
++#define STAILQ_FOREACH_SAFE(var, head, field, tvar) \
++ for ((var) = STAILQ_FIRST((head)); \
++ (var) && ((tvar) = STAILQ_NEXT((var), field), 1); \
++ (var) = (tvar))
++
+
+ /*
+ * Simple queue definitions.
+@@ -437,11 +463,22 @@ struct { \
+ (var); \
+ (var) = ((var)->field.tqe_next))
+
++#define TAILQ_FOREACH_SAFE(var, head, field, tvar) \
++ for ((var) = TAILQ_FIRST((head)); \
++ (var) && ((tvar) = TAILQ_NEXT((var), field), 1); \
++ (var) = (tvar))
++
+ #define TAILQ_FOREACH_REVERSE(var, head, headname, field) \
+ for ((var) = (*(((struct headname *)((head)->tqh_last))->tqh_last)); \
+ (var); \
+ (var) = (*(((struct headname *)((var)->field.tqe_prev))->tqh_last)))
+
++#define TAILQ_FOREACH_REVERSE_SAFE(var, head, headname, field, tvar) \
++ for ((var) = TAILQ_LAST((head), headname); \
++ (var) && ((tvar) = TAILQ_PREV((var), headname, field), 1); \
++ (var) = (tvar))
++
++
+ #define TAILQ_CONCAT(head1, head2, field) do { \
+ if (!TAILQ_EMPTY(head2)) { \
+ *(head1)->tqh_last = (head2)->tqh_first; \
diff --git a/patches/glibc-2.14.1/0009-don-t-regen-docs-if-perl-is-not-found.patch b/patches/glibc-2.14.1/0009-don-t-regen-docs-if-perl-is-not-found.patch
new file mode 100644
index 0000000..9f96b21
--- /dev/null
+++ b/patches/glibc-2.14.1/0009-don-t-regen-docs-if-perl-is-not-found.patch
@@ -0,0 +1,35 @@
+From: Michael Olbrich <m.olbrich@pengutronix.de>
+Date: Wed, 2 Nov 2011 00:14:37 +0100
+Subject: [PATCH] don't regen docs if perl is not found
+
+If we're using a cvs snapshot which updates the source files, and
+perl isn't installed yet, then we can't regen the docs. Not a big
+deal, so just whine a little and continue on our merry way.
+
+This patch was taken from gentoo.
+http://bugs.gentoo.org/60132
+
+Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
+---
+ manual/Makefile | 5 +++++
+ 1 files changed, 5 insertions(+), 0 deletions(-)
+
+diff --git a/manual/Makefile b/manual/Makefile
+index 46dd430..db96bdf 100644
+--- a/manual/Makefile
++++ b/manual/Makefile
+@@ -106,9 +106,14 @@ dir-add.texi: xtract-typefun.awk $(texis)
+ libm-err.texi: stamp-libm-err
+ stamp-libm-err: libm-err-tab.pl $(wildcard $(foreach dir,$(sysdirs),\
+ $(dir)/libm-test-ulps))
++ifneq ($(PERL),no)
+ pwd=`pwd`; \
+ $(PERL) $< $$pwd/.. > libm-err-tmp
+ $(move-if-change) libm-err-tmp libm-err.texi
++else
++ echo "Unable to rebuild math docs, no perl installed"
++ touch libm-err.texi
++endif
+ touch $@
+
+ # Generate Texinfo files from the C source for the example programs.
diff --git a/patches/glibc-2.14.1/0010-localedef-fix-trampoline.patch b/patches/glibc-2.14.1/0010-localedef-fix-trampoline.patch
new file mode 100644
index 0000000..60f6add
--- /dev/null
+++ b/patches/glibc-2.14.1/0010-localedef-fix-trampoline.patch
@@ -0,0 +1,67 @@
+From: unknown author <unknown.author@example.com>
+Date: Tue, 1 Nov 2011 18:58:26 +0100
+Subject: [PATCH] localedef fix trampoline
+
+if [ $# -ne 2 ]; then
+ echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
+ exit 1
+fi
+case "$1" in
+ -patch) patch -d "$2" -f --no-backup-if-mismatch -p1 < $0;;
+ -unpatch) patch -d "$2" -f --no-backup-if-mismatch -R -p1 < $0;;
+ *)
+ echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
+ exit 1
+esac
+exit 0
+---
+ locale/programs/3level.h | 36 ++++++++++++++++++++++++++++++++++++
+ 1 files changed, 36 insertions(+), 0 deletions(-)
+
+diff --git a/locale/programs/3level.h b/locale/programs/3level.h
+index cce925e..6bf8b84 100644
+--- a/locale/programs/3level.h
++++ b/locale/programs/3level.h
+@@ -203,6 +203,42 @@ CONCAT(TABLE,_iterate) (struct TABLE *t,
+ }
+ }
+ }
++
++/* GCC ATM seems to do a poor job with pointers to nested functions passed
++ to inlined functions. Help it a little bit with this hack. */
++#define wchead_table_iterate(tp, fn) \
++do \
++ { \
++ struct wchead_table *t = (tp); \
++ uint32_t index1; \
++ for (index1 = 0; index1 < t->level1_size; index1++) \
++ { \
++ uint32_t lookup1 = t->level1[index1]; \
++ if (lookup1 != ((uint32_t) ~0)) \
++ { \
++ uint32_t lookup1_shifted = lookup1 << t->q; \
++ uint32_t index2; \
++ for (index2 = 0; index2 < (1 << t->q); index2++) \
++ { \
++ uint32_t lookup2 = t->level2[index2 + lookup1_shifted]; \
++ if (lookup2 != ((uint32_t) ~0)) \
++ { \
++ uint32_t lookup2_shifted = lookup2 << t->p; \
++ uint32_t index3; \
++ for (index3 = 0; index3 < (1 << t->p); index3++) \
++ { \
++ struct element_t *lookup3 \
++ = t->level3[index3 + lookup2_shifted]; \
++ if (lookup3 != NULL) \
++ fn ((((index1 << t->q) + index2) << t->p) + index3, \
++ lookup3); \
++ } \
++ } \
++ } \
++ } \
++ } \
++ } while (0)
++
+ #endif
+
+ #ifndef NO_FINALIZE
diff --git a/patches/glibc-2.14.1/0011-posix-awk.patch b/patches/glibc-2.14.1/0011-posix-awk.patch
new file mode 100644
index 0000000..b5e3738
--- /dev/null
+++ b/patches/glibc-2.14.1/0011-posix-awk.patch
@@ -0,0 +1,24 @@
+From: Mike Frysinger <vapier@gentoo.org>
+Date: Tue, 1 Nov 2011 18:58:26 +0100
+Subject: [PATCH] posix awk
+
+2007-12-24 Mike Frysinger <vapier@gentoo.org>
+
+ * elf/Makefile ($(objpfx)ld.so): Use POSIX (EF)? in awk.
+---
+ elf/Makefile | 2 +-
+ 1 files changed, 1 insertions(+), 1 deletions(-)
+
+diff --git a/elf/Makefile b/elf/Makefile
+index e19e639..79949c9 100644
+--- a/elf/Makefile
++++ b/elf/Makefile
+@@ -428,7 +428,7 @@ $(objpfx)ld.so: $(objpfx)librtld.os $(ld-map)
+ -Wl,-soname=$(rtld-installed-name) -T $@.lds
+ rm -f $@.lds
+ readelf -s $@ \
+- | $(AWK) '($$7 ~ /^UND(|EF)$$/ && $$1 != "0:" && $$4 != "REGISTER") { print; p=1 } END { exit p != 0 }'
++ | $(AWK) '($$7 ~ /^UND(EF)?$$/ && $$1 != "0:" && $$4 != "REGISTER") { print; p=1 } END { exit p != 0 }'
+
+ # interp.c exists just to get this string into the libraries.
+ CFLAGS-interp.c = -D'RUNTIME_LINKER="$(slibdir)/$(rtld-installed-name)"' \
diff --git a/patches/glibc-2.14.1/0012-resolv-dynamic.patch b/patches/glibc-2.14.1/0012-resolv-dynamic.patch
new file mode 100644
index 0000000..bc4921b
--- /dev/null
+++ b/patches/glibc-2.14.1/0012-resolv-dynamic.patch
@@ -0,0 +1,47 @@
+From: unknown author <unknown.author@example.com>
+Date: Tue, 1 Nov 2011 18:58:26 +0100
+Subject: [PATCH] resolv dynamic
+
+ripped from SuSE
+
+if /etc/resolv.conf is updated, then make sure applications
+already running get the updated information.
+
+http://bugs.gentoo.org/177416
+---
+ resolv/res_libc.c | 15 +++++++++++++++
+ 1 files changed, 15 insertions(+), 0 deletions(-)
+
+diff --git a/resolv/res_libc.c b/resolv/res_libc.c
+index 810fbc8..aa465cd 100644
+--- a/resolv/res_libc.c
++++ b/resolv/res_libc.c
+@@ -22,6 +22,7 @@
+ #include <arpa/nameser.h>
+ #include <resolv.h>
+ #include <bits/libc-lock.h>
++#include <sys/stat.h>
+
+
+ /* The following bit is copied from res_data.c (where it is #ifdef'ed
+@@ -95,6 +96,20 @@ int
+ __res_maybe_init (res_state resp, int preinit)
+ {
+ if (resp->options & RES_INIT) {
++ static time_t last_mtime, last_check;
++ time_t now;
++ struct stat statbuf;
++
++ time (&now);
++ if (now != last_check) {
++ last_check = now;
++ if (stat (_PATH_RESCONF, &statbuf) == 0 && last_mtime != statbuf.st_mtime) {
++ last_mtime = statbuf.st_mtime;
++ atomicinclock (lock);
++ atomicinc (__res_initstamp);
++ atomicincunlock (lock);
++ }
++ }
+ if (__res_initstamp != resp->_u._ext.initstamp) {
+ if (resp->nscount > 0)
+ __res_iclose (resp, true);
diff --git a/patches/glibc-2.14.1/0013-section-comments.patch b/patches/glibc-2.14.1/0013-section-comments.patch
new file mode 100644
index 0000000..2cd00ff
--- /dev/null
+++ b/patches/glibc-2.14.1/0013-section-comments.patch
@@ -0,0 +1,34 @@
+From: unknown author <unknown.author@example.com>
+Date: Tue, 1 Nov 2011 18:58:26 +0100
+Subject: [PATCH] section comments
+
+http://sources.redhat.com/ml/binutils/2004-04/msg00665.html
+
+fixes building on some architectures (like m68k/arm/cris/etc...) because
+it does the right thing
+
+This patch was taken from gentoo.
+---
+ include/libc-symbols.h | 6 +++---
+ 1 files changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/include/libc-symbols.h b/include/libc-symbols.h
+index 67e1ca2..8cefa67 100644
+--- a/include/libc-symbols.h
++++ b/include/libc-symbols.h
+@@ -240,12 +240,12 @@
+ # define __make_section_unallocated(section_string)
+ # endif
+
+-/* Tacking on "\n\t#" to the section name makes gcc put it's bogus
++/* Tacking on "\n#APP\n\t#" to the section name makes gcc put it's bogus
+ section attributes on what looks like a comment to the assembler. */
+ # ifdef HAVE_SECTION_QUOTES
+-# define __sec_comment "\"\n\t#\""
++# define __sec_comment "\"\n#APP\n\t#\""
+ # else
+-# define __sec_comment "\n\t#"
++# define __sec_comment "\n#APP\n\t#"
+ # endif
+ # define link_warning(symbol, msg) \
+ __make_section_unallocated (".gnu.warning." #symbol) \
diff --git a/patches/glibc-2.14.1/0014-no-inline-gmon.patch b/patches/glibc-2.14.1/0014-no-inline-gmon.patch
new file mode 100644
index 0000000..f2bf698
--- /dev/null
+++ b/patches/glibc-2.14.1/0014-no-inline-gmon.patch
@@ -0,0 +1,38 @@
+From: Kazu Hirata <kazu@codesourcery.com>
+Date: Tue, 1 Nov 2011 18:58:26 +0100
+Subject: [PATCH] no inline gmon
+
+Attached is a patch to add __attribute__ ((noinline)) to
+call_gmon_start.
+
+Without this patch, the sec script that processed initfini.s removes a
+part of inlined call_gmon_start, causing undefined label errors.
+
+This patch solves the problem by forcing gcc not to inline
+call_gmon_start with __attribute__ ((noinline)).
+
+Tested by building for arm-none-lixux-gnueabi. OK to apply?
+
+Kazu Hirata
+
+2006-05-07 Kazu Hirata <kazu@codesourcery.com>
+
+ * sysdeps/generic/initfini.c (call_gmon_start): Add
+ __attribute__ ((noinline)).
+---
+ sysdeps/generic/initfini.c | 2 +-
+ 1 files changed, 1 insertions(+), 1 deletions(-)
+
+diff --git a/sysdeps/generic/initfini.c b/sysdeps/generic/initfini.c
+index d5ef778..69208c2 100644
+--- a/sysdeps/generic/initfini.c
++++ b/sysdeps/generic/initfini.c
+@@ -70,7 +70,7 @@ asm ("\n/*@TESTS_END*/");
+ /* The beginning of _init: */
+ asm ("\n/*@_init_PROLOG_BEGINS*/");
+
+-static void
++static void __attribute__ ((noinline))
+ call_gmon_start(void)
+ {
+ extern void __gmon_start__ (void) __attribute__ ((weak)); /*weak_extern (__gmon_start__);*/
diff --git a/patches/glibc-2.14.1/0015-strict-aliasing.patch b/patches/glibc-2.14.1/0015-strict-aliasing.patch
new file mode 100644
index 0000000..c6dd767
--- /dev/null
+++ b/patches/glibc-2.14.1/0015-strict-aliasing.patch
@@ -0,0 +1,94 @@
+From: unknown author <unknown.author@example.com>
+Date: Tue, 1 Nov 2011 18:58:26 +0100
+Subject: [PATCH] strict aliasing
+
+workaround strict aliasing warnings on individual files rather than
+forcing the whole build with -fno-strict-aliasing
+
+http://bugs.gentoo.org/155906
+
+note that we leave the logout.c and logwtmp.c warnings alone as the
+code path that invokes the warning should not be executed when the
+warning is applicable.
+---
+ libio/Makefile | 4 ++--
+ nis/Makefile | 3 +++
+ nptl/Makefile | 1 +
+ nss/Makefile | 2 ++
+ sunrpc/Makefile | 2 +-
+ 5 files changed, 9 insertions(+), 3 deletions(-)
+
+diff --git a/libio/Makefile b/libio/Makefile
+index ec30904..15a797b 100644
+--- a/libio/Makefile
++++ b/libio/Makefile
+@@ -91,7 +91,7 @@ CFLAGS-fseeko.c = $(exceptions)
+ CFLAGS-ftello64.c = $(exceptions)
+ CFLAGS-ftello.c = $(exceptions)
+ CFLAGS-fwide.c = $(exceptions)
+-CFLAGS-genops.c = $(exceptions)
++CFLAGS-genops.c = $(exceptions) -fno-strict-aliasing
+ CFLAGS-getc.c = $(exceptions)
+ CFLAGS-getchar.c = $(exceptions)
+ CFLAGS-getwc.c = $(exceptions)
+@@ -133,7 +133,7 @@ CFLAGS-putwc.c = $(exceptions)
+ CFLAGS-putwchar.c = $(exceptions)
+ CFLAGS-rewind.c = $(exceptions)
+ CFLAGS-wfileops.c = $(exceptions)
+-CFLAGS-wgenops.c = $(exceptions)
++CFLAGS-wgenops.c = $(exceptions) -fno-strict-aliasing
+ CFLAGS-oldiofopen.c = $(exceptions)
+ CFLAGS-iofopen.c = $(exceptions)
+ CFLAGS-iofopen64.c = $(exceptions)
+diff --git a/nis/Makefile b/nis/Makefile
+index e7e5f0c..3a01142 100644
+--- a/nis/Makefile
++++ b/nis/Makefile
+@@ -67,6 +67,9 @@ libnss_nisplus-routines := $(addprefix nisplus-,$(databases)) nisplus-parser \
+ nss-nisplus nisplus-initgroups
+ libnss_nisplus-inhibit-o = $(filter-out .os,$(object-suffixes))
+
++CFLAGS-nis_xdr.c += -fno-strict-aliasing
++CFLAGS-yp_xdr.c += -fno-strict-aliasing
++
+ include ../Rules
+
+
+diff --git a/nptl/Makefile b/nptl/Makefile
+index 266f178..4ae2518 100644
+--- a/nptl/Makefile
++++ b/nptl/Makefile
+@@ -195,6 +195,7 @@ CFLAGS-tcdrain.c = -fexceptions -fasynchronous-unwind-tables
+
+ CFLAGS-pt-system.c = -fexceptions
+
++CFLAGS-unwind-dw2.c += -fno-strict-aliasing
+
+ tests = tst-typesizes \
+ tst-attr1 tst-attr2 tst-attr3 \
+diff --git a/nss/Makefile b/nss/Makefile
+index c49f375..7f0b6b4 100644
+--- a/nss/Makefile
++++ b/nss/Makefile
+@@ -73,6 +73,8 @@ ifneq ($(build-static-nss),yes)
+ libnss_files-inhibit-o = $(filter-out .os,$(object-suffixes))
+ endif
+
++CFLAGS-nsswitch.c += -fno-strict-aliasing
++
+ include ../Rules
+
+
+diff --git a/sunrpc/Makefile b/sunrpc/Makefile
+index 7245deb..85dcdb1 100644
+--- a/sunrpc/Makefile
++++ b/sunrpc/Makefile
+@@ -150,7 +150,7 @@ CFLAGS-pmap_rmt.c = -fexceptions
+ CFLAGS-clnt_perr.c = -fexceptions
+ CFLAGS-openchild.c = -fexceptions
+
+-CPPFLAGS += -D_RPC_THREAD_SAFE_
++CPPFLAGS += -D_RPC_THREAD_SAFE_ -fno-strict-aliasing
+
+ $(objpfx)tst-getmyaddr: $(common-objpfx)linkobj/libc.so
+ $(objpfx)tst-xdrmem: $(common-objpfx)linkobj/libc.so
diff --git a/patches/glibc-2.14.1/0016-undefine-__i686.patch b/patches/glibc-2.14.1/0016-undefine-__i686.patch
new file mode 100644
index 0000000..130a60e
--- /dev/null
+++ b/patches/glibc-2.14.1/0016-undefine-__i686.patch
@@ -0,0 +1,52 @@
+From: Mike Frysinger <vapier@gentoo.org>
+Date: Tue, 1 Nov 2011 18:58:26 +0100
+Subject: [PATCH] undefine __i686
+
+If gcc is configured to generate i686 code or better by default (like
+when using the --with-arch=pentium3 configure option), then the __i686
+macro will always be defined automatically and thus screw up the
+compilation of some .S files.
+http://bugs.gentoo.org/131108
+http://sourceware.org/ml/libc-alpha/2006-04/msg00090.html
+
+2006-04-25 Mike Frysinger <vapier@gentoo.org>
+
+ * sysdeps/i386/sysdep.h (__i686): Undefine.
+---
+ nptl/sysdeps/pthread/pt-initfini.c | 3 +++
+ sysdeps/i386/sysdep.h | 8 ++++++++
+ 2 files changed, 11 insertions(+), 0 deletions(-)
+
+diff --git a/nptl/sysdeps/pthread/pt-initfini.c b/nptl/sysdeps/pthread/pt-initfini.c
+index 9c00dc0..4e46b3f 100644
+--- a/nptl/sysdeps/pthread/pt-initfini.c
++++ b/nptl/sysdeps/pthread/pt-initfini.c
+@@ -45,6 +45,9 @@
+ /* Embed an #include to pull in the alignment and .end directives. */
+ asm ("\n#include \"defs.h\"");
+
++/* Embed an #include to pull in asm settings. */
++asm ("\n#ifdef __i686__\n#include <sysdep.h>\n#endif");
++
+ /* The initial common code ends here. */
+ asm ("\n/*@HEADER_ENDS*/");
+
+diff --git a/sysdeps/i386/sysdep.h b/sysdeps/i386/sysdep.h
+index efdc82d..3327c10 100644
+--- a/sysdeps/i386/sysdep.h
++++ b/sysdeps/i386/sysdep.h
+@@ -18,6 +18,14 @@
+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307 USA. */
+
++/*
++ * When building for i686 targets or better, gcc automatically defines
++ * '__i686' to '1' for us which causes trouble when using section names
++ * like '__i686.get_pc_thunk.reg'. Since we check for __i686__ in the
++ * code, killing '__i686' shouldn't be a problem.
++ */
++#undef __i686
++
+ #include <sysdeps/generic/sysdep.h>
+
+ #ifdef __ASSEMBLER__
diff --git a/patches/glibc-2.14.1/0017-fpscr-values.patch b/patches/glibc-2.14.1/0017-fpscr-values.patch
new file mode 100644
index 0000000..9987d94
--- /dev/null
+++ b/patches/glibc-2.14.1/0017-fpscr-values.patch
@@ -0,0 +1,42 @@
+From: unknown author <unknown.author@example.com>
+Date: Tue, 1 Nov 2011 18:58:26 +0100
+Subject: [PATCH] fpscr values
+
+http://rpm.sh-linux.org/rpm-2004/target/SRPMS/glibc-2.3.3-27.12.src.rpm
+
+http://bugs.gentoo.org/100696
+---
+ sysdeps/unix/sysv/linux/sh/Versions | 1 +
+ sysdeps/unix/sysv/linux/sh/sysdep.S | 10 ++++++++++
+ 2 files changed, 11 insertions(+), 0 deletions(-)
+
+diff --git a/sysdeps/unix/sysv/linux/sh/Versions b/sysdeps/unix/sysv/linux/sh/Versions
+index bd30f92..9fb8345 100644
+--- a/sysdeps/unix/sysv/linux/sh/Versions
++++ b/sysdeps/unix/sysv/linux/sh/Versions
+@@ -2,6 +2,7 @@ libc {
+ GLIBC_2.2 {
+ # functions used in other libraries
+ __xstat64; __fxstat64; __lxstat64;
++ __fpscr_values;
+
+ # a*
+ alphasort64;
+diff --git a/sysdeps/unix/sysv/linux/sh/sysdep.S b/sysdeps/unix/sysv/linux/sh/sysdep.S
+index 176d99a..d61967a 100644
+--- a/sysdeps/unix/sysv/linux/sh/sysdep.S
++++ b/sysdeps/unix/sysv/linux/sh/sysdep.S
+@@ -32,3 +32,13 @@ ENTRY (__syscall_error)
+
+ #define __syscall_error __syscall_error_1
+ #include <sysdeps/unix/sh/sysdep.S>
++
++ .data
++ .align 3
++ .globl ___fpscr_values
++ .type ___fpscr_values, @object
++ .size ___fpscr_values, 8
++___fpscr_values:
++ .long 0
++ .long 0x80000
++weak_alias (___fpscr_values, __fpscr_values)
diff --git a/patches/glibc-2.14.1/0018-optimized-string-functions-for-NEON-from-Linaro.patch b/patches/glibc-2.14.1/0018-optimized-string-functions-for-NEON-from-Linaro.patch
new file mode 100644
index 0000000..80a9629
--- /dev/null
+++ b/patches/glibc-2.14.1/0018-optimized-string-functions-for-NEON-from-Linaro.patch
@@ -0,0 +1,1292 @@
+From: Michael Olbrich <m.olbrich@pengutronix.de>
+Date: Thu, 15 Sep 2011 16:50:56 +0200
+Subject: [PATCH] optimized string functions for NEON from Linaro
+
+Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
+---
+ .../sysdeps/arm/eabi/arm/cortex-a8/memchr.S | 150 +++++++
+ .../sysdeps/arm/eabi/arm/cortex-a8/memcpy.S | 152 +++++++
+ .../sysdeps/arm/eabi/arm/cortex-a8/memset.S | 118 +++++
+ .../sysdeps/arm/eabi/arm/cortex-a8/strchr.S | 76 ++++
+ .../sysdeps/arm/eabi/arm/cortex-a8/strcmp.c | 449 ++++++++++++++++++++
+ .../sysdeps/arm/eabi/arm/cortex-a8/strcpy.c | 172 ++++++++
+ .../sysdeps/arm/eabi/arm/cortex-a8/strlen.S | 111 +++++
+ 7 files changed, 1228 insertions(+), 0 deletions(-)
+ create mode 100644 cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/memchr.S
+ create mode 100644 cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/memcpy.S
+ create mode 100644 cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/memset.S
+ create mode 100644 cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/strchr.S
+ create mode 100644 cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/strcmp.c
+ create mode 100644 cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/strcpy.c
+ create mode 100644 cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/strlen.S
+
+diff --git a/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/memchr.S b/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/memchr.S
+new file mode 100644
+index 0000000..8f5aaa9
+--- /dev/null
++++ b/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/memchr.S
+@@ -0,0 +1,150 @@
++/* Copyright (c) 2010-2011, Linaro Limited
++ All rights reserved.
++
++ Redistribution and use in source and binary forms, with or without
++ modification, are permitted provided that the following conditions
++ are met:
++
++ * Redistributions of source code must retain the above copyright
++ notice, this list of conditions and the following disclaimer.
++
++ * Redistributions in binary form must reproduce the above copyright
++ notice, this list of conditions and the following disclaimer in the
++ documentation and/or other materials provided with the distribution.
++
++ * Neither the name of Linaro Limited nor the names of its
++ contributors may be used to endorse or promote products derived
++ from this software without specific prior written permission.
++
++ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
++ "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
++ LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
++ A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
++ HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
++ SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
++ LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
++ DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
++ THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
++ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
++ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++
++ Written by Dave Gilbert <david.gilbert@linaro.org>
++
++ This memchr routine is optimised on a Cortex-A9 and should work on
++ all ARMv7 processors. It has a fast past for short sizes, and has
++ an optimised path for large data sets; the worst case is finding the
++ match early in a large data set. */
++
++@ 2011-02-07 david.gilbert@linaro.org
++@ Extracted from local git a5b438d861
++@ 2011-07-14 david.gilbert@linaro.org
++@ Import endianness fix from local git ea786f1b
++
++ .syntax unified
++ .arch armv7-a
++
++@ this lets us check a flag in a 00/ff byte easily in either endianness
++#ifdef __ARMEB__
++#define CHARTSTMASK(c) 1<<(31-(c*8))
++#else
++#define CHARTSTMASK(c) 1<<(c*8)
++#endif
++ .text
++ .thumb
++
++@ ---------------------------------------------------------------------------
++ .thumb_func
++ .align 2
++ .p2align 4,,15
++ .global memchr
++ .type memchr,%function
++memchr:
++ @ r0 = start of memory to scan
++ @ r1 = character to look for
++ @ r2 = length
++ @ returns r0 = pointer to character or NULL if not found
++ and r1,r1,#0xff @ Don't think we can trust the caller to actually pass a char
++
++ cmp r2,#16 @ If it's short don't bother with anything clever
++ blt 20f
++
++ tst r0, #7 @ If it's already aligned skip the next bit
++ beq 10f
++
++ @ Work up to an aligned point
++5:
++ ldrb r3, [r0],#1
++ subs r2, r2, #1
++ cmp r3, r1
++ beq 50f @ If it matches exit found
++ tst r0, #7
++ cbz r2, 40f @ If we run off the end, exit not found
++ bne 5b @ If not aligned yet then do next byte
++
++10:
++ @ At this point, we are aligned, we know we have at least 8 bytes to work with
++ push {r4,r5,r6,r7}
++ orr r1, r1, r1, lsl #8 @ expand the match word across to all bytes
++ orr r1, r1, r1, lsl #16
++ bic r4, r2, #7 @ Number of double words to work with
++ mvns r7, #0 @ all F's
++ movs r3, #0
++
++15:
++ ldmia r0!,{r5,r6}
++ subs r4, r4, #8
++ eor r5,r5, r1 @ Get it so that r5,r6 have 00's where the bytes match the target
++ eor r6,r6, r1
++ uadd8 r5, r5, r7 @ Parallel add 0xff - sets the GE bits for anything that wasn't 0
++ sel r5, r3, r7 @ bytes are 00 for none-00 bytes, or ff for 00 bytes - NOTE INVERSION
++ uadd8 r6, r6, r7 @ Parallel add 0xff - sets the GE bits for anything that wasn't 0
++ sel r6, r5, r7 @ chained....bytes are 00 for none-00 bytes, or ff for 00 bytes - NOTE INVERSION
++ cbnz r6, 60f
++ bne 15b @ (Flags from the subs above) If not run out of bytes then go around again
++
++ pop {r4,r5,r6,r7}
++ and r1,r1,#0xff @ Get r1 back to a single character from the expansion above
++ and r2,r2,#7 @ Leave the count remaining as the number after the double words have been done
++
++20:
++ cbz r2, 40f @ 0 length or hit the end already then not found
++
++21: @ Post aligned section, or just a short call
++ ldrb r3,[r0],#1
++ subs r2,r2,#1
++ eor r3,r3,r1 @ r3 = 0 if match - doesn't break flags from sub
++ cbz r3, 50f
++ bne 21b @ on r2 flags
++
++40:
++ movs r0,#0 @ not found
++ bx lr
++
++50:
++ subs r0,r0,#1 @ found
++ bx lr
++
++60: @ We're here because the fast path found a hit - now we have to track down exactly which word it was
++ @ r0 points to the start of the double word after the one that was tested
++ @ r5 has the 00/ff pattern for the first word, r6 has the chained value
++ cmp r5, #0
++ itte eq
++ moveq r5, r6 @ the end is in the 2nd word
++ subeq r0,r0,#3 @ Points to 2nd byte of 2nd word
++ subne r0,r0,#7 @ or 2nd byte of 1st word
++
++ @ r0 currently points to the 3rd byte of the word containing the hit
++ tst r5, # CHARTSTMASK(0) @ 1st character
++ bne 61f
++ adds r0,r0,#1
++ tst r5, # CHARTSTMASK(1) @ 2nd character
++ ittt eq
++ addeq r0,r0,#1
++ tsteq r5, # (3<<15) @ 2nd & 3rd character
++ @ If not the 3rd must be the last one
++ addeq r0,r0,#1
++
++61:
++ pop {r4,r5,r6,r7}
++ subs r0,r0,#1
++ bx lr
+diff --git a/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/memcpy.S b/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/memcpy.S
+new file mode 100644
+index 0000000..3be24ca
+--- /dev/null
++++ b/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/memcpy.S
+@@ -0,0 +1,152 @@
++/* Copyright (c) 2010-2011, Linaro Limited
++ All rights reserved.
++
++ Redistribution and use in source and binary forms, with or without
++ modification, are permitted provided that the following conditions
++ are met:
++
++ * Redistributions of source code must retain the above copyright
++ notice, this list of conditions and the following disclaimer.
++
++ * Redistributions in binary form must reproduce the above copyright
++ notice, this list of conditions and the following disclaimer in the
++ documentation and/or other materials provided with the distribution.
++
++ * Neither the name of Linaro Limited nor the names of its
++ contributors may be used to endorse or promote products derived
++ from this software without specific prior written permission.
++
++ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
++ "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
++ LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
++ A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
++ HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
++ SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
++ LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
++ DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
++ THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
++ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
++ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++
++ Written by Dave Gilbert <david.gilbert@linaro.org>
++
++ This memcpy routine is optimised on a Cortex-A9 and should work on
++ all ARMv7 processors with NEON. */
++
++@ 2011-09-01 david.gilbert@linaro.org
++@ Extracted from local git 2f11b436
++
++ .syntax unified
++ .arch armv7-a
++
++@ this lets us check a flag in a 00/ff byte easily in either endianness
++#ifdef __ARMEB__
++#define CHARTSTMASK(c) 1<<(31-(c*8))
++#else
++#define CHARTSTMASK(c) 1<<(c*8)
++#endif
++ .text
++ .thumb
++
++@ ---------------------------------------------------------------------------
++ .thumb_func
++ .align 2
++ .p2align 4,,15
++ .global memcpy
++ .type memcpy,%function
++memcpy:
++ @ r0 = dest
++ @ r1 = source
++ @ r2 = count
++ @ returns dest in r0
++ @ Overlaps of source/dest not allowed according to spec
++ @ Note this routine relies on v7 misaligned loads/stores
++ pld [r1]
++ mov r12, r0 @ stash original r0
++ cmp r2,#32
++ blt 10f @ take the small copy case separately
++
++ @ test for either source or destination being misaligned
++ @ (We only rely on word align)
++ tst r0,#3
++ it eq
++ tsteq r1,#3
++ bne 30f @ misaligned case
++
++4:
++ @ at this point we are word (or better) aligned and have at least
++ @ 32 bytes to play with
++
++ @ If it's a huge copy, try Neon
++ cmp r2, #128*1024
++ bge 35f @ Sharing general non-aligned case here, aligned could be faster
++
++ push {r3,r4,r5,r6,r7,r8,r10,r11}
++5:
++ ldmia r1!,{r3,r4,r5,r6,r7,r8,r10,r11}
++ sub r2,r2,#32
++ pld [r1,#96]
++ cmp r2,#32
++ stmia r0!,{r3,r4,r5,r6,r7,r8,r10,r11}
++ bge 5b
++
++ pop {r3,r4,r5,r6,r7,r8,r10,r11}
++ @ We are now down to less than 32 bytes
++ cbz r2,15f @ quick exit for the case where we copied a multiple of 32
++
++10: @ small copies (not necessarily aligned - note might be slightly more than 32bytes)
++ cmp r2,#4
++ blt 12f
++11:
++ sub r2,r2,#4
++ cmp r2,#4
++ ldr r3, [r1],#4
++ str r3, [r0],#4
++ bge 11b
++12:
++ tst r2,#2
++ itt ne
++ ldrhne r3, [r1],#2
++ strhne r3, [r0],#2
++
++ tst r2,#1
++ itt ne
++ ldrbne r3, [r1],#1
++ strbne r3, [r0],#1
++
++15: @ exit
++ mov r0,r12 @ restore r0
++ bx lr
++
++ .align 2
++ .p2align 4,,15
++30: @ non-aligned - at least 32 bytes to play with
++ @ Test for co-misalignment
++ eor r3, r0, r1
++ tst r3,#3
++ beq 50f
++
++ @ Use Neon for misaligned
++35:
++ vld1.8 {d0,d1,d2,d3}, [r1]!
++ sub r2,r2,#32
++ cmp r2,#32
++ pld [r1,#96]
++ vst1.8 {d0,d1,d2,d3}, [r0]!
++ bge 35b
++ b 10b @ TODO: Probably a bad idea to switch to ARM at this point
++
++ .align 2
++ .p2align 4,,15
++50: @ Co-misaligned
++ @ At this point we've got at least 32 bytes
++51:
++ ldrb r3,[r1],#1
++ sub r2,r2,#1
++ strb r3,[r0],#1
++ tst r0,#7
++ bne 51b
++
++ cmp r2,#32
++ blt 10b
++ b 4b
+diff --git a/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/memset.S b/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/memset.S
+new file mode 100644
+index 0000000..921cb75
+--- /dev/null
++++ b/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/memset.S
+@@ -0,0 +1,118 @@
++/* Copyright (c) 2010-2011, Linaro Limited
++ All rights reserved.
++
++ Redistribution and use in source and binary forms, with or without
++ modification, are permitted provided that the following conditions
++ are met:
++
++ * Redistributions of source code must retain the above copyright
++ notice, this list of conditions and the following disclaimer.
++
++ * Redistributions in binary form must reproduce the above copyright
++ notice, this list of conditions and the following disclaimer in the
++ documentation and/or other materials provided with the distribution.
++
++ * Neither the name of Linaro Limited nor the names of its
++ contributors may be used to endorse or promote products derived
++ from this software without specific prior written permission.
++
++ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
++ "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
++ LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
++ A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
++ HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
++ SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
++ LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
++ DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
++ THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
++ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
++ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++
++ Written by Dave Gilbert <david.gilbert@linaro.org>
++
++ This memset routine is optimised on a Cortex-A9 and should work on
++ all ARMv7 processors. */
++
++ .syntax unified
++ .arch armv7-a
++
++@ 2011-08-30 david.gilbert@linaro.org
++@ Extracted from local git 2f11b436
++
++@ this lets us check a flag in a 00/ff byte easily in either endianness
++#ifdef __ARMEB__
++#define CHARTSTMASK(c) 1<<(31-(c*8))
++#else
++#define CHARTSTMASK(c) 1<<(c*8)
++#endif
++ .text
++ .thumb
++
++@ ---------------------------------------------------------------------------
++ .thumb_func
++ .align 2
++ .p2align 4,,15
++ .global memset
++ .type memset,%function
++memset:
++ @ r0 = address
++ @ r1 = character
++ @ r2 = count
++ @ returns original address in r0
++
++ mov r3, r0 @ Leave r0 alone
++ cbz r2, 10f @ Exit if 0 length
++
++ tst r0, #7
++ beq 2f @ Already aligned
++
++ @ Ok, so we're misaligned here
++1:
++ strb r1, [r3], #1
++ subs r2,r2,#1
++ tst r3, #7
++ cbz r2, 10f @ Exit if we hit the end
++ bne 1b @ go round again if still misaligned
++
++2:
++ @ OK, so we're aligned
++ push {r4,r5,r6,r7}
++ bics r4, r2, #15 @ if less than 16 bytes then need to finish it off
++ beq 5f
++
++3:
++ @ POSIX says that ch is cast to an unsigned char. A uxtb is one
++ @ byte and takes two cycles, where an AND is four bytes but one
++ @ cycle.
++ and r1, #0xFF
++ orr r1, r1, r1, lsl#8 @ Same character into all bytes
++ orr r1, r1, r1, lsl#16
++ mov r5,r1
++ mov r6,r1
++ mov r7,r1
++
++4:
++ subs r4,r4,#16
++ stmia r3!,{r1,r5,r6,r7}
++ bne 4b
++ and r2,r2,#15
++
++ @ At this point we're still aligned and we have upto align-1 bytes left to right
++ @ we can avoid some of the byte-at-a time now by testing for some big chunks
++ tst r2,#8
++ itt ne
++ subne r2,r2,#8
++ stmiane r3!,{r1,r5}
++
++5:
++ pop {r4,r5,r6,r7}
++ cbz r2, 10f
++
++ @ Got to do any last < alignment bytes
++6:
++ subs r2,r2,#1
++ strb r1,[r3],#1
++ bne 6b
++
++10:
++ bx lr @ goodbye
+diff --git a/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/strchr.S b/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/strchr.S
+new file mode 100644
+index 0000000..8875dbf
+--- /dev/null
++++ b/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/strchr.S
+@@ -0,0 +1,76 @@
++/* Copyright (c) 2010-2011, Linaro Limited
++ All rights reserved.
++
++ Redistribution and use in source and binary forms, with or without
++ modification, are permitted provided that the following conditions
++ are met:
++
++ * Redistributions of source code must retain the above copyright
++ notice, this list of conditions and the following disclaimer.
++
++ * Redistributions in binary form must reproduce the above copyright
++ notice, this list of conditions and the following disclaimer in the
++ documentation and/or other materials provided with the distribution.
++
++ * Neither the name of Linaro Limited nor the names of its
++ contributors may be used to endorse or promote products derived
++ from this software without specific prior written permission.
++
++ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
++ "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
++ LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
++ A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
++ HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
++ SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
++ LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
++ DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
++ THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
++ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
++ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++
++ Written by Dave Gilbert <david.gilbert@linaro.org>
++
++ A very simple strchr routine, from benchmarks on A9 it's a bit faster than
++ the current version in eglibc (2.12.1-0ubuntu14 package)
++ I don't think doing a word at a time version is worth it since a lot
++ of strchr cases are very short anyway */
++
++@ 2011-02-07 david.gilbert@linaro.org
++@ Extracted from local git a5b438d861
++
++ .syntax unified
++ .arch armv7-a
++
++ .text
++ .thumb
++
++@ ---------------------------------------------------------------------------
++
++ .thumb_func
++ .align 2
++ .p2align 4,,15
++ .global strchr
++ .type strchr,%function
++strchr:
++ @ r0 = start of string
++ @ r1 = character to match
++ @ returns NULL for no match, or a pointer to the match
++ and r1,r1, #255
++
++1:
++ ldrb r2,[r0],#1
++ cmp r2,r1
++ cbz r2,10f
++ bne 1b
++
++ @ We're here if it matched
++5:
++ subs r0,r0,#1
++ bx lr
++
++10:
++ @ We're here if we ran off the end
++ cmp r1, #0 @ Corner case - you're allowed to search for the nil and get a pointer to it
++ beq 5b @ A bit messy, if it's common we should branch at the start to a special loop
++ mov r0,#0
++ bx lr
+diff --git a/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/strcmp.c b/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/strcmp.c
+new file mode 100644
+index 0000000..fb2280d
+--- /dev/null
++++ b/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/strcmp.c
+@@ -0,0 +1,449 @@
++/*
++ * Copyright (c) 2008 ARM Ltd
++ * All rights reserved.
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions
++ * are met:
++ * 1. Redistributions of source code must retain the above copyright
++ * notice, this list of conditions and the following disclaimer.
++ * 2. Redistributions in binary form must reproduce the above copyright
++ * notice, this list of conditions and the following disclaimer in the
++ * documentation and/or other materials provided with the distribution.
++ * 3. The name of the company may not be used to endorse or promote
++ * products derived from this software without specific prior written
++ * permission.
++ *
++ * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
++ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
++ * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
++ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
++ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ */
++
++#include <string.h>
++#include <memcopy.h>
++
++#undef strcmp
++
++
++#ifdef __ARMEB__
++#define SHFT2LSB "lsl"
++#define SHFT2MSB "lsr"
++#define MSB "0x000000ff"
++#define LSB "0xff000000"
++#else
++#define SHFT2LSB "lsr"
++#define SHFT2MSB "lsl"
++#define MSB "0xff000000"
++#define LSB "0x000000ff"
++#endif
++
++#ifdef __thumb2__
++#define magic1(REG) "#0x01010101"
++#define magic2(REG) "#0x80808080"
++#else
++#define magic1(REG) #REG
++#define magic2(REG) #REG ", lsl #7"
++#endif
++
++int
++__attribute__((naked)) strcmp (const char* s1, const char* s2)
++{
++ asm(
++#if !(defined(__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED) || \
++ (defined (__thumb__) && !defined (__thumb2__)))
++ "pld [r0, #0]\n\t"
++ "pld [r1, #0]\n\t"
++ "eor r2, r0, r1\n\t"
++ "tst r2, #3\n\t"
++ /* Strings not at same byte offset from a word boundary. */
++ "bne strcmp_unaligned\n\t"
++ "ands r2, r0, #3\n\t"
++ "bic r0, r0, #3\n\t"
++ "bic r1, r1, #3\n\t"
++ "ldr ip, [r0], #4\n\t"
++ "it eq\n\t"
++ "ldreq r3, [r1], #4\n\t"
++ "beq 1f\n\t"
++ /* Although s1 and s2 have identical initial alignment, they are
++ not currently word aligned. Rather than comparing bytes,
++ make sure that any bytes fetched from before the addressed
++ bytes are forced to 0xff. Then they will always compare
++ equal. */
++ "eor r2, r2, #3\n\t"
++ "lsl r2, r2, #3\n\t"
++ "mvn r3, #"MSB"\n\t"
++ SHFT2LSB" r2, r3, r2\n\t"
++ "ldr r3, [r1], #4\n\t"
++ "orr ip, ip, r2\n\t"
++ "orr r3, r3, r2\n"
++ "1:\n\t"
++#ifndef __thumb2__
++ /* Load the 'magic' constant 0x01010101. */
++ "str r4, [sp, #-4]!\n\t"
++ "mov r4, #1\n\t"
++ "orr r4, r4, r4, lsl #8\n\t"
++ "orr r4, r4, r4, lsl #16\n"
++#endif
++ ".p2align 2\n"
++ "4:\n\t"
++ "pld [r0, #8]\n\t"
++ "pld [r1, #8]\n\t"
++ "sub r2, ip, "magic1(r4)"\n\t"
++ "cmp ip, r3\n\t"
++ "itttt eq\n\t"
++ /* check for any zero bytes in first word */
++ "biceq r2, r2, ip\n\t"
++ "tsteq r2, "magic2(r4)"\n\t"
++ "ldreq ip, [r0], #4\n\t"
++ "ldreq r3, [r1], #4\n\t"
++ "beq 4b\n"
++ "2:\n\t"
++ /* There's a zero or a different byte in the word */
++ SHFT2MSB" r0, ip, #24\n\t"
++ SHFT2LSB" ip, ip, #8\n\t"
++ "cmp r0, #1\n\t"
++ "it cs\n\t"
++ "cmpcs r0, r3, "SHFT2MSB" #24\n\t"
++ "it eq\n\t"
++ SHFT2LSB"eq r3, r3, #8\n\t"
++ "beq 2b\n\t"
++ /* On a big-endian machine, r0 contains the desired byte in bits
++ 0-7; on a little-endian machine they are in bits 24-31. In
++ both cases the other bits in r0 are all zero. For r3 the
++ interesting byte is at the other end of the word, but the
++ other bits are not necessarily zero. We need a signed result
++ representing the differnece in the unsigned bytes, so for the
++ little-endian case we can't just shift the interesting bits
++ up. */
++#ifdef __ARMEB__
++ "sub r0, r0, r3, lsr #24\n\t"
++#else
++ "and r3, r3, #255\n\t"
++#ifdef __thumb2__
++ /* No RSB instruction in Thumb2 */
++ "lsr r0, r0, #24\n\t"
++ "sub r0, r0, r3\n\t"
++#else
++ "rsb r0, r3, r0, lsr #24\n\t"
++#endif
++#endif
++#ifndef __thumb2__
++ "ldr r4, [sp], #4\n\t"
++#endif
++ "BX LR"
++#elif (defined (__thumb__) && !defined (__thumb2__))
++ "1:\n\t"
++ "ldrb r2, [r0]\n\t"
++ "ldrb r3, [r1]\n\t"
++ "add r0, r0, #1\n\t"
++ "add r1, r1, #1\n\t"
++ "cmp r2, #0\n\t"
++ "beq 2f\n\t"
++ "cmp r2, r3\n\t"
++ "beq 1b\n\t"
++ "2:\n\t"
++ "sub r0, r2, r3\n\t"
++ "bx lr"
++#else
++ "3:\n\t"
++ "ldrb r2, [r0], #1\n\t"
++ "ldrb r3, [r1], #1\n\t"
++ "cmp r2, #1\n\t"
++ "it cs\n\t"
++ "cmpcs r2, r3\n\t"
++ "beq 3b\n\t"
++ "sub r0, r2, r3\n\t"
++ "BX LR"
++#endif
++ );
++}
++
++#if !(defined(__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED) || \
++ (defined (__thumb__) && !defined (__thumb2__)))
++static int __attribute__((naked, used))
++strcmp_unaligned(const char* s1, const char* s2)
++{
++#if 0
++ /* The assembly code below is based on the following alogrithm. */
++#ifdef __ARMEB__
++#define RSHIFT <<
++#define LSHIFT >>
++#else
++#define RSHIFT >>
++#define LSHIFT <<
++#endif
++
++#define body(shift) \
++ mask = 0xffffffffU RSHIFT shift; \
++ w1 = *wp1++; \
++ w2 = *wp2++; \
++ do \
++ { \
++ t1 = w1 & mask; \
++ if (__builtin_expect(t1 != w2 RSHIFT shift, 0)) \
++ { \
++ w2 RSHIFT= shift; \
++ break; \
++ } \
++ if (__builtin_expect(((w1 - b1) & ~w1) & (b1 << 7), 0)) \
++ { \
++ /* See comment in assembler below re syndrome on big-endian */\
++ if ((((w1 - b1) & ~w1) & (b1 << 7)) & mask) \
++ w2 RSHIFT= shift; \
++ else \
++ { \
++ w2 = *wp2; \
++ t1 = w1 RSHIFT (32 - shift); \
++ w2 = (w2 LSHIFT (32 - shift)) RSHIFT (32 - shift); \
++ } \
++ break; \
++ } \
++ w2 = *wp2++; \
++ t1 ^= w1; \
++ if (__builtin_expect(t1 != w2 LSHIFT (32 - shift), 0)) \
++ { \
++ t1 = w1 >> (32 - shift); \
++ w2 = (w2 << (32 - shift)) RSHIFT (32 - shift); \
++ break; \
++ } \
++ w1 = *wp1++; \
++ } while (1)
++
++ const unsigned* wp1;
++ const unsigned* wp2;
++ unsigned w1, w2;
++ unsigned mask;
++ unsigned shift;
++ unsigned b1 = 0x01010101;
++ char c1, c2;
++ unsigned t1;
++
++ while (((unsigned) s1) & 3)
++ {
++ c1 = *s1++;
++ c2 = *s2++;
++ if (c1 == 0 || c1 != c2)
++ return c1 - (int)c2;
++ }
++ wp1 = (unsigned*) (((unsigned)s1) & ~3);
++ wp2 = (unsigned*) (((unsigned)s2) & ~3);
++ t1 = ((unsigned) s2) & 3;
++ if (t1 == 1)
++ {
++ body(8);
++ }
++ else if (t1 == 2)
++ {
++ body(16);
++ }
++ else
++ {
++ body (24);
++ }
++
++ do
++ {
++#ifdef __ARMEB__
++ c1 = (char) t1 >> 24;
++ c2 = (char) w2 >> 24;
++#else
++ c1 = (char) t1;
++ c2 = (char) w2;
++#endif
++ t1 RSHIFT= 8;
++ w2 RSHIFT= 8;
++ } while (c1 != 0 && c1 == c2);
++ return c1 - c2;
++#endif
++
++ asm("wp1 .req r0\n\t"
++ "wp2 .req r1\n\t"
++ "b1 .req r2\n\t"
++ "w1 .req r4\n\t"
++ "w2 .req r5\n\t"
++ "t1 .req ip\n\t"
++ "@ r3 is scratch\n"
++
++ /* First of all, compare bytes until wp1(sp1) is word-aligned. */
++ "1:\n\t"
++ "tst wp1, #3\n\t"
++ "beq 2f\n\t"
++ "ldrb r2, [wp1], #1\n\t"
++ "ldrb r3, [wp2], #1\n\t"
++ "cmp r2, #1\n\t"
++ "it cs\n\t"
++ "cmpcs r2, r3\n\t"
++ "beq 1b\n\t"
++ "sub r0, r2, r3\n\t"
++ "BX LR\n"
++
++ "2:\n\t"
++ "str r5, [sp, #-4]!\n\t"
++ "str r4, [sp, #-4]!\n\t"
++ // "stmfd sp!, {r4, r5}\n\t"
++ "mov b1, #1\n\t"
++ "orr b1, b1, b1, lsl #8\n\t"
++ "orr b1, b1, b1, lsl #16\n\t"
++
++ "and t1, wp2, #3\n\t"
++ "bic wp2, wp2, #3\n\t"
++ "ldr w1, [wp1], #4\n\t"
++ "ldr w2, [wp2], #4\n\t"
++ "cmp t1, #2\n\t"
++ "beq 2f\n\t"
++ "bhi 3f\n"
++
++ /* Critical inner Loop: Block with 3 bytes initial overlap */
++ ".p2align 2\n"
++ "1:\n\t"
++ "bic t1, w1, #"MSB"\n\t"
++ "cmp t1, w2, "SHFT2LSB" #8\n\t"
++ "sub r3, w1, b1\n\t"
++ "bic r3, r3, w1\n\t"
++ "bne 4f\n\t"
++ "ands r3, r3, b1, lsl #7\n\t"
++ "it eq\n\t"
++ "ldreq w2, [wp2], #4\n\t"
++ "bne 5f\n\t"
++ "eor t1, t1, w1\n\t"
++ "cmp t1, w2, "SHFT2MSB" #24\n\t"
++ "bne 6f\n\t"
++ "ldr w1, [wp1], #4\n\t"
++ "b 1b\n"
++ "4:\n\t"
++ SHFT2LSB" w2, w2, #8\n\t"
++ "b 8f\n"
++
++ "5:\n\t"
++#ifdef __ARMEB__
++ /* The syndrome value may contain false ones if the string ends
++ with the bytes 0x01 0x00 */
++ "tst w1, #0xff000000\n\t"
++ "itt ne\n\t"
++ "tstne w1, #0x00ff0000\n\t"
++ "tstne w1, #0x0000ff00\n\t"
++ "beq 7f\n\t"
++#else
++ "bics r3, r3, #0xff000000\n\t"
++ "bne 7f\n\t"
++#endif
++ "ldrb w2, [wp2]\n\t"
++ SHFT2LSB" t1, w1, #24\n\t"
++#ifdef __ARMEB__
++ "lsl w2, w2, #24\n\t"
++#endif
++ "b 8f\n"
++
++ "6:\n\t"
++ SHFT2LSB" t1, w1, #24\n\t"
++ "and w2, w2, #"LSB"\n\t"
++ "b 8f\n"
++
++ /* Critical inner Loop: Block with 2 bytes initial overlap */
++ ".p2align 2\n"
++ "2:\n\t"
++ SHFT2MSB" t1, w1, #16\n\t"
++ "sub r3, w1, b1\n\t"
++ SHFT2LSB" t1, t1, #16\n\t"
++ "bic r3, r3, w1\n\t"
++ "cmp t1, w2, "SHFT2LSB" #16\n\t"
++ "bne 4f\n\t"
++ "ands r3, r3, b1, lsl #7\n\t"
++ "it eq\n\t"
++ "ldreq w2, [wp2], #4\n\t"
++ "bne 5f\n\t"
++ "eor t1, t1, w1\n\t"
++ "cmp t1, w2, "SHFT2MSB" #16\n\t"
++ "bne 6f\n\t"
++ "ldr w1, [wp1], #4\n\t"
++ "b 2b\n"
++
++ "5:\n\t"
++#ifdef __ARMEB__
++ /* The syndrome value may contain false ones if the string ends
++ with the bytes 0x01 0x00 */
++ "tst w1, #0xff000000\n\t"
++ "it ne\n\t"
++ "tstne w1, #0x00ff0000\n\t"
++ "beq 7f\n\t"
++#else
++ "lsls r3, r3, #16\n\t"
++ "bne 7f\n\t"
++#endif
++ "ldrh w2, [wp2]\n\t"
++ SHFT2LSB" t1, w1, #16\n\t"
++#ifdef __ARMEB__
++ "lsl w2, w2, #16\n\t"
++#endif
++ "b 8f\n"
++
++ "6:\n\t"
++ SHFT2MSB" w2, w2, #16\n\t"
++ SHFT2LSB" t1, w1, #16\n\t"
++ "4:\n\t"
++ SHFT2LSB" w2, w2, #16\n\t"
++ "b 8f\n\t"
++
++ /* Critical inner Loop: Block with 1 byte initial overlap */
++ ".p2align 2\n"
++ "3:\n\t"
++ "and t1, w1, #"LSB"\n\t"
++ "cmp t1, w2, "SHFT2LSB" #24\n\t"
++ "sub r3, w1, b1\n\t"
++ "bic r3, r3, w1\n\t"
++ "bne 4f\n\t"
++ "ands r3, r3, b1, lsl #7\n\t"
++ "it eq\n\t"
++ "ldreq w2, [wp2], #4\n\t"
++ "bne 5f\n\t"
++ "eor t1, t1, w1\n\t"
++ "cmp t1, w2, "SHFT2MSB" #8\n\t"
++ "bne 6f\n\t"
++ "ldr w1, [wp1], #4\n\t"
++ "b 3b\n"
++ "4:\n\t"
++ SHFT2LSB" w2, w2, #24\n\t"
++ "b 8f\n"
++ "5:\n\t"
++ /* The syndrome value may contain false ones if the string ends
++ with the bytes 0x01 0x00 */
++ "tst w1, #"LSB"\n\t"
++ "beq 7f\n\t"
++ "ldr w2, [wp2], #4\n"
++ "6:\n\t"
++ SHFT2LSB" t1, w1, #8\n\t"
++ "bic w2, w2, #"MSB"\n\t"
++ "b 8f\n"
++ "7:\n\t"
++ "mov r0, #0\n\t"
++ // "ldmfd sp!, {r4, r5}\n\t"
++ "ldr r4, [sp], #4\n\t"
++ "ldr r5, [sp], #4\n\t"
++ "BX LR\n"
++ "8:\n\t"
++ "and r2, t1, #"LSB"\n\t"
++ "and r0, w2, #"LSB"\n\t"
++ "cmp r0, #1\n\t"
++ "it cs\n\t"
++ "cmpcs r0, r2\n\t"
++ "itt eq\n\t"
++ SHFT2LSB"eq t1, t1, #8\n\t"
++ SHFT2LSB"eq w2, w2, #8\n\t"
++ "beq 8b\n\t"
++ "sub r0, r2, r0\n\t"
++ // "ldmfd sp!, {r4, r5}\n\t"
++ "ldr r4, [sp], #4\n\t"
++ "ldr r5, [sp], #4\n\t"
++ "BX LR");
++}
++
++#endif
++
++libc_hidden_builtin_def (strcmp)
+diff --git a/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/strcpy.c b/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/strcpy.c
+new file mode 100644
+index 0000000..aa8cb06
+--- /dev/null
++++ b/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/strcpy.c
+@@ -0,0 +1,172 @@
++/*
++ * Copyright (c) 2008 ARM Ltd
++ * All rights reserved.
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions
++ * are met:
++ * 1. Redistributions of source code must retain the above copyright
++ * notice, this list of conditions and the following disclaimer.
++ * 2. Redistributions in binary form must reproduce the above copyright
++ * notice, this list of conditions and the following disclaimer in the
++ * documentation and/or other materials provided with the distribution.
++ * 3. The name of the company may not be used to endorse or promote
++ * products derived from this software without specific prior written
++ * permission.
++ *
++ * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
++ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
++ * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
++ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
++ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ */
++
++#include <string.h>
++#include <memcopy.h>
++
++#undef strcmp
++
++
++#ifdef __thumb2__
++#define magic1(REG) "#0x01010101"
++#define magic2(REG) "#0x80808080"
++#else
++#define magic1(REG) #REG
++#define magic2(REG) #REG ", lsl #7"
++#endif
++
++char* __attribute__((naked))
++strcpy (char* dst, const char* src)
++{
++ asm (
++#if !(defined(__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED) || \
++ (defined (__thumb__) && !defined (__thumb2__)))
++ "pld [r1, #0]\n\t"
++ "eor r2, r0, r1\n\t"
++ "mov ip, r0\n\t"
++ "tst r2, #3\n\t"
++ "bne 4f\n\t"
++ "tst r1, #3\n\t"
++ "bne 3f\n"
++ "5:\n\t"
++#ifndef __thumb2__
++ "str r5, [sp, #-4]!\n\t"
++ "mov r5, #0x01\n\t"
++ "orr r5, r5, r5, lsl #8\n\t"
++ "orr r5, r5, r5, lsl #16\n\t"
++#endif
++
++ "str r4, [sp, #-4]!\n\t"
++ "tst r1, #4\n\t"
++ "ldr r3, [r1], #4\n\t"
++ "beq 2f\n\t"
++ "sub r2, r3, "magic1(r5)"\n\t"
++ "bics r2, r2, r3\n\t"
++ "tst r2, "magic2(r5)"\n\t"
++ "itt eq\n\t"
++ "streq r3, [ip], #4\n\t"
++ "ldreq r3, [r1], #4\n"
++ "bne 1f\n\t"
++ /* Inner loop. We now know that r1 is 64-bit aligned, so we
++ can safely fetch up to two words. This allows us to avoid
++ load stalls. */
++ ".p2align 2\n"
++ "2:\n\t"
++ "pld [r1, #8]\n\t"
++ "ldr r4, [r1], #4\n\t"
++ "sub r2, r3, "magic1(r5)"\n\t"
++ "bics r2, r2, r3\n\t"
++ "tst r2, "magic2(r5)"\n\t"
++ "sub r2, r4, "magic1(r5)"\n\t"
++ "bne 1f\n\t"
++ "str r3, [ip], #4\n\t"
++ "bics r2, r2, r4\n\t"
++ "tst r2, "magic2(r5)"\n\t"
++ "itt eq\n\t"
++ "ldreq r3, [r1], #4\n\t"
++ "streq r4, [ip], #4\n\t"
++ "beq 2b\n\t"
++ "mov r3, r4\n"
++ "1:\n\t"
++#ifdef __ARMEB__
++ "rors r3, r3, #24\n\t"
++#endif
++ "strb r3, [ip], #1\n\t"
++ "tst r3, #0xff\n\t"
++#ifdef __ARMEL__
++ "ror r3, r3, #8\n\t"
++#endif
++ "bne 1b\n\t"
++ "ldr r4, [sp], #4\n\t"
++#ifndef __thumb2__
++ "ldr r5, [sp], #4\n\t"
++#endif
++ "BX LR\n"
++
++ /* Strings have the same offset from word alignment, but it's
++ not zero. */
++ "3:\n\t"
++ "tst r1, #1\n\t"
++ "beq 1f\n\t"
++ "ldrb r2, [r1], #1\n\t"
++ "strb r2, [ip], #1\n\t"
++ "cmp r2, #0\n\t"
++ "it eq\n"
++ "BXEQ LR\n"
++ "1:\n\t"
++ "tst r1, #2\n\t"
++ "beq 5b\n\t"
++ "ldrh r2, [r1], #2\n\t"
++#ifdef __ARMEB__
++ "tst r2, #0xff00\n\t"
++ "iteet ne\n\t"
++ "strneh r2, [ip], #2\n\t"
++ "lsreq r2, r2, #8\n\t"
++ "streqb r2, [ip]\n\t"
++ "tstne r2, #0xff\n\t"
++#else
++ "tst r2, #0xff\n\t"
++ "itet ne\n\t"
++ "strneh r2, [ip], #2\n\t"
++ "streqb r2, [ip]\n\t"
++ "tstne r2, #0xff00\n\t"
++#endif
++ "bne 5b\n\t"
++ "BX LR\n"
++
++ /* src and dst do not have a common word-alignement. Fall back to
++ byte copying. */
++ "4:\n\t"
++ "ldrb r2, [r1], #1\n\t"
++ "strb r2, [ip], #1\n\t"
++ "cmp r2, #0\n\t"
++ "bne 4b\n\t"
++ "BX LR"
++
++#elif !defined (__thumb__) || defined (__thumb2__)
++ "mov r3, r0\n\t"
++ "1:\n\t"
++ "ldrb r2, [r1], #1\n\t"
++ "strb r2, [r3], #1\n\t"
++ "cmp r2, #0\n\t"
++ "bne 1b\n\t"
++ "BX LR"
++#else
++ "mov r3, r0\n\t"
++ "1:\n\t"
++ "ldrb r2, [r1]\n\t"
++ "add r1, r1, #1\n\t"
++ "strb r2, [r3]\n\t"
++ "add r3, r3, #1\n\t"
++ "cmp r2, #0\n\t"
++ "bne 1b\n\t"
++ "BX LR"
++#endif
++ );
++}
++libc_hidden_builtin_def (strcpy)
+diff --git a/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/strlen.S b/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/strlen.S
+new file mode 100644
+index 0000000..125e92f
+--- /dev/null
++++ b/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/strlen.S
+@@ -0,0 +1,111 @@
++/* Copyright (c) 2010-2011, Linaro Limited
++ All rights reserved.
++
++ Redistribution and use in source and binary forms, with or without
++ modification, are permitted provided that the following conditions
++ are met:
++
++ * Redistributions of source code must retain the above copyright
++ notice, this list of conditions and the following disclaimer.
++
++ * Redistributions in binary form must reproduce the above copyright
++ notice, this list of conditions and the following disclaimer in the
++ documentation and/or other materials provided with the distribution.
++
++ * Neither the name of Linaro Limited nor the names of its
++ contributors may be used to endorse or promote products derived
++ from this software without specific prior written permission.
++
++ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
++ "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
++ LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
++ A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
++ HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
++ SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
++ LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
++ DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
++ THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
++ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
++ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++
++ Written by Dave Gilbert <david.gilbert@linaro.org>
++
++ This strlen routine is optimised on a Cortex-A9 and should work on
++ all ARMv7 processors. This routine is reasonably fast for short
++ strings, but is probably slower than a simple implementation if all
++ your strings are very short */
++
++@ 2011-02-08 david.gilbert@linaro.org
++@ Extracted from local git 6848613a
++
++
++@ this lets us check a flag in a 00/ff byte easily in either endianness
++#ifdef __ARMEB__
++#define CHARTSTMASK(c) 1<<(31-(c*8))
++#else
++#define CHARTSTMASK(c) 1<<(c*8)
++#endif
++
++@-----------------------------------------------------------------------------------------------------------------------------
++ .syntax unified
++ .arch armv7-a
++
++ .thumb_func
++ .align 2
++ .p2align 4,,15
++ .global strlen
++ .type strlen,%function
++strlen:
++ @ r0 = string
++ @ returns count of bytes in string not including terminator
++ mov r1, r0
++ push { r4,r6 }
++ mvns r6, #0 @ all F
++ movs r4, #0
++ tst r0, #7
++ beq 2f
++
++1:
++ ldrb r2, [r1], #1
++ tst r1, #7 @ Hit alignment yet?
++ cbz r2, 10f @ Exit if we found the 0
++ bne 1b
++
++ @ So we're now aligned
++2:
++ ldmia r1!,{r2,r3}
++ uadd8 r2, r2, r6 @ Parallel add 0xff - sets the GE bits for anything that wasn't 0
++ sel r2, r4, r6 @ bytes are 00 for none-00 bytes, or ff for 00 bytes - NOTE INVERSION
++ uadd8 r3, r3, r6 @ Parallel add 0xff - sets the GE bits for anything that wasn't 0
++ sel r3, r2, r6 @ bytes are 00 for none-00 bytes, or ff for 00 bytes - NOTE INVERSION
++ cmp r3, #0
++ beq 2b
++
++strlenendtmp:
++ @ One (or more) of the bytes we loaded was 0 - but which one?
++ @ r2 has the mask corresponding to the first loaded word
++ @ r3 has a combined mask of the two words - but if r2 was all-non 0
++ @ then it's just the 2nd words
++ cmp r2, #0
++ itte eq
++ moveq r2, r3 @ the end is in the 2nd word
++ subeq r1,r1,#3
++ subne r1,r1,#7
++
++ @ r1 currently points to the 2nd byte of the word containing the 0
++ tst r2, # CHARTSTMASK(0) @ 1st character
++ bne 10f
++ adds r1,r1,#1
++ tst r2, # CHARTSTMASK(1) @ 2nd character
++ ittt eq
++ addeq r1,r1,#1
++ tsteq r2, # (3<<15) @ 2nd & 3rd character
++ @ If not the 3rd must be the last one
++ addeq r1,r1,#1
++
++10:
++ @ r0 is still at the beginning, r1 is pointing 1 byte after the terminator
++ sub r0, r1, r0
++ subs r0, r0, #1
++ pop { r4, r6 }
++ bx lr
diff --git a/patches/glibc-2.14.1/0019-add-libc_hidden_builtin_def-for-all-cortex-functions.patch b/patches/glibc-2.14.1/0019-add-libc_hidden_builtin_def-for-all-cortex-functions.patch
new file mode 100644
index 0000000..6a39044
--- /dev/null
+++ b/patches/glibc-2.14.1/0019-add-libc_hidden_builtin_def-for-all-cortex-functions.patch
@@ -0,0 +1,76 @@
+From: Michael Olbrich <m.olbrich@pengutronix.de>
+Date: Thu, 15 Sep 2011 23:30:25 +0200
+Subject: [PATCH] add libc_hidden_builtin_def for all cortex functions
+
+Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
+---
+ .../sysdeps/arm/eabi/arm/cortex-a8/memchr.S | 3 +++
+ .../sysdeps/arm/eabi/arm/cortex-a8/memcpy.S | 2 ++
+ .../sysdeps/arm/eabi/arm/cortex-a8/memset.S | 2 ++
+ .../sysdeps/arm/eabi/arm/cortex-a8/strchr.S | 3 +++
+ .../sysdeps/arm/eabi/arm/cortex-a8/strcpy.c | 1 +
+ .../sysdeps/arm/eabi/arm/cortex-a8/strlen.S | 2 ++
+ 6 files changed, 13 insertions(+), 0 deletions(-)
+
+diff --git a/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/memchr.S b/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/memchr.S
+index 8f5aaa9..6d497cb 100644
+--- a/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/memchr.S
++++ b/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/memchr.S
+@@ -148,3 +148,6 @@ memchr:
+ pop {r4,r5,r6,r7}
+ subs r0,r0,#1
+ bx lr
++
++strong_alias (memchr, __memchr)
++libc_hidden_builtin_def (memchr)
+diff --git a/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/memcpy.S b/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/memcpy.S
+index 3be24ca..c274207 100644
+--- a/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/memcpy.S
++++ b/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/memcpy.S
+@@ -150,3 +150,5 @@ memcpy:
+ cmp r2,#32
+ blt 10b
+ b 4b
++
++libc_hidden_builtin_def (memcpy)
+diff --git a/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/memset.S b/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/memset.S
+index 921cb75..d4c12a4 100644
+--- a/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/memset.S
++++ b/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/memset.S
+@@ -116,3 +116,5 @@ memset:
+
+ 10:
+ bx lr @ goodbye
++
++libc_hidden_builtin_def (memset)
+diff --git a/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/strchr.S b/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/strchr.S
+index 8875dbf..05c832f 100644
+--- a/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/strchr.S
++++ b/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/strchr.S
+@@ -74,3 +74,6 @@ strchr:
+ beq 5b @ A bit messy, if it's common we should branch at the start to a special loop
+ mov r0,#0
+ bx lr
++
++weak_alias (strchr, index)
++libc_hidden_builtin_def (strchr)
+diff --git a/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/strcpy.c b/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/strcpy.c
+index aa8cb06..3bbaa86 100644
+--- a/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/strcpy.c
++++ b/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/strcpy.c
+@@ -169,4 +169,5 @@ strcpy (char* dst, const char* src)
+ #endif
+ );
+ }
++
+ libc_hidden_builtin_def (strcpy)
+diff --git a/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/strlen.S b/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/strlen.S
+index 125e92f..a1e02ad 100644
+--- a/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/strlen.S
++++ b/cortex-strings/sysdeps/arm/eabi/arm/cortex-a8/strlen.S
+@@ -109,3 +109,5 @@ strlenendtmp:
+ subs r0, r0, #1
+ pop { r4, r6 }
+ bx lr
++
++libc_hidden_builtin_def (strlen)
diff --git a/patches/glibc-2.14.1/0020-revert-sunrpc-removal.patch b/patches/glibc-2.14.1/0020-revert-sunrpc-removal.patch
new file mode 100644
index 0000000..ecad156
--- /dev/null
+++ b/patches/glibc-2.14.1/0020-revert-sunrpc-removal.patch
@@ -0,0 +1,80 @@
+From: Michael Olbrich <m.olbrich@pengutronix.de>
+Date: Wed, 2 Nov 2011 17:47:58 +0100
+Subject: [PATCH] revert sunrpc removal
+
+Packages like busybox still need this. We can drop this patch
+later when the packages are adapted to use libtirpc.
+
+This patch was taken from OpenSUSE.
+
+Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
+---
+ NEWS | 10 ----------
+ include/libc-symbols.h | 2 +-
+ nis/Makefile | 4 ++--
+ sunrpc/Makefile | 2 +-
+ 4 files changed, 4 insertions(+), 14 deletions(-)
+
+diff --git a/NEWS b/NEWS
+index bb517c2..6504f81 100644
+--- a/NEWS
++++ b/NEWS
+@@ -27,16 +27,6 @@ Version 2.14
+ 12724, 12734, 12738, 12746, 12766, 12775, 12777, 12782, 12788, 12792,
+ 12795, 12811, 12813, 12814, 12841
+
+-* The RPC implementation in libc is obsoleted. Old programs keep working
+- but new programs cannot be linked with the routines in libc anymore.
+- Programs in need of RPC functionality must be linked against TI-RPC.
+- The TI-RPC implementation is IPv6 enabled and there are other benefits.
+-
+- Visible changes of this change include (obviously) the inability to link
+- programs using RPC functions without referencing the TI-RPC library and the
+- removal of the RPC headers from the glibc headers.
+- Implemented by Ulrich Drepper.
+-
+ * New Linux interfaces: clock_adjtime, name_to_handle_at, open_by_handle_at,
+ syncfs, setns, sendmmsg
+
+diff --git a/include/libc-symbols.h b/include/libc-symbols.h
+index 8cefa67..1b21447 100644
+--- a/include/libc-symbols.h
++++ b/include/libc-symbols.h
+@@ -635,7 +635,7 @@ for linking")
+ # define libc_hidden_proto(name, attrs...) hidden_proto (name, ##attrs)
+ # define libc_hidden_def(name) hidden_def (name)
+ # define libc_hidden_weak(name) hidden_weak (name)
+-# define libc_hidden_nolink(name, version) hidden_nolink (name, libc, version)
++# define libc_hidden_nolink(name, version) hidden_def (name)
+ # define libc_hidden_ver(local, name) hidden_ver (local, name)
+ # define libc_hidden_data_def(name) hidden_data_def (name)
+ # define libc_hidden_data_weak(name) hidden_data_weak (name)
+diff --git a/nis/Makefile b/nis/Makefile
+index 3a01142..5256d61 100644
+--- a/nis/Makefile
++++ b/nis/Makefile
+@@ -23,9 +23,9 @@ subdir := nis
+
+ aux := nis_hash
+
++headers := $(wildcard rpcsvc/*.[hx])
+ distribute := nss-nis.h nss-nisplus.h nis_intern.h Banner \
+- nisplus-parser.h nis_xdr.h nss \
+- $(wildcard rpcsvc/*.[hx])
++ nisplus-parser.h nis_xdr.h nss
+
+ # These are the databases available for the nis (and perhaps later nisplus)
+ # service. This must be a superset of the services in nss.
+diff --git a/sunrpc/Makefile b/sunrpc/Makefile
+index 85dcdb1..925b862 100644
+--- a/sunrpc/Makefile
++++ b/sunrpc/Makefile
+@@ -53,7 +53,7 @@ headers-in-tirpc = $(addprefix rpc/,auth.h auth_unix.h clnt.h pmap_clnt.h \
+ des_crypt.h)
+ headers-not-in-tirpc = $(addprefix rpc/,key_prot.h rpc_des.h) \
+ $(rpcsvc:%=rpcsvc/%) rpcsvc/bootparam.h
+-headers = rpc/netdb.h
++headers = rpc/netdb.h $(headers-in-tirpc) $(headers-not-in-tirpc)
+ install-others = $(inst_sysconfdir)/rpc
+ generated = $(rpcsvc:%.x=rpcsvc/%.h) $(rpcsvc:%.x=x%.c) $(rpcsvc:%.x=x%.stmp) \
+ $(rpcsvc:%.x=rpcsvc/%.stmp) rpcgen
diff --git a/patches/glibc-2.14.1/series b/patches/glibc-2.14.1/series
new file mode 100644
index 0000000..c337ca5
--- /dev/null
+++ b/patches/glibc-2.14.1/series
@@ -0,0 +1,23 @@
+# generated by git-ptx-patches
+#tag:base --start-number 1
+0001-add-install-lib-all-target.patch
+0002-fix-build-error-with-static-nss.patch
+0003-configure.in-detect-readelf-with-AC_CHECK_TARGET_TOO.patch
+0004-stdlib-longlong.patch
+0005-respect-env-CPPFLAGS.patch
+0006-i586-chk.patch
+0007-i386-x86_64-revert-clone-cfi.patch
+0008-queue-header-updates.patch
+0009-don-t-regen-docs-if-perl-is-not-found.patch
+0010-localedef-fix-trampoline.patch
+0011-posix-awk.patch
+0012-resolv-dynamic.patch
+0013-section-comments.patch
+0014-no-inline-gmon.patch
+0015-strict-aliasing.patch
+0016-undefine-__i686.patch
+0017-fpscr-values.patch
+0018-optimized-string-functions-for-NEON-from-Linaro.patch
+0019-add-libc_hidden_builtin_def-for-all-cortex-functions.patch
+0020-revert-sunrpc-removal.patch
+# 00982701c958f3ef1fb77c5fa12126c3 - git-ptx-patches magic
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-25 01:24:41 +0000