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-rw-r--r--patches/binutils-2.20.1a/atmel/0006-Add-support-for-XMEGA-arch-and-devices.patch733
1 files changed, 0 insertions, 733 deletions
diff --git a/patches/binutils-2.20.1a/atmel/0006-Add-support-for-XMEGA-arch-and-devices.patch b/patches/binutils-2.20.1a/atmel/0006-Add-support-for-XMEGA-arch-and-devices.patch
deleted file mode 100644
index 52942f0..0000000
--- a/patches/binutils-2.20.1a/atmel/0006-Add-support-for-XMEGA-arch-and-devices.patch
+++ /dev/null
@@ -1,733 +0,0 @@
-From 905282b7846358c30058a35303161146317b8931 Mon Sep 17 00:00:00 2001
-From: Stephan Linz <linz@li-pro.net>
-Date: Mon, 18 Apr 2011 22:45:42 +0200
-Subject: [PATCH 6/9] Add support for XMEGA arch and devices
-
-Add support for the AVR XMEGA family of devices, a new architectures
-(groupings), device names, and support for new opcodes that are used
-in this family. This is the patch that has been used out in the field
-in several AVR toolchain distributions successfully for a long time.
-
-Quote by Eric Weddington (2011-03-22):
-http://old.nabble.com/-AVR--Add-support-for-XMEGA-arch-and-devices.-td31212035.html
-
-Original ATMEL patch from:
-http://distribute.atmel.no/tools/opensource/avr-gcc/binutils-2.20.1/50-binutils-2.20.1-xmega.patch
-
-Signed-off-by: Stephan Linz <linz@li-pro.net>
----
- bfd/archures.c | 7 +++++
- bfd/bfd-in2.h | 7 +++++
- bfd/cpu-avr.c | 24 ++++++++++++++++++-
- bfd/elf32-avr.c | 56 ++++++++++++++++++++++++++++++++++++++++++++
- gas/config/tc-avr.c | 49 ++++++++++++++++++++++++++++++++++++--
- gas/doc/c-avr.texi | 21 ++++++++++++++++
- include/elf/avr.h | 7 +++++
- include/opcode/avr.h | 11 ++++++++-
- ld/Makefile.am | 35 +++++++++++++++++++++++++++
- ld/Makefile.in | 35 +++++++++++++++++++++++++++
- ld/configure.tgt | 2 +-
- ld/emulparams/avrxmega1.sh | 12 +++++++++
- ld/emulparams/avrxmega2.sh | 12 +++++++++
- ld/emulparams/avrxmega3.sh | 12 +++++++++
- ld/emulparams/avrxmega4.sh | 12 +++++++++
- ld/emulparams/avrxmega5.sh | 12 +++++++++
- ld/emulparams/avrxmega6.sh | 12 +++++++++
- ld/emulparams/avrxmega7.sh | 12 +++++++++
- ld/emultempl/avrelf.em | 6 +++-
- opcodes/avr-dis.c | 31 ++++++++++++++++++------
- 20 files changed, 359 insertions(+), 16 deletions(-)
- create mode 100644 ld/emulparams/avrxmega1.sh
- create mode 100644 ld/emulparams/avrxmega2.sh
- create mode 100644 ld/emulparams/avrxmega3.sh
- create mode 100644 ld/emulparams/avrxmega4.sh
- create mode 100644 ld/emulparams/avrxmega5.sh
- create mode 100644 ld/emulparams/avrxmega6.sh
- create mode 100644 ld/emulparams/avrxmega7.sh
-
-diff --git a/bfd/archures.c b/bfd/archures.c
-index df73b3f..390ccec 100644
---- a/bfd/archures.c
-+++ b/bfd/archures.c
-@@ -368,6 +368,13 @@ DESCRIPTION
- .#define bfd_mach_avr5 5
- .#define bfd_mach_avr51 51
- .#define bfd_mach_avr6 6
-+.#define bfd_mach_avrxmega1 101
-+.#define bfd_mach_avrxmega2 102
-+.#define bfd_mach_avrxmega3 103
-+.#define bfd_mach_avrxmega4 104
-+.#define bfd_mach_avrxmega5 105
-+.#define bfd_mach_avrxmega6 106
-+.#define bfd_mach_avrxmega7 107
- . bfd_arch_bfin, {* ADI Blackfin *}
- .#define bfd_mach_bfin 1
- . bfd_arch_cr16, {* National Semiconductor CompactRISC (ie CR16). *}
-diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index d98c6ec..0821cd0 100644
---- a/bfd/bfd-in2.h
-+++ b/bfd/bfd-in2.h
-@@ -2042,6 +2042,13 @@ enum bfd_architecture
- #define bfd_mach_avr5 5
- #define bfd_mach_avr51 51
- #define bfd_mach_avr6 6
-+#define bfd_mach_avrxmega1 101
-+#define bfd_mach_avrxmega2 102
-+#define bfd_mach_avrxmega3 103
-+#define bfd_mach_avrxmega4 104
-+#define bfd_mach_avrxmega5 105
-+#define bfd_mach_avrxmega6 106
-+#define bfd_mach_avrxmega7 107
- bfd_arch_bfin, /* ADI Blackfin */
- #define bfd_mach_bfin 1
- bfd_arch_cr16, /* National Semiconductor CompactRISC (ie CR16). */
-diff --git a/bfd/cpu-avr.c b/bfd/cpu-avr.c
-index 9e62ab4..6562ee5 100644
---- a/bfd/cpu-avr.c
-+++ b/bfd/cpu-avr.c
-@@ -133,7 +133,29 @@ static const bfd_arch_info_type arch_info_struct[] =
- N (22, bfd_mach_avr51, "avr:51", FALSE, & arch_info_struct[9]),
-
- /* 3-Byte PC. */
-- N (22, bfd_mach_avr6, "avr:6", FALSE, NULL)
-+ N (22, bfd_mach_avr6, "avr:6", FALSE, & arch_info_struct[10]),
-+
-+ /* Xmega 1 */
-+ N (24, bfd_mach_avrxmega1, "avr:101", FALSE, & arch_info_struct[11]),
-+
-+ /* Xmega 2 */
-+ N (24, bfd_mach_avrxmega2, "avr:102", FALSE, & arch_info_struct[12]),
-+
-+ /* Xmega 3 */
-+ N (24, bfd_mach_avrxmega3, "avr:103", FALSE, & arch_info_struct[13]),
-+
-+ /* Xmega 4 */
-+ N (24, bfd_mach_avrxmega4, "avr:104", FALSE, & arch_info_struct[14]),
-+
-+ /* Xmega 5 */
-+ N (24, bfd_mach_avrxmega5, "avr:105", FALSE, & arch_info_struct[15]),
-+
-+ /* Xmega 6 */
-+ N (24, bfd_mach_avrxmega6, "avr:106", FALSE, & arch_info_struct[16]),
-+
-+ /* Xmega 7 */
-+ N (24, bfd_mach_avrxmega7, "avr:107", FALSE, NULL)
-+
- };
-
- const bfd_arch_info_type bfd_avr_arch =
-diff --git a/bfd/elf32-avr.c b/bfd/elf32-avr.c
-index cc06360..62ce9fb 100644
---- a/bfd/elf32-avr.c
-+++ b/bfd/elf32-avr.c
-@@ -1328,6 +1328,34 @@ bfd_elf_avr_final_write_processing (bfd *abfd,
- case bfd_mach_avr6:
- val = E_AVR_MACH_AVR6;
- break;
-+
-+ case bfd_mach_avrxmega1:
-+ val = E_AVR_MACH_XMEGA1;
-+ break;
-+
-+ case bfd_mach_avrxmega2:
-+ val = E_AVR_MACH_XMEGA2;
-+ break;
-+
-+ case bfd_mach_avrxmega3:
-+ val = E_AVR_MACH_XMEGA3;
-+ break;
-+
-+ case bfd_mach_avrxmega4:
-+ val = E_AVR_MACH_XMEGA4;
-+ break;
-+
-+ case bfd_mach_avrxmega5:
-+ val = E_AVR_MACH_XMEGA5;
-+ break;
-+
-+ case bfd_mach_avrxmega6:
-+ val = E_AVR_MACH_XMEGA6;
-+ break;
-+
-+ case bfd_mach_avrxmega7:
-+ val = E_AVR_MACH_XMEGA7;
-+ break;
- }
-
- elf_elfheader (abfd)->e_machine = EM_AVR;
-@@ -1390,6 +1418,34 @@ elf32_avr_object_p (bfd *abfd)
- case E_AVR_MACH_AVR6:
- e_set = bfd_mach_avr6;
- break;
-+
-+ case E_AVR_MACH_XMEGA1:
-+ e_set = bfd_mach_avrxmega1;
-+ break;
-+
-+ case E_AVR_MACH_XMEGA2:
-+ e_set = bfd_mach_avrxmega2;
-+ break;
-+
-+ case E_AVR_MACH_XMEGA3:
-+ e_set = bfd_mach_avrxmega3;
-+ break;
-+
-+ case E_AVR_MACH_XMEGA4:
-+ e_set = bfd_mach_avrxmega4;
-+ break;
-+
-+ case E_AVR_MACH_XMEGA5:
-+ e_set = bfd_mach_avrxmega5;
-+ break;
-+
-+ case E_AVR_MACH_XMEGA6:
-+ e_set = bfd_mach_avrxmega6;
-+ break;
-+
-+ case E_AVR_MACH_XMEGA7:
-+ e_set = bfd_mach_avrxmega7;
-+ break;
- }
- }
- return bfd_default_set_arch_mach (abfd, bfd_arch_avr,
-diff --git a/gas/config/tc-avr.c b/gas/config/tc-avr.c
-index 6a1c7ea..184b028 100644
---- a/gas/config/tc-avr.c
-+++ b/gas/config/tc-avr.c
-@@ -30,18 +30,19 @@ struct avr_opcodes_s
- {
- char * name;
- char * constraints;
-+ char *opcode;
- int insn_size; /* In words. */
- int isa;
- unsigned int bin_opcode;
- };
-
- #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
--{#NAME, CONSTR, SIZE, ISA, BIN},
-+{#NAME, CONSTR, OPCODE, SIZE, ISA, BIN},
-
- struct avr_opcodes_s avr_opcodes[] =
- {
- #include "opcode/avr.h"
-- {NULL, NULL, 0, 0, 0}
-+ {NULL, NULL, NULL, 0, 0, 0}
- };
-
- const char comment_chars[] = ";";
-@@ -80,6 +81,13 @@ static struct mcu_type_s mcu_types[] =
- {"avr5", AVR_ISA_AVR51, bfd_mach_avr5},
- {"avr51", AVR_ISA_AVR51, bfd_mach_avr51},
- {"avr6", AVR_ISA_AVR6, bfd_mach_avr6},
-+ {"avrxmega1", AVR_ISA_XMEGA, bfd_mach_avrxmega1},
-+ {"avrxmega2", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
-+ {"avrxmega3", AVR_ISA_XMEGA, bfd_mach_avrxmega3},
-+ {"avrxmega4", AVR_ISA_XMEGA, bfd_mach_avrxmega4},
-+ {"avrxmega5", AVR_ISA_XMEGA, bfd_mach_avrxmega5},
-+ {"avrxmega6", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
-+ {"avrxmega7", AVR_ISA_XMEGA, bfd_mach_avrxmega7},
- {"at90s1200", AVR_ISA_1200, bfd_mach_avr1},
- {"attiny11", AVR_ISA_AVR1, bfd_mach_avr1},
- {"attiny12", AVR_ISA_AVR1, bfd_mach_avr1},
-@@ -216,6 +224,21 @@ static struct mcu_type_s mcu_types[] =
- {"m3001b", AVR_ISA_AVR51, bfd_mach_avr51},
- {"atmega2560", AVR_ISA_AVR6, bfd_mach_avr6},
- {"atmega2561", AVR_ISA_AVR6, bfd_mach_avr6},
-+ {"atxmega16a4", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
-+ {"atxmega16d4", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
-+ {"atxmega32a4", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
-+ {"atxmega32d4", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
-+ {"atxmega64a3", AVR_ISA_XMEGA, bfd_mach_avrxmega4},
-+ {"atxmega64d3", AVR_ISA_XMEGA, bfd_mach_avrxmega4},
-+ {"atxmega64a1", AVR_ISA_XMEGA, bfd_mach_avrxmega5},
-+ {"atxmega128a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
-+ {"atxmega128d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
-+ {"atxmega192a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
-+ {"atxmega192d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
-+ {"atxmega256a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
-+ {"atxmega256a3b",AVR_ISA_XMEGA, bfd_mach_avrxmega6},
-+ {"atxmega256d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
-+ {"atxmega128a1", AVR_ISA_XMEGA, bfd_mach_avrxmega7},
- {NULL, 0, 0}
- };
-
-@@ -393,6 +416,11 @@ md_show_usage (FILE *stream)
- " avr5 - enhanced AVR core with up to 64K program memory\n"
- " avr51 - enhanced AVR core with up to 128K program memory\n"
- " avr6 - enhanced AVR core with up to 256K program memory\n"
-+ " avrxmega3 - XMEGA, > 8K, <= 64K FLASH, > 64K RAM\n"
-+ " avrxmega4 - XMEGA, > 64K, <= 128K FLASH, <= 64K RAM\n"
-+ " avrxmega5 - XMEGA, > 64K, <= 128K FLASH, > 64K RAM\n"
-+ " avrxmega6 - XMEGA, > 128K, <= 256K FLASH, <= 64K RAM\n"
-+ " avrxmega7 - XMEGA, > 128K, <= 256K FLASH, > 64K RAM\n"
- " or immediate microcontroller name.\n"));
- fprintf (stream,
- _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n"
-@@ -820,7 +848,12 @@ avr_operand (struct avr_opcodes_s *opcode,
- if (*str == '+')
- {
- ++str;
-- op_mask |= 1;
-+ char *s;
-+ for (s = opcode->opcode; *s; ++s)
-+ {
-+ if (*s == '+')
-+ op_mask |= (1 << (15 - (s - opcode->opcode)));
-+ }
- }
-
- /* attiny26 can do "lpm" and "lpm r,Z" but not "lpm r,Z+". */
-@@ -937,6 +970,16 @@ avr_operand (struct avr_opcodes_s *opcode,
- }
- break;
-
-+ case 'E':
-+ {
-+ unsigned int x;
-+
-+ x = avr_get_constant (str, 15);
-+ str = input_line_pointer;
-+ op_mask |= (x << 4);
-+ }
-+ break;
-+
- case '?':
- break;
-
-diff --git a/gas/doc/c-avr.texi b/gas/doc/c-avr.texi
-index bc40a86..ba0927c 100644
---- a/gas/doc/c-avr.texi
-+++ b/gas/doc/c-avr.texi
-@@ -80,6 +80,27 @@ atmega128rfa1, at90can128, at90usb1286, at90usb1287, m3000f, m3000s, m3001b).
- Instruction set avr6 is for the enhanced AVR core with a 3-byte PC (MCU types:
- atmega2560, atmega2561).
-
-+Instruction set avrxmega2 is for the XMEGA AVR core with 8K to 64K program
-+memory space and less than 64K data space (MCU types: atxmega16a4, atxmega16d4,
-+atxmega32d4).
-+
-+Instruction set avrxmega3 is for the XMEGA AVR core with 8K to 64K program
-+memory space and greater than 64K data space (MCU types: atxmega32a4).
-+
-+Instruction set avrxmega4 is for the XMEGA AVR core with up to 64K program
-+memory space and less than 64K data space (MCU types: atxmega64a3, atxmega64d3).
-+
-+Instruction set avrxmega5 is for the XMEGA AVR core with up to 64K program
-+memory space and greater than 64K data space (MCU types: atxmega64a1).
-+
-+Instruction set avrxmega6 is for the XMEGA AVR core with up to 256K program
-+memory space and less than 64K data space (MCU types: atxmega128a3,
-+atxmega128d3, atxmega192a3, atxmega192d3, atxmega256a3, atxmega256a3b,
-+atxmega192d3).
-+
-+Instruction set avrxmega7 is for the XMEGA AVR core with up to 256K program
-+memory space and greater than 64K data space (MCU types: atxmega128a1).
-+
- @cindex @code{-mall-opcodes} command line option, AVR
- @item -mall-opcodes
- Accept all AVR opcodes, even if not supported by @code{-mmcu}.
-diff --git a/include/elf/avr.h b/include/elf/avr.h
-index 627dc35..e86eb11 100644
---- a/include/elf/avr.h
-+++ b/include/elf/avr.h
-@@ -40,6 +40,13 @@
- #define E_AVR_MACH_AVR5 5
- #define E_AVR_MACH_AVR51 51
- #define E_AVR_MACH_AVR6 6
-+#define E_AVR_MACH_XMEGA1 101
-+#define E_AVR_MACH_XMEGA2 102
-+#define E_AVR_MACH_XMEGA3 103
-+#define E_AVR_MACH_XMEGA4 104
-+#define E_AVR_MACH_XMEGA5 105
-+#define E_AVR_MACH_XMEGA6 106
-+#define E_AVR_MACH_XMEGA7 107
-
- /* Relocations. */
- START_RELOC_NUMBERS (elf_avr_reloc_type)
-diff --git a/include/opcode/avr.h b/include/opcode/avr.h
-index 15a034a..cff7b06 100644
---- a/include/opcode/avr.h
-+++ b/include/opcode/avr.h
-@@ -30,6 +30,8 @@
- #define AVR_ISA_BRK 0x0400 /* device has BREAK (on-chip debug) */
- #define AVR_ISA_EIND 0x0800 /* device has >128K program memory (none yet) */
- #define AVR_ISA_MOVW 0x1000 /* device has MOVW */
-+#define AVR_ISA_SPMX 0x2000 /* device has SPM Z[+] */
-+#define AVR_ISA_DES 0x4000 /* device has DES */
-
- #define AVR_ISA_TINY1 (AVR_ISA_1200 | AVR_ISA_LPM)
- #define AVR_ISA_2xxx (AVR_ISA_TINY1 | AVR_ISA_SRAM)
-@@ -48,6 +50,8 @@
- #define AVR_ISA_94K (AVR_ISA_M603 | AVR_ISA_MUL | AVR_ISA_MOVW | AVR_ISA_LPMX)
- #define AVR_ISA_M323 (AVR_ISA_M161 | AVR_ISA_BRK)
- #define AVR_ISA_M128 (AVR_ISA_M323 | AVR_ISA_ELPM | AVR_ISA_ELPMX)
-+#define AVR_ISA_M256 (AVR_ISA_M128 | AVR_ISA_EIND)
-+#define AVR_ISA_XMEGA (AVR_ISA_M256 | AVR_ISA_SPMX | AVR_ISA_DES)
-
- #define AVR_ISA_AVR1 AVR_ISA_TINY1
- #define AVR_ISA_AVR2 AVR_ISA_2xxx
-@@ -108,6 +112,7 @@
- L - signed pc relative offset from -2048 to 2047
- h - absolute code address (call, jmp)
- S - immediate value from 0 to 7 (S = s << 4)
-+ E - immediate value from 0 to 15, shifted left by 4 (des)
- ? - use this opcode entry if no parameters, else use next opcode entry
-
- Order is important - some binary opcodes have more than one name,
-@@ -168,7 +173,8 @@ AVR_INSN (reti, "", "1001010100011000", 1, AVR_ISA_1200, 0x9518)
- AVR_INSN (sleep,"", "1001010110001000", 1, AVR_ISA_1200, 0x9588)
- AVR_INSN (break,"", "1001010110011000", 1, AVR_ISA_BRK, 0x9598)
- AVR_INSN (wdr, "", "1001010110101000", 1, AVR_ISA_1200, 0x95a8)
--AVR_INSN (spm, "", "1001010111101000", 1, AVR_ISA_SPM, 0x95e8)
-+AVR_INSN (spm, "?", "1001010111101000", 1, AVR_ISA_SPM, 0x95e8)
-+AVR_INSN (spm, "z", "10010101111+1000", 1, AVR_ISA_SPMX, 0x95e8)
-
- AVR_INSN (adc, "r,r", "000111rdddddrrrr", 1, AVR_ISA_1200, 0x1c00)
- AVR_INSN (add, "r,r", "000011rdddddrrrr", 1, AVR_ISA_1200, 0x0c00)
-@@ -282,3 +288,6 @@ AVR_INSN (st, "e,r", "100!001rrrrree-+", 1, AVR_ISA_1200, 0x8200)
- AVR_INSN (eicall, "", "1001010100011001", 1, AVR_ISA_EIND, 0x9519)
- AVR_INSN (eijmp, "", "1001010000011001", 1, AVR_ISA_EIND, 0x9419)
-
-+/* DES instruction for encryption and decryption */
-+AVR_INSN (des, "E", "10010100EEEE1011", 1, AVR_ISA_DES, 0x940B)
-+
-diff --git a/ld/Makefile.am b/ld/Makefile.am
-index d8bd1f9..80b8f22 100644
---- a/ld/Makefile.am
-+++ b/ld/Makefile.am
-@@ -148,6 +148,13 @@ ALL_EMULATIONS = \
- eavr5.o \
- eavr51.o \
- eavr6.o \
-+ eavrxmega1.o \
-+ eavrxmega2.o \
-+ eavrxmega3.o \
-+ eavrxmega4.o \
-+ eavrxmega5.o \
-+ eavrxmega6.o \
-+ eavrxmega7.o \
- ecoff_i860.o \
- ecoff_sparc.o \
- eelf32_spu.o \
-@@ -727,6 +734,34 @@ eavr6.c: $(srcdir)/emulparams/avr6.sh $(srcdir)/emultempl/avrelf.em \
- $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
- ${GEN_DEPENDS}
- ${GENSCRIPTS} avr6 "$(tdir_avr2)"
-+eavrxmega1.c: $(srcdir)/emulparams/avrxmega1.sh \
-+ $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} avrxmega1 "$(tdir_avr2)"
-+eavrxmega2.c: $(srcdir)/emulparams/avrxmega2.sh \
-+ $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} avrxmega2 "$(tdir_avr2)"
-+eavrxmega3.c: $(srcdir)/emulparams/avrxmega3.sh \
-+ $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} avrxmega3 "$(tdir_avr2)"
-+eavrxmega4.c: $(srcdir)/emulparams/avrxmega4.sh \
-+ $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} avrxmega4 "$(tdir_avr2)"
-+eavrxmega5.c: $(srcdir)/emulparams/avrxmega5.sh \
-+ $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} avrxmega5 "$(tdir_avr2)"
-+eavrxmega6.c: $(srcdir)/emulparams/avrxmega6.sh \
-+ $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} avrxmega6 "$(tdir_avr2)"
-+eavrxmega7.c: $(srcdir)/emulparams/avrxmega7.sh \
-+ $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} avrxmega7 "$(tdir_avr2)"
- ecoff_i860.c: $(srcdir)/emulparams/coff_i860.sh \
- $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/i860coff.sc ${GEN_DEPENDS}
- ${GENSCRIPTS} coff_i860 "$(tdir_coff_i860)"
-diff --git a/ld/Makefile.in b/ld/Makefile.in
-index 3a8b4f5..2d5c8a0 100644
---- a/ld/Makefile.in
-+++ b/ld/Makefile.in
-@@ -434,6 +434,13 @@ ALL_EMULATIONS = \
- eavr5.o \
- eavr51.o \
- eavr6.o \
-+ eavrxmega1.o \
-+ eavrxmega2.o \
-+ eavrxmega3.o \
-+ eavrxmega4.o \
-+ eavrxmega5.o \
-+ eavrxmega6.o \
-+ eavrxmega7.o \
- ecoff_i860.o \
- ecoff_sparc.o \
- eelf32_spu.o \
-@@ -2069,6 +2076,34 @@ eavr6.c: $(srcdir)/emulparams/avr6.sh $(srcdir)/emultempl/avrelf.em \
- $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
- ${GEN_DEPENDS}
- ${GENSCRIPTS} avr6 "$(tdir_avr2)"
-+eavrxmega1.c: $(srcdir)/emulparams/avrxmega1.sh \
-+ $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} avrxmega1 "$(tdir_avr2)"
-+eavrxmega2.c: $(srcdir)/emulparams/avrxmega2.sh \
-+ $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} avrxmega2 "$(tdir_avr2)"
-+eavrxmega3.c: $(srcdir)/emulparams/avrxmega3.sh \
-+ $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} avrxmega3 "$(tdir_avr2)"
-+eavrxmega4.c: $(srcdir)/emulparams/avrxmega4.sh \
-+ $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} avrxmega4 "$(tdir_avr2)"
-+eavrxmega5.c: $(srcdir)/emulparams/avrxmega5.sh \
-+ $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} avrxmega5 "$(tdir_avr2)"
-+eavrxmega6.c: $(srcdir)/emulparams/avrxmega6.sh \
-+ $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} avrxmega6 "$(tdir_avr2)"
-+eavrxmega7.c: $(srcdir)/emulparams/avrxmega7.sh \
-+ $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} avrxmega7 "$(tdir_avr2)"
- ecoff_i860.c: $(srcdir)/emulparams/coff_i860.sh \
- $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/i860coff.sc ${GEN_DEPENDS}
- ${GENSCRIPTS} coff_i860 "$(tdir_coff_i860)"
-diff --git a/ld/configure.tgt b/ld/configure.tgt
-index d6d86ab..9ceefa5 100644
---- a/ld/configure.tgt
-+++ b/ld/configure.tgt
-@@ -110,7 +110,7 @@ xscale-*-coff) targ_emul=armcoff ;;
- xscale-*-elf) targ_emul=armelf
- ;;
- avr-*-*) targ_emul=avr2
-- targ_extra_emuls="avr1 avr25 avr3 avr31 avr35 avr4 avr5 avr51 avr6"
-+ targ_extra_emuls="avr1 avr25 avr3 avr31 avr35 avr4 avr5 avr51 avr6 avrxmega1 avrxmega2 avrxmega3 avrxmega4 avrxmega5 avrxmega6 avrxmega7"
- ;;
- bfin-*-elf) targ_emul=elf32bfin;
- targ_extra_emuls="elf32bfinfd"
-diff --git a/ld/emulparams/avrxmega1.sh b/ld/emulparams/avrxmega1.sh
-new file mode 100644
-index 0000000..95e8aac
---- /dev/null
-+++ b/ld/emulparams/avrxmega1.sh
-@@ -0,0 +1,12 @@
-+ARCH=avr:101
-+MACHINE=
-+SCRIPT_NAME=avr
-+OUTPUT_FORMAT="elf32-avr"
-+MAXPAGESIZE=1
-+EMBEDDED=yes
-+TEMPLATE_NAME=elf32
-+
-+TEXT_LENGTH=1024K
-+DATA_ORIGIN=0x802000
-+DATA_LENGTH=0xffa0
-+EXTRA_EM_FILE=avrelf
-diff --git a/ld/emulparams/avrxmega2.sh b/ld/emulparams/avrxmega2.sh
-new file mode 100644
-index 0000000..f282a69
---- /dev/null
-+++ b/ld/emulparams/avrxmega2.sh
-@@ -0,0 +1,12 @@
-+ARCH=avr:102
-+MACHINE=
-+SCRIPT_NAME=avr
-+OUTPUT_FORMAT="elf32-avr"
-+MAXPAGESIZE=1
-+EMBEDDED=yes
-+TEMPLATE_NAME=elf32
-+
-+TEXT_LENGTH=1024K
-+DATA_ORIGIN=0x802000
-+DATA_LENGTH=0xffa0
-+EXTRA_EM_FILE=avrelf
-diff --git a/ld/emulparams/avrxmega3.sh b/ld/emulparams/avrxmega3.sh
-new file mode 100644
-index 0000000..abaa5b3
---- /dev/null
-+++ b/ld/emulparams/avrxmega3.sh
-@@ -0,0 +1,12 @@
-+ARCH=avr:103
-+MACHINE=
-+SCRIPT_NAME=avr
-+OUTPUT_FORMAT="elf32-avr"
-+MAXPAGESIZE=1
-+EMBEDDED=yes
-+TEMPLATE_NAME=elf32
-+
-+TEXT_LENGTH=1024K
-+DATA_ORIGIN=0x802000
-+DATA_LENGTH=0xffa0
-+EXTRA_EM_FILE=avrelf
-diff --git a/ld/emulparams/avrxmega4.sh b/ld/emulparams/avrxmega4.sh
-new file mode 100644
-index 0000000..829c8b7
---- /dev/null
-+++ b/ld/emulparams/avrxmega4.sh
-@@ -0,0 +1,12 @@
-+ARCH=avr:104
-+MACHINE=
-+SCRIPT_NAME=avr
-+OUTPUT_FORMAT="elf32-avr"
-+MAXPAGESIZE=1
-+EMBEDDED=yes
-+TEMPLATE_NAME=elf32
-+
-+TEXT_LENGTH=1024K
-+DATA_ORIGIN=0x802000
-+DATA_LENGTH=0xffa0
-+EXTRA_EM_FILE=avrelf
-diff --git a/ld/emulparams/avrxmega5.sh b/ld/emulparams/avrxmega5.sh
-new file mode 100644
-index 0000000..0a09aee
---- /dev/null
-+++ b/ld/emulparams/avrxmega5.sh
-@@ -0,0 +1,12 @@
-+ARCH=avr:105
-+MACHINE=
-+SCRIPT_NAME=avr
-+OUTPUT_FORMAT="elf32-avr"
-+MAXPAGESIZE=1
-+EMBEDDED=yes
-+TEMPLATE_NAME=elf32
-+
-+TEXT_LENGTH=1024K
-+DATA_ORIGIN=0x802000
-+DATA_LENGTH=0xffa0
-+EXTRA_EM_FILE=avrelf
-diff --git a/ld/emulparams/avrxmega6.sh b/ld/emulparams/avrxmega6.sh
-new file mode 100644
-index 0000000..3c3a468
---- /dev/null
-+++ b/ld/emulparams/avrxmega6.sh
-@@ -0,0 +1,12 @@
-+ARCH=avr:106
-+MACHINE=
-+SCRIPT_NAME=avr
-+OUTPUT_FORMAT="elf32-avr"
-+MAXPAGESIZE=1
-+EMBEDDED=yes
-+TEMPLATE_NAME=elf32
-+
-+TEXT_LENGTH=1024K
-+DATA_ORIGIN=0x802000
-+DATA_LENGTH=0xffa0
-+EXTRA_EM_FILE=avrelf
-diff --git a/ld/emulparams/avrxmega7.sh b/ld/emulparams/avrxmega7.sh
-new file mode 100644
-index 0000000..b84a0ba
---- /dev/null
-+++ b/ld/emulparams/avrxmega7.sh
-@@ -0,0 +1,12 @@
-+ARCH=avr:107
-+MACHINE=
-+SCRIPT_NAME=avr
-+OUTPUT_FORMAT="elf32-avr"
-+MAXPAGESIZE=1
-+EMBEDDED=yes
-+TEMPLATE_NAME=elf32
-+
-+TEXT_LENGTH=1024K
-+DATA_ORIGIN=0x802000
-+DATA_LENGTH=0xffa0
-+EXTRA_EM_FILE=avrelf
-diff --git a/ld/emultempl/avrelf.em b/ld/emultempl/avrelf.em
-index f0807dd..e328c77 100644
---- a/ld/emultempl/avrelf.em
-+++ b/ld/emultempl/avrelf.em
-@@ -71,8 +71,10 @@ avr_elf_${EMULATION_NAME}_before_allocation (void)
-
- gld${EMULATION_NAME}_before_allocation ();
-
-- /* We only need stubs for the avr6 family. */
-- if (strcmp ("${EMULATION_NAME}","avr6"))
-+ /* We only need stubs for avr6, avrxmega6, and avrxmega7. */
-+ if (strcmp ("${EMULATION_NAME}","avr6")
-+ && strcmp ("${EMULATION_NAME}","avrxmega6")
-+ && strcmp ("${EMULATION_NAME}","avrxmega7") )
- avr_no_stubs = TRUE;
-
- avr_elf_set_global_bfd_parameters ();
-diff --git a/opcodes/avr-dis.c b/opcodes/avr-dis.c
-index 976c371..e3ff59c 100644
---- a/opcodes/avr-dis.c
-+++ b/opcodes/avr-dis.c
-@@ -50,7 +50,7 @@ static const char * comment_start = "0x";
-
- static int
- avr_operand (unsigned int insn, unsigned int insn2, unsigned int pc, int constraint,
-- char *buf, char *comment, int regs, int *sym, bfd_vma *sym_addr)
-+ char *opcode_str, char *buf, char *comment, int regs, int *sym, bfd_vma *sym_addr)
- {
- int ok = 1;
- *sym = 0;
-@@ -118,8 +118,18 @@ avr_operand (unsigned int insn, unsigned int insn2, unsigned int pc, int constra
-
- case 'z':
- *buf++ = 'Z';
-- if (insn & 0x1)
-+
-+ /* Check for post-increment. */
-+ char *s;
-+ for (s = opcode_str; *s; ++s)
-+ {
-+ if (*s == '+')
-+ {
- *buf++ = '+';
-+ break;
-+ }
-+ }
-+
- *buf = '\0';
- if (AVR_UNDEF_P (insn))
- sprintf (comment, _("undefined"));
-@@ -227,6 +237,10 @@ avr_operand (unsigned int insn, unsigned int insn2, unsigned int pc, int constra
- }
- break;
-
-+ case 'E':
-+ sprintf (buf, "%d", (insn >> 4) & 15);
-+ break;
-+
- case '?':
- *buf = '\0';
- break;
-@@ -331,7 +345,8 @@ print_insn_avr (bfd_vma addr, disassemble_info *info)
-
- if (opcode->name)
- {
-- char *op = opcode->constraints;
-+ char *constraints = opcode->constraints;
-+ char *opcode_str = opcode->opcode;
-
- insn2 = 0;
- ok = 1;
-@@ -342,14 +357,14 @@ print_insn_avr (bfd_vma addr, disassemble_info *info)
- cmd_len = 4;
- }
-
-- if (*op && *op != '?')
-+ if (*constraints && *constraints != '?')
- {
-- int regs = REGISTER_P (*op);
-+ int regs = REGISTER_P (*constraints);
-
-- ok = avr_operand (insn, insn2, addr, *op, op1, comment1, 0, &sym_op1, &sym_addr1);
-+ ok = avr_operand (insn, insn2, addr, *constraints, opcode_str, op1, comment1, 0, &sym_op1, &sym_addr1);
-
-- if (ok && *(++op) == ',')
-- ok = avr_operand (insn, insn2, addr, *(++op), op2,
-+ if (ok && *(++constraints) == ',')
-+ ok = avr_operand (insn, insn2, addr, *(++constraints), opcode_str, op2,
- *comment1 ? comment2 : comment1, regs, &sym_op2, &sym_addr2);
- }
- }
---
-1.6.0.4
-
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-23 07:56:59 +0000