summaryrefslogblamecommitdiffstats
path: root/dts/src/arm64/sprd/sharkl64.dtsi
blob: 69f64e7fce7c4b7d7b4ab9a30f58ac4d5ce6fd22 (plain) (tree)
































































                                                                
/*
 * Spreadtrum Sharkl64 platform DTS file
 *
 * Copyright (C) 2014, Spreadtrum Communications Inc.
 *
 * This file is licensed under a dual GPLv2 or X11 license.
 */

/ {
	interrupt-parent = <&gic>;
	#address-cells = <2>;
	#size-cells = <2>;

	soc {
		compatible = "simple-bus";
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		ap-apb {
			compatible = "simple-bus";
			#address-cells = <2>;
			#size-cells = <2>;
			ranges;

			uart0: serial@70000000 {
				compatible = "sprd,sc9836-uart";
				reg = <0 0x70000000 0 0x100>;
				interrupts = <0 2 0xf04>;
				clocks = <&clk26mhz>;
				status = "disabled";
			};

			uart1: serial@70100000 {
				compatible = "sprd,sc9836-uart";
				reg = <0 0x70100000 0 0x100>;
				interrupts = <0 3 0xf04>;
				clocks = <&clk26mhz>;
				status = "disabled";
			};

			uart2: serial@70200000 {
				compatible = "sprd,sc9836-uart";
				reg = <0 0x70200000 0 0x100>;
				interrupts = <0 4 0xf04>;
				clocks = <&clk26mhz>;
				status = "disabled";
			};

			uart3: serial@70300000 {
				compatible = "sprd,sc9836-uart";
				reg = <0 0x70300000 0 0x100>;
				interrupts = <0 5 0xf04>;
				clocks = <&clk26mhz>;
				status = "disabled";
			};
		};
	};

	clk26mhz: clk26mhz {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <26000000>;
	};
};