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author | Sascha Hauer <s.hauer@pengutronix.de> | 2022-11-23 08:22:09 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2022-11-23 08:22:09 +0100 |
commit | 4577982e48f853a29581726d332a7f7ea032a875 (patch) | |
tree | 3e7d18995344858344364fe1d24482b871f8ad01 | |
parent | af3ab6492459a70f9fe572c3a42e6cdb6cbc44c4 (diff) | |
download | barebox-4577982e48f853a29581726d332a7f7ea032a875.tar.gz barebox-4577982e48f853a29581726d332a7f7ea032a875.tar.xz |
dts: update to v6.1-rc5
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r-- | dts/Bindings/hwlock/qcom-hwspinlock.yaml | 29 | ||||
-rw-r--r-- | dts/Bindings/net/engleder,tsnep.yaml | 2 | ||||
-rw-r--r-- | dts/src/riscv/sifive/hifive-unleashed-a00.dts | 38 |
3 files changed, 60 insertions, 9 deletions
diff --git a/dts/Bindings/hwlock/qcom-hwspinlock.yaml b/dts/Bindings/hwlock/qcom-hwspinlock.yaml index 1c7149f7d1..ee2726149c 100644 --- a/dts/Bindings/hwlock/qcom-hwspinlock.yaml +++ b/dts/Bindings/hwlock/qcom-hwspinlock.yaml @@ -15,9 +15,22 @@ description: properties: compatible: - enum: - - qcom,sfpb-mutex - - qcom,tcsr-mutex + oneOf: + - enum: + - qcom,sfpb-mutex + - qcom,tcsr-mutex + - items: + - enum: + - qcom,apq8084-tcsr-mutex + - qcom,ipq6018-tcsr-mutex + - qcom,msm8226-tcsr-mutex + - qcom,msm8994-tcsr-mutex + - const: qcom,tcsr-mutex + - items: + - enum: + - qcom,msm8974-tcsr-mutex + - const: qcom,tcsr-mutex + - const: syscon reg: maxItems: 1 @@ -34,9 +47,9 @@ additionalProperties: false examples: - | - tcsr_mutex: hwlock@1f40000 { - compatible = "qcom,tcsr-mutex"; - reg = <0x01f40000 0x40000>; - #hwlock-cells = <1>; - }; + hwlock@1f40000 { + compatible = "qcom,tcsr-mutex"; + reg = <0x01f40000 0x40000>; + #hwlock-cells = <1>; + }; ... diff --git a/dts/Bindings/net/engleder,tsnep.yaml b/dts/Bindings/net/engleder,tsnep.yaml index 5bd964a46a..a6921e805e 100644 --- a/dts/Bindings/net/engleder,tsnep.yaml +++ b/dts/Bindings/net/engleder,tsnep.yaml @@ -47,7 +47,7 @@ properties: nvmem-cells: true - nvmem-cells-names: true + nvmem-cell-names: true phy-connection-type: enum: diff --git a/dts/src/riscv/sifive/hifive-unleashed-a00.dts b/dts/src/riscv/sifive/hifive-unleashed-a00.dts index ced0d4e479..900a50526d 100644 --- a/dts/src/riscv/sifive/hifive-unleashed-a00.dts +++ b/dts/src/riscv/sifive/hifive-unleashed-a00.dts @@ -3,6 +3,8 @@ #include "fu540-c000.dtsi" #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/leds/common.h> +#include <dt-bindings/pwm/pwm.h> /* Clock frequency (in Hz) of the PCB crystal for rtcclk */ #define RTCCLK_FREQ 1000000 @@ -42,6 +44,42 @@ compatible = "gpio-restart"; gpios = <&gpio 10 GPIO_ACTIVE_LOW>; }; + + led-controller { + compatible = "pwm-leds"; + + led-d1 { + pwms = <&pwm0 0 7812500 PWM_POLARITY_INVERTED>; + active-low; + color = <LED_COLOR_ID_GREEN>; + max-brightness = <255>; + label = "d1"; + }; + + led-d2 { + pwms = <&pwm0 1 7812500 PWM_POLARITY_INVERTED>; + active-low; + color = <LED_COLOR_ID_GREEN>; + max-brightness = <255>; + label = "d2"; + }; + + led-d3 { + pwms = <&pwm0 2 7812500 PWM_POLARITY_INVERTED>; + active-low; + color = <LED_COLOR_ID_GREEN>; + max-brightness = <255>; + label = "d3"; + }; + + led-d4 { + pwms = <&pwm0 3 7812500 PWM_POLARITY_INVERTED>; + active-low; + color = <LED_COLOR_ID_GREEN>; + max-brightness = <255>; + label = "d4"; + }; + }; }; &uart0 { |