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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2019-03-25 15:09:32 +0530 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2019-11-27 12:17:15 +0100 |
| commit | 551c5ee7f156e6a54817d75d158f29f86892047b (patch) | |
| tree | 8c47036dccd73564370e68e4dd8eb22f80d8e23b | |
| parent | 3d8eb585b2feb8431a9b13d063cdb3912ab352fa (diff) | |
| download | barebox-551c5ee7f156e6a54817d75d158f29f86892047b.tar.gz barebox-551c5ee7f156e6a54817d75d158f29f86892047b.tar.xz | |
PCI: dwc: Fix ATU identification for designware version >= 4.80
Port of Linux commit 2aadcb0cd39198833fabe1c45084f78686e71a6c
Synopsys designware version >= 4.80 uses a separate register space
for programming ATU. The current code identifies if there exists a
separate register space by accessing the register address of ATUs
in designware version < 4.80. Accessing this address results in
abort in the case of K2G.
Fix it here by adding "version" member to struct dw_pcie. This should be
set by platform specific drivers and designware core will use it to
identify if the platform has a separate ATU space. For platforms which
have not populated the version member, the old method of identification
will still be used.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| -rw-r--r-- | drivers/pci/pcie-designware.c | 14 | ||||
| -rw-r--r-- | drivers/pci/pcie-designware.h | 1 |
2 files changed, 9 insertions, 6 deletions
diff --git a/drivers/pci/pcie-designware.c b/drivers/pci/pcie-designware.c index 91aac8dec0..f9a759b8fd 100644 --- a/drivers/pci/pcie-designware.c +++ b/drivers/pci/pcie-designware.c @@ -257,13 +257,15 @@ void dw_pcie_setup(struct dw_pcie *pci) struct device_d *dev = pci->dev; struct device_node *np = dev->device_node; - /* Get iATU unroll support */ - pci->iatu_unroll_enabled = dw_pcie_iatu_unroll_enabled(pci); - dev_dbg(pci->dev, "iATU unroll: %s\n", - pci->iatu_unroll_enabled ? "enabled" : "disabled"); + if (pci->version >= 0x480A || (!pci->version && + dw_pcie_iatu_unroll_enabled(pci))) { + pci->iatu_unroll_enabled = true; + if (!pci->atu_base) + pci->atu_base = pci->dbi_base + DEFAULT_DBI_ATU_OFFSET; + } + dev_dbg(pci->dev, "iATU unroll: %s\n", pci->iatu_unroll_enabled ? + "enabled" : "disabled"); - if (pci->iatu_unroll_enabled && !pci->atu_base) - pci->atu_base = pci->dbi_base + DEFAULT_DBI_ATU_OFFSET; ret = of_property_read_u32(np, "num-lanes", &lanes); if (ret) diff --git a/drivers/pci/pcie-designware.h b/drivers/pci/pcie-designware.h index 30bdc0ed6e..8cd48a27c1 100644 --- a/drivers/pci/pcie-designware.h +++ b/drivers/pci/pcie-designware.h @@ -164,6 +164,7 @@ struct dw_pcie { u8 iatu_unroll_enabled; struct pcie_port pp; const struct dw_pcie_ops *ops; + unsigned int version; }; #define to_dw_pcie_from_pp(port) container_of((port), struct dw_pcie, pp) |