Merge branch 'for-next/imx'

28 files changed, 536 insertions, 382 deletions

diff --git a/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c b/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c
index 9d060fb589..101ce607a5 100644
--- a/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c
+++ b/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c
@@ -1,13 +1,4 @@
-/*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License for more details.
- */
+// SPDX-License-Identifier: GPL-2.0
 
 #include <common.h>
 #include <linux/sizes.h>
@@ -51,39 +42,24 @@ static void setup_uart(void)
 	putc_ll('>');
 }
 
-static void nxp_imx8mq_evk_sram_setup(void)
-{
-	ddr_init();
-}
-
 /*
  * Power-on execution flow of start_nxp_imx8mq_evk() might not be
  * obvious for a very first read, so here's, hopefully helpful,
  * summary:
  *
  * 1. MaskROM uploads PBL into OCRAM and that's where this function is
- *    executed for the first time
- *
- * 2. DDR is initialized and the TF-A trampoline is installed in the
- *    DRAM.
+ *    executed for the first time. At entry the exception level is EL3.
  *
- * 3. TF-A is executed and exits into the trampoline in RAM, which enters the
- *    PBL for the second time. DRAM setup done is indicated by a one in register
- *    x0 by the trampoline
+ * 2. DDR is initialized and the image is loaded from storage into DRAM. The PBL
+ *    part is copied from OCRAM to the TF-A return address in DRAM.
  *
- * 4. The piggydata is loaded from the SD card and copied to the expected
- *    location in the DRAM.
+ * 3. TF-A is executed and exits into the PBL code in DRAM. TF-A has taken us
+ *    from EL3 to EL2.
  *
- * 5. Standard barebox boot flow continues
+ * 4. Standard barebox boot flow continues
  */
 static __noreturn noinline void nxp_imx8mq_evk_start(void)
 {
-	enum bootsource src = BOOTSOURCE_UNKNOWN;
-	int instance = BOOTSOURCE_INSTANCE_UNKNOWN;
-	int ret = -ENOTSUPP;
-	const u8 *bl31;
-	size_t bl31_size;
-
 	if (IS_ENABLED(CONFIG_DEBUG_LL))
 		setup_uart();
 
@@ -93,23 +69,35 @@ static __noreturn noinline void nxp_imx8mq_evk_start(void)
 	 * to DRAM in EL2.
 	 */
 	if (current_el() == 3) {
-		nxp_imx8mq_evk_sram_setup();
-		get_builtin_firmware(imx8mq_bl31_bin, &bl31, &bl31_size);
+		enum bootsource src = BOOTSOURCE_UNKNOWN;
+		int instance = BOOTSOURCE_INSTANCE_UNKNOWN;
+		int ret = -ENOTSUPP;
+		size_t bl31_size;
+		const u8 *bl31;
+
+		ddr_init();
+
 		/*
-		 * On completion the TF-A will jump to MX8MQ_ATF_BL33_BASE_ADDR in
-		 * EL2. Copy ourselves there.
+		 * On completion the TF-A will jump to MX8MQ_ATF_BL33_BASE_ADDR
+		 * in EL2. Copy the image there, but replace the PBL part of
+		 * that image with ourselves. On a high assurance boot only the
+		 * currently running code is validated and contains the checksum
+		 * for the piggy data, so we need to ensure that we are running
+		 * the same code in DRAM.
 		 */
-		memcpy((void *)MX8MQ_ATF_BL33_BASE_ADDR, _text, __bss_start - _text);
+		imx8_get_boot_source(&src, &instance);
+		if (src == BOOTSOURCE_MMC)
+			ret = imx8_esdhc_load_image(instance, false);
+		BUG_ON(ret);
+
+		memcpy((void *)MX8MQ_ATF_BL33_BASE_ADDR,
+		       __image_start, barebox_pbl_size);
+
+		get_builtin_firmware(imx8mq_bl31_bin, &bl31, &bl31_size);
 		imx8mq_atf_load_bl31(bl31, bl31_size);
 		/* not reached */
 	}
 
-	imx8_get_boot_source(&src, &instance);
-
-	if (src == BOOTSOURCE_MMC)
-		ret = imx8_esdhc_load_piggy(instance);
-	else
-		BUG_ON(ret);
 	/*
 	 * Standard entry we hit once we initialized both DDR and ATF
 	 */
diff --git a/arch/arm/boards/phytec-som-imx6/lowlevel.c b/arch/arm/boards/phytec-som-imx6/lowlevel.c
index 2de84169c6..900aa19c19 100644
--- a/arch/arm/boards/phytec-som-imx6/lowlevel.c
+++ b/arch/arm/boards/phytec-som-imx6/lowlevel.c
@@ -90,9 +90,9 @@ static void __noreturn start_imx6_phytec_common(uint32_t size,
 					 __dtb_##fdt_name##_start);	\
 	}
 
-PHYTEC_ENTRY(start_phytec_pbaa03_1gib, imx6q_phytec_pbaa03, SZ_1G, true);
-PHYTEC_ENTRY(start_phytec_pbaa03_1gib_1bank, imx6q_phytec_pbaa03, SZ_1G, true);
-PHYTEC_ENTRY(start_phytec_pbaa03_2gib, imx6q_phytec_pbaa03, SZ_2G, true);
+PHYTEC_ENTRY(start_phytec_phycard_imx6q_1gib, imx6q_phytec_phycard, SZ_1G, true);
+PHYTEC_ENTRY(start_phytec_phycard_imx6q_1gib_1bank, imx6q_phytec_phycard, SZ_1G, true);
+PHYTEC_ENTRY(start_phytec_phycard_imx6q_2gib, imx6q_phytec_phycard, SZ_2G, true);
 
 PHYTEC_ENTRY(start_phytec_pbab01_512mb_1bank, imx6q_phytec_pbab01, SZ_512M, true);
 PHYTEC_ENTRY(start_phytec_pbab01_1gib, imx6q_phytec_pbab01, SZ_1G, true);
diff --git a/arch/arm/boards/phytec-som-imx8mq/lowlevel.c b/arch/arm/boards/phytec-som-imx8mq/lowlevel.c
index 4e52b92ad3..4cacabb1fb 100644
--- a/arch/arm/boards/phytec-som-imx8mq/lowlevel.c
+++ b/arch/arm/boards/phytec-som-imx8mq/lowlevel.c
@@ -56,7 +56,7 @@ static void phytec_imx8mq_som_sram_setup(void)
 	imx8_get_boot_source(&src, &instance);
 
 	if (src == BOOTSOURCE_MMC)
-		ret = imx8_esdhc_start_image(instance);
+		ret = imx8_esdhc_load_image(instance, true);
 
 	BUG_ON(ret);
 }
diff --git a/arch/arm/boards/zii-common/board.c b/arch/arm/boards/zii-common/board.c
index eafb5a3aa8..7bd3a6cabc 100644
--- a/arch/arm/boards/zii-common/board.c
+++ b/arch/arm/boards/zii-common/board.c
@@ -13,11 +13,12 @@
  */
 
 #include <common.h>
+#include <fs.h>
 #include <globalvar.h>
 #include <init.h>
-#include <fs.h>
-#include <net.h>
 #include <linux/nvmem-consumer.h>
+#include <net.h>
+#include <restart.h>
 
 static int rdu_eth_register_ethaddr(struct device_node *np)
 {
@@ -129,6 +130,9 @@ static int rdu_i210_invm(void)
 	val = I210_CFGWORD_PCIID_157B;
 	pwrite(fd, &val, sizeof(val), 0);
 
+	shutdown_barebox();
+	restart_machine();
+
 	return 0;
 }
 late_initcall(rdu_i210_invm);
diff --git a/arch/arm/boards/zii-imx51-rdu1/Makefile b/arch/arm/boards/zii-imx51-rdu1/Makefile
index 01c7a259e9..7f2569bda3 100644
--- a/arch/arm/boards/zii-imx51-rdu1/Makefile
+++ b/arch/arm/boards/zii-imx51-rdu1/Makefile
@@ -1,2 +1,3 @@
 obj-y += board.o
 lwl-y += lowlevel.o
+bbenv-y += defaultenv-rdu1
diff --git a/arch/arm/boards/zii-imx51-rdu1/board.c b/arch/arm/boards/zii-imx51-rdu1/board.c
index f739f3b7b4..640bb0d1b7 100644
--- a/arch/arm/boards/zii-imx51-rdu1/board.c
+++ b/arch/arm/boards/zii-imx51-rdu1/board.c
@@ -16,6 +16,7 @@
  */
 
 #include <common.h>
+#include <envfs.h>
 #include <init.h>
 #include <environment.h>
 #include <mach/bbu.h>
@@ -49,6 +50,8 @@ static int zii_rdu1_init(void)
 		BBU_HANDLER_FLAG_DEFAULT |
 		IMX_BBU_FLAG_PARTITION_STARTS_AT_HEADER);
 
+	defaultenv_append_directory(defaultenv_rdu1);
+
 	return 0;
 }
 coredevice_initcall(zii_rdu1_init);
diff --git a/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/boot/net b/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/boot/net
new file mode 100644
index 0000000000..4be8e1e2d7
--- /dev/null
+++ b/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/boot/net
@@ -0,0 +1,24 @@
+#!/bin/sh
+
+path="/mnt/tftp"
+
+# clear seat network config
+global.linux.bootargs.rdu_network=
+
+global.bootm.image="${path}/${global.user}-linux-${global.hostname}"
+
+oftree="${path}/${global.user}-oftree-${global.hostname}"
+if [ -f "${oftree}" ]; then
+	global.bootm.oftree="$oftree"
+fi
+
+nfsroot="/home/${global.user}/nfsroot/${global.hostname}"
+
+ip_route_get -b ${global.net.server} global.linux.bootargs.dyn.ip
+
+initramfs="${path}/${global.user}-initramfs-${global.hostname}"
+if [ -f "${initramfs}" ]; then
+	global.bootm.initrd="$initramfs"
+else
+	global.linux.bootargs.dyn.root="root=/dev/nfs nfsroot=$nfsroot,v3,tcp"
+fi
diff --git a/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/boot/nfs b/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/boot/nfs
new file mode 100644
index 0000000000..0a2fa07b16
--- /dev/null
+++ b/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/boot/nfs
@@ -0,0 +1,6 @@
+#!/bin/sh
+
+# clear seat network config (not implemented on RDU1 yet)
+#global.linux.bootargs.rdu_network=
+
+boot /mnt/nfs
diff --git a/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/boot/rdu-default b/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/boot/rdu-default
new file mode 100644
index 0000000000..97cc1dcdea
--- /dev/null
+++ b/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/boot/rdu-default
@@ -0,0 +1,14 @@
+#!/bin/sh
+
+sp.usb_power=1
+usb
+if [ "$bootsource" = "spi" ]; then
+	boot disk1.0 || boot disk2.0
+else
+	detect mmc0
+	if [ "$mmc0.boot" = "boot0" ]; then
+		boot mmc0.0
+	else
+		boot mmc0.1
+	fi
+fi
diff --git a/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/network/eth0-discover b/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/network/eth0-discover
new file mode 100644
index 0000000000..ce35613ef1
--- /dev/null
+++ b/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/network/eth0-discover
@@ -0,0 +1,4 @@
+#!/bin/sh
+
+sp.usb_power=1
+usb
diff --git a/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/nv/autoboot_abort_key b/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/nv/autoboot_abort_key
new file mode 100644
index 0000000000..55920c9a58
--- /dev/null
+++ b/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/nv/autoboot_abort_key
@@ -0,0 +1 @@
+ctrl-c
\ No newline at end of file
diff --git a/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/nv/boot.default b/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/nv/boot.default
new file mode 100644
index 0000000000..9076a1e64e
--- /dev/null
+++ b/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/nv/boot.default
@@ -0,0 +1 @@
+rdu-default
\ No newline at end of file
diff --git a/arch/arm/boards/zii-imx6q-rdu2/board.c b/arch/arm/boards/zii-imx6q-rdu2/board.c
index 63367a419a..d41609bfae 100644
--- a/arch/arm/boards/zii-imx6q-rdu2/board.c
+++ b/arch/arm/boards/zii-imx6q-rdu2/board.c
@@ -1,3 +1,4 @@
+
 /*
  * Copyright (C) 2016 Zodiac Inflight Innovation
  * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
@@ -161,7 +162,7 @@ device_initcall(rdu2_devices_init);
 
 static int rdu2_fixup_egalax_ts(struct device_node *root, void *context)
 {
-	struct device_node *np;
+	struct device_node *np, *aliases;
 
 	/*
 	 * The 32" unit has a EETI eGalax touchscreen instead of the
@@ -180,8 +181,12 @@ static int rdu2_fixup_egalax_ts(struct device_node *root, void *context)
 		return -ENODEV;
 
 	of_device_enable(np);
-	of_property_write_u32(np->parent, "clock-frequency", 200000);
 
+	aliases = of_find_node_by_path_from(root, "/aliases");
+	if (!aliases)
+		return -ENODEV;
+
+	of_property_write_string(aliases, "touchscreen0", np->full_name);
 
 	return 0;
 }
diff --git a/arch/arm/boards/zii-imx6q-rdu2/defaultenv-rdu2/boot/rdu-default b/arch/arm/boards/zii-imx6q-rdu2/defaultenv-rdu2/boot/rdu-default
index f391d91eba..e3406d5543 100644
--- a/arch/arm/boards/zii-imx6q-rdu2/defaultenv-rdu2/boot/rdu-default
+++ b/arch/arm/boards/zii-imx6q-rdu2/defaultenv-rdu2/boot/rdu-default
@@ -2,6 +2,10 @@
 
 backlight0.brightness=0
 if [ "$bootsource" = "spi-nor" ]; then
+	echo Boot source is SPI NOR, booting SD card firmware with rootfs on SD card
+	boot mmc1
+elif [ "$bootsource" = "mmc" ] && [ "$bootsource_instance" = "1" ]; then
+	echo Boot source is SD card, booting SD card firmware with rootfs on SD card
 	boot mmc1
 else
 	detect mmc3
diff --git a/arch/arm/boards/zii-imx8mq-dev/board.c b/arch/arm/boards/zii-imx8mq-dev/board.c
index 144adb9cef..ac455990b0 100644
--- a/arch/arm/boards/zii-imx8mq-dev/board.c
+++ b/arch/arm/boards/zii-imx8mq-dev/board.c
@@ -11,6 +11,15 @@
 #include <asm/memory.h>
 #include <linux/sizes.h>
 #include <mach/bbu.h>
+#include "../zii-common/pn-fixup.h"
+
+#define LRU_FLAG_EGALAX		BIT(0)
+#define LRU_FLAG_NO_DEB		BIT(1)
+
+struct zii_imx8mq_dev_lru_fixup {
+	struct zii_pn_fixup fixup;
+	unsigned int flags;
+};
 
 static int zii_imx8mq_dev_init(void)
 {
@@ -19,7 +28,8 @@ static int zii_imx8mq_dev_init(void)
 
 	barebox_set_hostname("imx8mq-zii-rdu3");
 
-	imx8mq_bbu_internal_mmcboot_register_handler("eMMC", "/dev/mmc0", 0);
+	imx8mq_bbu_internal_mmcboot_register_handler("eMMC", "/dev/mmc0",
+						     BBU_HANDLER_FLAG_DEFAULT);
 
 	if (bootsource_get_instance() == 0)
 		of_device_enable_path("/chosen/environment-emmc");
@@ -31,3 +41,149 @@ static int zii_imx8mq_dev_init(void)
 	return 0;
 }
 device_initcall(zii_imx8mq_dev_init);
+
+static int zii_imx8mq_dev_fixup_egalax_ts(struct device_node *root, void *ctx)
+{
+	struct device_node *np, * aliases;
+
+	/*
+	 * The 27" unit has a EETI eGalax touchscreen instead of the
+	 * Synaptics RMI4 found on other units.
+	 */
+	pr_info("Enabling eGalax touchscreen instead of RMI4\n");
+
+	np = of_find_compatible_node(root, NULL, "syna,rmi4-i2c");
+	if (!np)
+		return -ENODEV;
+
+	of_device_disable(np);
+
+	np = of_find_compatible_node(root, NULL, "eeti,exc3000");
+	if (!np)
+		return -ENODEV;
+
+	of_device_enable(np);
+
+	aliases = of_find_node_by_path_from(root, "/aliases");
+	if (!aliases)
+		return -ENODEV;
+
+	of_property_write_string(aliases, "touchscreen0", np->full_name);
+
+	return 0;
+}
+
+static int zii_imx8mq_dev_fixup_deb_internal(void)
+{
+	struct device_node *np, *aliases;
+	struct device_d *dev;
+
+	/*
+	 * In the internal DT remove the complete FEC hierarchy and move the
+	 * i210 to be the eth0 interface to allow network boot to work without
+	 * rewriting all the boot scripts.
+	 */
+	aliases = of_find_node_by_path("/aliases");
+	if (!aliases)
+		return -ENODEV;
+
+	np = of_find_compatible_node(NULL, NULL, "fsl,imx8mq-fec");
+	if (!np)
+		return -ENODEV;
+
+	of_device_disable(np);
+
+	of_property_write_string(aliases, "ethernet1", np->full_name);
+
+	dev = of_find_device_by_node(np);
+	if (!dev)
+		return -ENODEV;
+
+	unregister_device(dev);
+
+	np = of_find_node_by_name(NULL, "i210@0");
+	if (!np)
+		return -ENODEV;
+
+	of_property_write_string(aliases, "ethernet0", np->full_name);
+
+	/* Refresh the internal aliases list from the patched DT */
+	of_alias_scan();
+
+	return 0;
+}
+
+static int zii_imx8mq_dev_fixup_deb(struct device_node *root, void *ctx)
+{
+	struct device_node *np, *aliases;
+	struct property *pp;
+
+	/*
+	 * In the kernel DT remove all devices from the DEB, which isn't
+	 * present on this system.
+	 */
+	np = of_find_compatible_node(root, NULL, "marvell,mv88e6085");
+	if (!np)
+		return -ENODEV;
+
+	of_device_disable(np);
+
+	np = of_find_compatible_node(root, NULL, "zii,rave-wdt");
+	if (!np)
+		return -ENODEV;
+
+	of_device_disable(np);
+
+	aliases = of_find_node_by_path_from(root, "/aliases");
+	if (!aliases)
+		return -ENODEV;
+
+	pp = of_find_property(aliases, "ethernet-switch0", NULL);
+	if (!pp)
+		return -ENODEV;
+
+	of_delete_property(pp);
+
+	return 0;
+}
+
+static void zii_imx8mq_dev_lru_fixup(const struct zii_pn_fixup *context)
+{
+	const struct zii_imx8mq_dev_lru_fixup *fixup =
+		container_of(context, struct zii_imx8mq_dev_lru_fixup, fixup);
+
+	if (fixup->flags & LRU_FLAG_EGALAX)
+		of_register_fixup(zii_imx8mq_dev_fixup_egalax_ts, NULL);
+
+	if (fixup->flags & LRU_FLAG_NO_DEB) {
+		zii_imx8mq_dev_fixup_deb_internal();
+		of_register_fixup(zii_imx8mq_dev_fixup_deb, NULL);
+	}
+}
+
+#define ZII_IMX8MQ_DEV_LRU_FIXUP(__pn, __flags)		\
+	{						\
+		{ __pn, zii_imx8mq_dev_lru_fixup },	\
+		__flags					\
+	}
+
+static const struct zii_imx8mq_dev_lru_fixup zii_imx8mq_dev_lru_fixups[] = {
+	ZII_IMX8MQ_DEV_LRU_FIXUP("00-5131-02", LRU_FLAG_EGALAX),
+	ZII_IMX8MQ_DEV_LRU_FIXUP("00-5131-03", LRU_FLAG_EGALAX),
+	ZII_IMX8MQ_DEV_LRU_FIXUP("00-5170-01", LRU_FLAG_NO_DEB),
+};
+
+/*
+ * This initcall needs to be executed before coredevices, so we have a chance
+ * to fix up the devices with the correct information.
+ */
+static int zii_imx8mq_dev_process_fixups(void)
+{
+	if (!of_machine_is_compatible("zii,imx8mq-ultra"))
+		return 0;
+
+	zii_process_lru_fixups(zii_imx8mq_dev_lru_fixups);
+
+	return 0;
+}
+postmmu_initcall(zii_imx8mq_dev_process_fixups);
diff --git a/arch/arm/boards/zii-imx8mq-dev/lowlevel.c b/arch/arm/boards/zii-imx8mq-dev/lowlevel.c
index 795c98cb66..f12d79ee6e 100644
--- a/arch/arm/boards/zii-imx8mq-dev/lowlevel.c
+++ b/arch/arm/boards/zii-imx8mq-dev/lowlevel.c
@@ -78,7 +78,7 @@ static void zii_imx8mq_dev_sram_setup(void)
 	imx8_get_boot_source(&src, &instance);
 
 	if (src == BOOTSOURCE_MMC)
-		ret = imx8_esdhc_start_image(instance);
+		ret = imx8_esdhc_load_image(instance, true);
 
 	BUG_ON(ret);
 }
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 5c9a311c5f..e8dca0b851 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -52,7 +52,7 @@ lwl-dtb-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += am335x-phytec-phyflex-som.dtb.o am33
 	am335x-phytec-phycore-som-nand-no-eeprom.dtb.o am335x-phytec-phycore-som-nand-no-spi-no-eeprom.dtb.o \
 	am335x-phytec-phycore-som-emmc.dtb.o \
 	am335x-phytec-phycard-som.dtb.o am335x-phytec-phycard-som-mlo.dtb.o
-lwl-dtb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += imx6q-phytec-pbaa03.dtb.o \
+lwl-dtb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += imx6q-phytec-phycard.dtb.o \
 				imx6s-phytec-pbab01.dtb.o \
 				imx6dl-phytec-pbab01.dtb.o \
 				imx6q-phytec-pbab01.dtb.o \
diff --git a/arch/arm/dts/imx6q-phytec-pbaa03.dts b/arch/arm/dts/imx6q-phytec-pbaa03.dts
deleted file mode 100644
index 5216a2dfe3..0000000000
--- a/arch/arm/dts/imx6q-phytec-pbaa03.dts
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * Copyright 2014 Christian Hemp, Phytec Messtechnik GmbH
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
- */
-
-/dts-v1/;
-#ifdef CONFIG_BOOTM_FITIMAGE_PUBKEY
-#include CONFIG_BOOTM_FITIMAGE_PUBKEY
-#endif
-#include "imx6q-phytec-pcaaxl3.dtsi"
-
-/ {
-	model = "Phytec phyCARD-i.MX6 Quad Carrier-Board";
-	compatible = "phytec,imx6q-pbaa03", "phytec,imx6q-pcaaxl3", "fsl,imx6q";
-
-	chosen {
-		stdout-path = &uart3;
-	};
-};
-
-&fec {
-	status = "okay";
-};
-
-&uart3 {
-	status = "okay";
-};
-
-&usdhc3 {
-	status = "okay";
-};
diff --git a/arch/arm/dts/imx6q-phytec-pcaaxl3.dtsi b/arch/arm/dts/imx6q-phytec-pcaaxl3.dtsi
deleted file mode 100644
index 66b547ad8e..0000000000
--- a/arch/arm/dts/imx6q-phytec-pcaaxl3.dtsi
+++ /dev/null
@@ -1,184 +0,0 @@
-/*
- * Copyright 2014444 Christian Hemp, Phytec Messtechnik GmbH
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
- */
-
-#include <arm/imx6q.dtsi>
-#include "imx6q.dtsi"
-
-/ {
-	model = "Phytec phyCARD-i.MX6 Quad";
-	compatible = "phytec,imx6q-pcaaxl3", "fsl,imx6q";
-
-	chosen {
-		environment-sd3 {
-			compatible = "barebox,environment";
-			device-path = &environment_usdhc3;
-			status = "disabled";
-		};
-
-		environment-nand {
-			compatible = "barebox,environment";
-			device-path = &environment_nand;
-			status = "disabled";
-		};
-	};
-};
-
-&i2c1 {
-	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_i2c1>;
-
-	eeprom: m24c32@50 {
-		compatible = "st,24c32", "at24";
-		reg = <0x50>;
-	};
-};
-
-&iomuxc {
-	pinctrl-names = "default";
-
-	imx6q-phytec-pcaaxl3 {
-		pinctrl_enet: enetgrp {
-			fsl,pins = <
-				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
-				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
-				MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0	0x1b0b0
-				MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1	0x1b0b0
-				MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER	0x1b0b0
-				MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN	0x1b0b0
-				MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0	0x1b0b0
-				MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1	0x1b0b0
-				MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN	0x1b0b0
-				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
-				MX6QDL_PAD_KEY_COL0__ENET_RX_DATA3	0x1b0b0
-				MX6QDL_PAD_KEY_ROW0__ENET_TX_DATA3	0x1b0b0
-				MX6QDL_PAD_KEY_ROW1__ENET_COL		0x1b0b0
-				MX6QDL_PAD_KEY_COL2__ENET_RX_DATA2	0x1b0b0
-				MX6QDL_PAD_KEY_ROW2__ENET_TX_DATA2	0x1b0b0
-				MX6QDL_PAD_KEY_COL3__ENET_CRS		0x1b0b0
-				MX6QDL_PAD_GPIO_18__ENET_RX_CLK		0x1b0b0
-				MX6QDL_PAD_GPIO_19__ENET_TX_ER		0x1b0b0
-			>;
-		};
-
-		pinctrl_gpmi_nand: gpmigrp {
-			fsl,pins = <
-				MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1
-				MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1
-				MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1
-				MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb000
-				MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1
-				MX6QDL_PAD_NANDF_CS1__NAND_CE1_B	0xb0b1
-				MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1
-				MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1
-				MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1
-				MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1
-				MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1
-				MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1
-				MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1
-				MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1
-				MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1
-				MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1
-				MX6QDL_PAD_SD4_DAT0__NAND_DQS		0x00b1
-			>;
-		};
-
-		pinctrl_i2c1: i2c1grp {
-			fsl,pins = <
-				MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
-				MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
-			>;
-		};
-
-		pinctrl_uart3: uart3grp {
-			fsl,pins = <
-				MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1
-				MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1
-			>;
-		};
-
-		pinctrl_usdhc3: usdhc3grp {
-			fsl,pins = <
-				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
-				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
-				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
-				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
-				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
-				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
-				MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22	0x80000000 /* CD */
-			>;
-		};
-	};
-};
-
-&fec {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_enet>;
-	phy-mode = "mii";
-	status = "disabled";
-};
-
-&gpmi {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_gpmi_nand>;
-	nand-on-flash-bbt;
-	status = "okay";
-
-	partitions {
-		compatible = "fixed-partitions";
-		#address-cells = <1>;
-		#size-cells = <1>;
-
-		partition@0 {
-			label = "barebox";
-			reg = <0x0 0x400000>;
-		};
-
-		environment_nand: partition@400000 {
-			label = "barebox-environment";
-			reg = <0x400000 0x20000>;
-		};
-
-		partition@420000 {
-			label = "root";
-			reg = <0x420000 0x0>;
-		};
-	};
-};
-
-&ocotp {
-	barebox,provide-mac-address = <&fec 0x620>;
-};
-
-&uart3 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_uart3>;
-	status = "disabled";
-};
-
-&usdhc3 {
-        pinctrl-names = "default";
-        pinctrl-0 = <&pinctrl_usdhc3>;
-        cd-gpios = <&gpio5 22 0>;
-        status = "disabled";
-
-	#address-cells = <1>;
-	#size-cells = <1>;
-
-	partition@0 {
-		label = "barebox";
-		reg = <0x0 0xe0000>;
-	};
-	environment_usdhc3: partition@e0000 {
-		label = "barebox-environment";
-		reg = <0xe0000 0x20000>;
-	};
-};
diff --git a/arch/arm/dts/imx6q-phytec-phycard.dts b/arch/arm/dts/imx6q-phytec-phycard.dts
new file mode 100644
index 0000000000..c06461c2c7
--- /dev/null
+++ b/arch/arm/dts/imx6q-phytec-phycard.dts
@@ -0,0 +1,40 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later)
+/*
+ * Copyright (C) 2014 PHYTEC Messtechnik GmbH
+ * Author: Christian Hemp <c.hemp@phytec.de>
+ */
+
+/dts-v1/;
+
+#ifdef CONFIG_BOOTM_FITIMAGE_PUBKEY
+#include CONFIG_BOOTM_FITIMAGE_PUBKEY
+#endif
+
+#include <arm/imx6q.dtsi>
+#include "imx6q.dtsi"
+#include "imx6qdl-phytec-phycard-som.dtsi"
+
+/ {
+	model = "PHYTEC phyCARD-i.MX6 Quad";
+	compatible = "phytec,imx6q-pbaa03", "phytec,imx6q-pcaaxl3", "fsl,imx6q";
+
+	chosen {
+		stdout-path = &uart3;
+	};
+};
+
+&eeprom {
+	status = "okay";
+};
+
+&fec {
+	status = "okay";
+};
+
+&uart3 {
+	status = "okay";
+};
+
+&usdhc3 {
+	status = "okay";
+};
diff --git a/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi
index 846ebbe6b1..841ad653b2 100644
--- a/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi
+++ b/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi
@@ -98,17 +98,17 @@
 
 		partition@0 {
 			label = "barebox";
-			reg = <0x0 0x400000>;
+			reg = <0x0 0x1000000>;
 		};
 
 		partition@400000 {
 			label = "barebox-environment";
-			reg = <0x400000 0x100000>;
+			reg = <0x1000000 0x100000>;
 		};
 
 		partition@500000 {
 			label = "root";
-			reg = <0x500000 0x0>;
+			reg = <0x1100000 0x0>;
 		};
 	};
 };
diff --git a/arch/arm/dts/imx6qdl-phytec-phycard-som.dtsi b/arch/arm/dts/imx6qdl-phytec-phycard-som.dtsi
new file mode 100644
index 0000000000..5d287258bb
--- /dev/null
+++ b/arch/arm/dts/imx6qdl-phytec-phycard-som.dtsi
@@ -0,0 +1,178 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later)
+/*
+ * Copyright (C) 2014 PHYTEC Messtechnik GmbH
+ * Author: Christian Hemp <c.hemp@phytec.de>
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+	chosen {
+		environment-nand {
+			compatible = "barebox,environment";
+			device-path = &environment_nand;
+			status = "disabled";
+		};
+
+		environment-sd3 {
+			compatible = "barebox,environment";
+			device-path = &environment_usdhc3;
+			status = "disabled";
+		};
+	};
+};
+
+&fec {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_enet>;
+	phy-mode = "mii";
+	status = "disabled";
+};
+
+&gpmi {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_gpmi_nand>;
+	nand-on-flash-bbt;
+	status = "okay";
+
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		partition@0 {
+			label = "barebox";
+			reg = <0x0 0x1000000>;
+		};
+
+		environment_nand: partition@400000 {
+			label = "barebox-environment";
+			reg = <0x1000000 0x100000>;
+		};
+
+		partition@420000 {
+			label = "root";
+			reg = <0x1100000 0x0>;
+		};
+	};
+};
+
+&i2c1 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c1>;
+
+	eeprom: m24c32@50 {
+		compatible = "st,24c32", "at24";
+		reg = <0x50>;
+		status = "disabled";
+	};
+};
+
+&iomuxc {
+	pinctrl-names = "default";
+
+	pinctrl_enet: enetgrp {
+		fsl,pins = <
+			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
+			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
+			MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0	0x1b0b0
+			MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1	0x1b0b0
+			MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER	0x1b0b0
+			MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN	0x1b0b0
+			MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0	0x1b0b0
+			MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1	0x1b0b0
+			MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN	0x1b0b0
+			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
+			MX6QDL_PAD_KEY_COL0__ENET_RX_DATA3	0x1b0b0
+			MX6QDL_PAD_KEY_ROW0__ENET_TX_DATA3	0x1b0b0
+			MX6QDL_PAD_KEY_ROW1__ENET_COL		0x1b0b0
+			MX6QDL_PAD_KEY_COL2__ENET_RX_DATA2	0x1b0b0
+			MX6QDL_PAD_KEY_ROW2__ENET_TX_DATA2	0x1b0b0
+			MX6QDL_PAD_KEY_COL3__ENET_CRS		0x1b0b0
+			MX6QDL_PAD_GPIO_18__ENET_RX_CLK		0x1b0b0
+			MX6QDL_PAD_GPIO_19__ENET_TX_ER		0x1b0b0
+		>;
+	};
+
+	pinctrl_gpmi_nand: gpmigrp {
+		fsl,pins = <
+			MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1
+			MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1
+			MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1
+			MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb000
+			MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1
+			MX6QDL_PAD_NANDF_CS1__NAND_CE1_B	0xb0b1
+			MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1
+			MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1
+			MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1
+			MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1
+			MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1
+			MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1
+			MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1
+			MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1
+			MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1
+			MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1
+			MX6QDL_PAD_SD4_DAT0__NAND_DQS		0x00b1
+		>;
+	};
+
+	pinctrl_i2c1: i2c1grp {
+		fsl,pins = <
+			MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
+			MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
+		>;
+	};
+
+	pinctrl_uart3: uart3grp {
+		fsl,pins = <
+			MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1
+			MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1
+		>;
+	};
+
+	pinctrl_usdhc3: usdhc3grp {
+		fsl,pins = <
+			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
+			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
+			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
+			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
+			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
+			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
+			MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22	0x80000000 /* CD */
+		>;
+	};
+};
+
+&ocotp {
+	barebox,provide-mac-address = <&fec 0x620>;
+};
+
+&uart3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart3>;
+	status = "disabled";
+};
+
+&usdhc3 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_usdhc3>;
+        cd-gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>;
+        status = "disabled";
+
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		partition@0 {
+			label = "barebox";
+			reg = <0x0 0xe0000>;
+		};
+
+		environment_usdhc3: partition@e0000 {
+			label = "barebox-environment";
+			reg = <0xe0000 0x20000>;
+		};
+	};
+};
diff --git a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
index 69f252b423..918b62f794 100644
--- a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
+++ b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
@@ -50,17 +50,17 @@
 
 		partition@0 {
 			label = "barebox";
-			reg = <0x0 0x400000>;
+			reg = <0x0 0x1000000>;
 		};
 
 		partition@400000 {
 			label = "barebox-environment";
-			reg = <0x400000 0x100000>;
+			reg = <0x1000000 0x100000>;
 		};
 
 		partition@500000 {
 			label = "root";
-			reg = <0x500000 0x0>;
+			reg = <0x1100000 0x0>;
 		};
 	};
 };
diff --git a/arch/arm/dts/imx8mq-zii-ultra.dtsi b/arch/arm/dts/imx8mq-zii-ultra.dtsi
index 6180f21ab0..50bad9b1a2 100644
--- a/arch/arm/dts/imx8mq-zii-ultra.dtsi
+++ b/arch/arm/dts/imx8mq-zii-ultra.dtsi
@@ -22,6 +22,11 @@
 		};
 	};
 
+	device-info {
+		nvmem-cells = <&lru_part_number>;
+		nvmem-cell-names = "lru-part-number";
+	};
+
 	aliases {
 		ethernet0 = &fec1;
 		ethernet1 = &i210;
@@ -64,6 +69,11 @@
 &uart2 {
 	rave-sp {
 		eeprom@a4 {
+			lru_part_number: lru-part-number@21 {
+				reg = <0x21 15>;
+				read-only;
+			};
+
 			mac_address_0: mac-address@180 {
 				reg = <0x180 6>;
 			};
diff --git a/arch/arm/mach-imx/include/mach/xload.h b/arch/arm/mach-imx/include/mach/xload.h
index a605e76339..9709b13dfb 100644
--- a/arch/arm/mach-imx/include/mach/xload.h
+++ b/arch/arm/mach-imx/include/mach/xload.h
@@ -5,8 +5,7 @@ int imx53_nand_start_image(void);
 int imx6_spi_load_image(int instance, unsigned int flash_offset, void *buf, int len);
 int imx6_spi_start_image(int instance);
 int imx6_esdhc_start_image(int instance);
-int imx8_esdhc_start_image(int instance);
-int imx8_esdhc_load_piggy(int instance);
+int imx8_esdhc_load_image(int instance, bool start);
 
 int imx_image_size(void);
 int piggydata_size(void);
diff --git a/drivers/mci/imx-esdhc-pbl.c b/drivers/mci/imx-esdhc-pbl.c
index c0d27fb7eb..2579cfd9d1 100644
--- a/drivers/mci/imx-esdhc-pbl.c
+++ b/drivers/mci/imx-esdhc-pbl.c
@@ -121,8 +121,8 @@ static int esdhc_search_header(struct fsl_esdhc_host *host,
 }
 
 static int
-esdhc_start_image(struct fsl_esdhc_host *host, ptrdiff_t address, ptrdiff_t entry,
-		  u32 offset)
+esdhc_load_image(struct fsl_esdhc_host *host, ptrdiff_t address,
+		 ptrdiff_t entry, u32 offset, bool start)
 {
 
 	void *buf = (void *)address;
@@ -177,6 +177,9 @@ esdhc_start_image(struct fsl_esdhc_host *host, ptrdiff_t address, ptrdiff_t entr
 
 	pr_debug("Image loaded successfully\n");
 
+	if (!start)
+		return 0;
+
 	bb = buf + ofs;
 
 	sync_caches_for_execution();
@@ -254,22 +257,23 @@ int imx6_esdhc_start_image(int instance)
 
 	imx_esdhc_init(&host, &data);
 
-	return esdhc_start_image(&host, 0x10000000, 0x10000000, 0);
+	return esdhc_load_image(&host, 0x10000000, 0x10000000, 0, true);
 }
 
 /**
- * imx8_esdhc_start_image - Load and start an image from USDHC controller
+ * imx8_esdhc_load_image - Load and optionally start an image from USDHC controller
  * @instance: The USDHC controller instance (0..2)
+ * @start: Whether to directly start the loaded image
  *
  * This uses esdhc_start_image() to load an image from SD/MMC.  It is
  * assumed that the image is the currently running barebox image (This
  * information is used to calculate the length of the image). The
  * image is started afterwards.
  *
- * Return: If successful, this function does not return. A negative error
- * code is returned when this function fails.
+ * Return: If successful, this function does not return (if directly started)
+ * or 0. A negative error code is returned when this function fails.
  */
-int imx8_esdhc_start_image(int instance)
+int imx8_esdhc_load_image(int instance, bool start)
 {
 	struct esdhc_soc_data data;
 	struct fsl_esdhc_host host;
@@ -279,50 +283,8 @@ int imx8_esdhc_start_image(int instance)
 	if (ret)
 		return ret;
 
-	return esdhc_start_image(&host, MX8MQ_DDR_CSD1_BASE_ADDR,
-				 MX8MQ_ATF_BL33_BASE_ADDR, SZ_32K);
-}
-
-int imx8_esdhc_load_piggy(int instance)
-{
-	void *buf, *piggy;
-	struct imx_flash_header_v2 *hdr = NULL;
-	struct esdhc_soc_data data;
-	struct fsl_esdhc_host host;
-	int ret, len;
-	int offset = SZ_32K;
-
-	ret = imx8_esdhc_init(&host, &data, instance);
-	if (ret)
-		return ret;
-
-	/*
-	 * We expect to be running at MX8MQ_ATF_BL33_BASE_ADDR where the atf
-	 * has jumped to. Use a temporary buffer where we won't overwrite
-	 * ourselves.
-	 */
-	buf = (void *)MX8MQ_ATF_BL33_BASE_ADDR + SZ_32M;
-
-	ret = esdhc_search_header(&host, &hdr, buf, &offset);
-	if (ret)
-		return ret;
-
-	len = offset + hdr->boot_data.size + piggydata_size();
-	len = ALIGN(len, SECTOR_SIZE);
-
-	ret = esdhc_read_blocks(&host, buf, len);
-
-	/*
-	 * Calculate location of the piggydata at the offset loaded into RAM
-	 */
-	piggy = buf + offset + hdr->boot_data.size;
-
-	/*
-	 * Copy the piggydata where the uncompressing code expects it
-	 */
-	memcpy(input_data, piggy, piggydata_size());
-
-	return ret;
+	return esdhc_load_image(&host, MX8MQ_DDR_CSD1_BASE_ADDR,
+				MX8MQ_ATF_BL33_BASE_ADDR, SZ_32K, start);
 }
 #endif
 
diff --git a/images/Makefile.imx b/images/Makefile.imx
index e5558b1c60..994fd951a0 100644
--- a/images/Makefile.imx
+++ b/images/Makefile.imx
@@ -23,30 +23,22 @@ endef
 # %.imximg - convert into i.MX image
 # ----------------------------------------------------------------
 
-$(obj)/%.imximg: $(obj)/% FORCE
-	$(call if_changed,imx_image,$(CFG_$(@F)),)
-
-$(obj)/%.pimximg: $(obj)/% FORCE
-	$(call if_changed,imx_image,$(CFG_$(patsubst %.pimximg,%.imximg,$(@F))),\
-	-p $($(patsubst $(obj)/%.pblb,PBL_MEMORY_SIZE_%,$<)))
-
-$(obj)/%.psimximg: $(obj)/% FORCE
-	$(call if_changed,imx_image,$(CFG_$(patsubst %.psimximg,%.imximg,$(@F))),\
-	-p $($(patsubst $(obj)/%.pblb,PBL_MEMORY_SIZE_%,$<)) -s)
-
-$(obj)/%.simximg: $(obj)/% FORCE
-	$(call if_changed,imx_image,$(CFG_$(patsubst %.simximg,%.imximg,$(@F))),-s)
-
-$(obj)/%.usimximg: $(obj)/% FORCE
-	$(call if_changed,imx_image,$(CFG_$(patsubst %.usimximg,%.imximg,$(@F))),-u -s)
-
-$(obj)/%.esimximg: $(obj)/% FORCE
-	$(call if_changed,imx_image,$(CFG_$(patsubst %.esimximg,%.imximg,$(@F))),-e -s)
+.SECONDEXPANSION:
+define imx_image_rule
+$(eval
+$$(obj)/%.$(strip $(1)): $$(obj)/% $$$$(CFG_%.imximg) FORCE
+	$$(call if_changed,imx_image,$$(CFG_$$(patsubst %.$(strip $(1)),%.imximg,$$(@F))),$(strip $(2)))
+)
+endef
 
-$(obj)/%.esimximg.dek: $(obj)/% FORCE
-	$(call if_changed,imx_image,$(CFG_$(patsubst %.esimximg,%.imximg,$(@F))),-e -s)
+$(call imx_image_rule,imximg)
+$(call imx_image_rule,pimximg, -p $$($$(patsubst $$(obj)/%.pblb,PBL_MEMORY_SIZE_%,$$<)))
+$(call imx_image_rule,psimximg, -p $$($$(patsubst $$(obj)/%.pblb,PBL_MEMORY_SIZE_%,$$<)) -s)
+$(call imx_image_rule,simximg, -s)
+$(call imx_image_rule,usimximg, -u -s)
+$(call imx_image_rule,esimximg, -e -s)
+$(call imx_image_rule,esimximg.dek, -e -s)
 
-.SECONDEXPANSION:
 $(obj)/%.img.dek: $(obj)/$$(FILE_$$(@F))
 	$(Q)if [ -z $(FILE_$(@F)) ]; then echo "FILE_$(@F) empty!"; false; fi
 	$(call if_changed,shipped)
@@ -281,11 +273,11 @@ $(call build_imx_habv4img, CONFIG_MACH_EMBEST_MARSBOARD, start_imx6q_marsboard,
 
 $(call build_imx_habv4img, CONFIG_MACH_EMBEST_RIOTBOARD, start_imx6s_riotboard, embest-riotboard/flash-header-embest-riotboard, embest-imx6s-riotboard)
 
-$(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_pbaa03_1gib, phytec-som-imx6/flash-header-phytec-pcaaxl3-1gib, phytec-pbaa03-1gib)
+$(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_phycard_imx6q_1gib, phytec-som-imx6/flash-header-phytec-pcaaxl3-1gib, phytec-phycard-imx6q-1gib)
 
-$(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_pbaa03_1gib_1bank, phytec-som-imx6/flash-header-phytec-pcaaxl3-1gib-1bank, phytec-pbaa03-1gib-1bank)
+$(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_phycard_imx6q_1gib_1bank, phytec-som-imx6/flash-header-phytec-pcaaxl3-1gib-1bank, phytec-phycard-imx6q-1gib-1bank)
 
-$(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_pbaa03_2gib, phytec-som-imx6/flash-header-phytec-pcaaxl3-2gib, phytec-pbaa03-2gib)
+$(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_phycard_imx6q_2gib, phytec-som-imx6/flash-header-phytec-pcaaxl3-2gib, phytec-phycard-imx6q-2gib)
 
 $(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_phycore_imx6q_som_nand_1gib, phytec-som-imx6/flash-header-phytec-pcm058-1gib, phytec-phycore-imx6q-som-nand-1gib)
 
diff --git a/scripts/imx/imx.c b/scripts/imx/imx.c
index b8d939a431..d702c900b3 100644
--- a/scripts/imx/imx.c
+++ b/scripts/imx/imx.c
@@ -338,16 +338,11 @@ static int do_hab_blocks(struct config_data *data, int argc, char *argv[])
 	char *str;
 	int ret;
 	uint32_t signed_size = data->load_size;
-	uint32_t offset = 0;
+	uint32_t offset = data->image_dcd_offset;
 
 	if (!data->csf)
 		return -EINVAL;
 
-	if (argc < 2)
-		type = "full";
-	else
-		type = argv[1];
-
 	/*
 	 * In case of encrypted image we reduce signed area to beginning
 	 * of encrypted area.
@@ -359,31 +354,19 @@ static int do_hab_blocks(struct config_data *data, int argc, char *argv[])
 	 * Ensure we only sign the PBL for i.MX8MQ
 	 */
 	if (data->pbl_code_size && data->cpu_type == IMX_CPU_IMX8MQ) {
-		offset = data->header_gap;
+		offset += data->header_gap;
 		signed_size = roundup(data->pbl_code_size + HEADER_LEN, 0x1000);
 		if (data->signed_hdmi_firmware_file)
 			offset += PLUGIN_HDMI_SIZE;
 	}
 
-	if (!strcmp(type, "full")) {
+	if (signed_size > 0) {
 		ret = asprintf(&str, "Blocks = 0x%08x 0x%08x 0x%08x \"%s\"\n",
-			       data->image_load_addr, offset, signed_size,
-			       data->outfile);
-	} else if (!strcmp(type, "from-dcdofs")) {
-		ret = asprintf(&str, "Blocks = 0x%08x 0x%x %d \"%s\"\n",
-			       data->image_load_addr + data->image_dcd_offset,
-			       data->image_dcd_offset,
-			       signed_size - data->image_dcd_offset,
-			       data->outfile);
-	} else if (!strcmp(type, "skip-mbr")) {
-		ret = asprintf(&str,
-			       "Blocks = 0x%08x 0 440 \"%s\", \\\n"
-			       "         0x%08x 512 %d \"%s\"\n",
-			       data->image_load_addr, data->outfile,
-			       data->image_load_addr + 512,
-			       signed_size - 512, data->outfile);
+			data->image_load_addr + data->image_dcd_offset, offset,
+			signed_size - data->image_dcd_offset, data->outfile);
 	} else {
-		fprintf(stderr, "Invalid hab_blocks option: %s\n", type);
+		fprintf(stderr, "Invalid signed size area 0x%08x\n",
+			signed_size);
 		return -EINVAL;
 	}