diff options
author | Ahmad Fatoum <a.fatoum@pengutronix.de> | 2023-09-13 15:01:50 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2023-09-21 10:53:04 +0200 |
commit | eb73340083ceef97d6d4d2b37468e921ef398d79 (patch) | |
tree | 27b415ec1649fd659da589754770b4fe2a57d583 | |
parent | 28fe03ae08db447dc50f65be31d3c7d63f8593dc (diff) | |
download | barebox-eb73340083ceef97d6d4d2b37468e921ef398d79.tar.gz barebox-eb73340083ceef97d6d4d2b37468e921ef398d79.tar.xz |
ARM: ZynqMP: Add ZCU102 support
The ZCU102 is a potentially interesting platform, because there's Qemu
support for it. It's not very straight forward to use, because the
ZynqMP support in barebox and Linux relies heavily on firmware services,
which are lacking when naively using Qemu.
Still, let's add support now and worry about running it as part of the
test suite later.
Board support was not tested on actual hardware, but on Qemu with
changes on top of barebox to skip the firmware communication.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20230913130150.2159921-1-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r-- | Documentation/boards/zynqmp.rst | 4 | ||||
-rw-r--r-- | arch/arm/boards/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/boards/xilinx-zcu102/Makefile | 3 | ||||
-rw-r--r-- | arch/arm/boards/xilinx-zcu102/board.c | 27 | ||||
-rw-r--r-- | arch/arm/boards/xilinx-zcu102/lowlevel.c | 15 | ||||
-rw-r--r-- | arch/arm/configs/multi_v8_defconfig | 1 | ||||
-rw-r--r-- | arch/arm/configs/zynqmp_defconfig | 1 | ||||
-rw-r--r-- | arch/arm/dts/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/dts/zynqmp-zcu102-revA.dts | 13 | ||||
-rw-r--r-- | arch/arm/dts/zynqmp-zcu102-revB.dts | 13 | ||||
-rw-r--r-- | arch/arm/mach-zynqmp/Kconfig | 7 | ||||
-rw-r--r-- | images/Makefile.zynqmp | 4 |
12 files changed, 88 insertions, 2 deletions
diff --git a/Documentation/boards/zynqmp.rst b/Documentation/boards/zynqmp.rst index 98fcac017b..86078d496e 100644 --- a/Documentation/boards/zynqmp.rst +++ b/Documentation/boards/zynqmp.rst @@ -11,13 +11,13 @@ Currently, Barebox only supports booting as a second stage boot loader from an SD-card. It relies on the FSBL_ to initialize the base system including sdram setup and pin muxing. -The ZynqMP defconfig supports the ZCU104 reference board. Use it to build the +The ZynqMP defconfig supports the ZCU102/104/106 reference board. Use it to build the Barebox image:: make ARCH=arm64 zynqmp_defconfig make ARCH=arm64 -.. note:: The resulting image ``images/barebox-zynqmp-zcu104.img`` is **not** an image +.. note:: The resulting image ``images/barebox-zynqmp-zcuX.img`` is **not** an image that can directly be booted on the ZynqMP. For a bootable BOOT.BIN image, you also need to build the FSBL_ and a ZynqMP diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile index 83a3179185..bb565e7235 100644 --- a/arch/arm/boards/Makefile +++ b/arch/arm/boards/Makefile @@ -173,6 +173,7 @@ obj-$(CONFIG_MACH_VSCOM_BALTOS) += vscom-baltos/ obj-$(CONFIG_MACH_WARP7) += element14-warp7/ obj-$(CONFIG_MACH_WEBASTO_CCBV2) += webasto-ccbv2/ obj-$(CONFIG_MACH_VF610_TWR) += freescale-vf610-twr/ +obj-$(CONFIG_MACH_XILINX_ZCU102) += xilinx-zcu102/ obj-$(CONFIG_MACH_XILINX_ZCU104) += xilinx-zcu104/ obj-$(CONFIG_MACH_XILINX_ZCU106) += xilinx-zcu106/ obj-$(CONFIG_MACH_ZII_COMMON) += zii-common/ diff --git a/arch/arm/boards/xilinx-zcu102/Makefile b/arch/arm/boards/xilinx-zcu102/Makefile new file mode 100644 index 0000000000..d83a4793aa --- /dev/null +++ b/arch/arm/boards/xilinx-zcu102/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +obj-y += board.o +lwl-y += lowlevel.o diff --git a/arch/arm/boards/xilinx-zcu102/board.c b/arch/arm/boards/xilinx-zcu102/board.c new file mode 100644 index 0000000000..3ef668fdff --- /dev/null +++ b/arch/arm/boards/xilinx-zcu102/board.c @@ -0,0 +1,27 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include <common.h> +#include <driver.h> +#include <init.h> +#include <mach/zynqmp/zynqmp-bbu.h> +#include <deep-probe.h> + +static int zcu102_probe(struct device *dev) +{ + return zynqmp_bbu_register_handler("SD", "/boot/BOOT.BIN", + BBU_HANDLER_FLAG_DEFAULT); +} + +static const struct of_device_id zcu102_of_match[] = { + { .compatible = "xlnx,zynqmp-zcu102-revA" }, + { .compatible = "xlnx,zynqmp-zcu102-revB" }, + { /* sentinel */ }, +}; +BAREBOX_DEEP_PROBE_ENABLE(zcu102_of_match); + +static struct driver zcu102_board_driver = { + .name = "board-zynqmp-zcu102", + .probe = zcu102_probe, + .of_compatible = zcu102_of_match, +}; +coredevice_platform_driver(zcu102_board_driver); diff --git a/arch/arm/boards/xilinx-zcu102/lowlevel.c b/arch/arm/boards/xilinx-zcu102/lowlevel.c new file mode 100644 index 0000000000..4b72c0ec43 --- /dev/null +++ b/arch/arm/boards/xilinx-zcu102/lowlevel.c @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include <common.h> +#include <debug_ll.h> +#include <asm/barebox-arm.h> + +ENTRY_FUNCTION_WITHSTACK(start_zynqmp_zcu102, 0x80000000, x0, x1, x2) +{ + extern char __dtb_z_zynqmp_zcu102_revB_start[]; + + /* Assume that the first stage boot loader configured the UART */ + putc_ll('>'); + + barebox_arm_entry(0, SZ_2G, runtime_address(__dtb_z_zynqmp_zcu102_revB_start)); +} diff --git a/arch/arm/configs/multi_v8_defconfig b/arch/arm/configs/multi_v8_defconfig index 20f630281d..b18498c0a1 100644 --- a/arch/arm/configs/multi_v8_defconfig +++ b/arch/arm/configs/multi_v8_defconfig @@ -22,6 +22,7 @@ CONFIG_MACH_PINE64_QUARTZ64=y CONFIG_MACH_RADXA_ROCK3=y CONFIG_MACH_RADXA_ROCK5=y CONFIG_MACH_RADXA_CM3=y +CONFIG_MACH_XILINX_ZCU102=y CONFIG_MACH_XILINX_ZCU104=y CONFIG_MACH_XILINX_ZCU106=y CONFIG_64BIT=y diff --git a/arch/arm/configs/zynqmp_defconfig b/arch/arm/configs/zynqmp_defconfig index c9b6fa69ef..00327adc39 100644 --- a/arch/arm/configs/zynqmp_defconfig +++ b/arch/arm/configs/zynqmp_defconfig @@ -1,4 +1,5 @@ CONFIG_ARCH_ZYNQMP=y +CONFIG_MACH_XILINX_ZCU102=y CONFIG_MACH_XILINX_ZCU104=y CONFIG_64BIT=y CONFIG_ARM_PSCI_CLIENT=y diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 81e11bb6a3..8bd3c757e0 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -201,6 +201,7 @@ lwl-$(CONFIG_MACH_SAMA5D27_SOM1) += at91-sama5d27_som1_ek.dtb.o lwl-$(CONFIG_MACH_SAMA5D27_GIANTBOARD) += at91-sama5d27_giantboard.dtb.o lwl-$(CONFIG_MACH_SAMA5D4_WIFX) += at91-sama5d4_wifx_l1.dtb.o lwl-$(CONFIG_MACH_AT91SAM9X5EK) += at91sam9x5ek.dtb.o +lwl-$(CONFIG_MACH_XILINX_ZCU102) += zynqmp-zcu102-revA.dtb.o zynqmp-zcu102-revB.dtb.o lwl-$(CONFIG_MACH_XILINX_ZCU104) += zynqmp-zcu104-revA.dtb.o lwl-$(CONFIG_MACH_XILINX_ZCU106) += zynqmp-zcu106-revA.dtb.o diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts new file mode 100644 index 0000000000..8f5410d5e6 --- /dev/null +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include <arm64/xilinx/zynqmp-zcu102-revA.dts> + +/ { + chosen { + environment { + compatible = "barebox,environment"; + device-path = &sdhci1, "partname:0"; + file-path = "barebox.env"; + }; + }; +}; diff --git a/arch/arm/dts/zynqmp-zcu102-revB.dts b/arch/arm/dts/zynqmp-zcu102-revB.dts new file mode 100644 index 0000000000..3f772f465a --- /dev/null +++ b/arch/arm/dts/zynqmp-zcu102-revB.dts @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include <arm64/xilinx/zynqmp-zcu102-revB.dts> + +/ { + chosen { + environment { + compatible = "barebox,environment"; + device-path = &sdhci1, "partname:0"; + file-path = "barebox.env"; + }; + }; +}; diff --git a/arch/arm/mach-zynqmp/Kconfig b/arch/arm/mach-zynqmp/Kconfig index 0e7d930137..23d04926e6 100644 --- a/arch/arm/mach-zynqmp/Kconfig +++ b/arch/arm/mach-zynqmp/Kconfig @@ -3,6 +3,13 @@ menu "ZynqMP Features" depends on ARCH_ZYNQMP +config MACH_XILINX_ZCU102 + bool "Xilinx Zynq UltraScale+ MPSoC ZCU102" + select ARM_USE_COMPRESSED_DTB + help + Say Y here if you are using the Xilinx Zynq UltraScale+ MPSoC ZCU102 + evaluation board. + config MACH_XILINX_ZCU104 bool "Xilinx Zynq UltraScale+ MPSoC ZCU104" help diff --git a/images/Makefile.zynqmp b/images/Makefile.zynqmp index 872f399883..baf5c2b08b 100644 --- a/images/Makefile.zynqmp +++ b/images/Makefile.zynqmp @@ -3,6 +3,10 @@ # barebox image generation Makefile for Xilinx Zynq UltraScale+ # +pblb-$(CONFIG_MACH_XILINX_ZCU102) += start_zynqmp_zcu102 +FILE_barebox-zynqmp-zcu102.img = start_zynqmp_zcu102.pblb +image-$(CONFIG_MACH_XILINX_ZCU102) += barebox-zynqmp-zcu102.img + pblb-$(CONFIG_MACH_XILINX_ZCU104) += start_zynqmp_zcu104 FILE_barebox-zynqmp-zcu104.img = start_zynqmp_zcu104.pblb image-$(CONFIG_MACH_XILINX_ZCU104) += barebox-zynqmp-zcu104.img |