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authorOleksij Rempel <o.rempel@pengutronix.de>2018-09-17 12:31:51 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2018-09-18 07:42:24 +0200
commit38269ade13965679842625411b547acfc8333e89 (patch)
treea640d29c8ba47eb819004a453c187bb3c6e5ea61
parent6253073cb6c6c824371e091c3a470abbef973e8c (diff)
downloadbarebox-38269ade13965679842625411b547acfc8333e89.tar.gz
ARM: i.MX28: Add APBH clk support
i.MX28 fails to use DMA and NAND because it cannot find its clock. Add the clock for APBH. Fixes: 6eb2ba6f1b ("dma: apbh: Enable clock as a part of probing") Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r--drivers/clk/mxs/clk-imx28.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c
index ffe03c8..dd17a74 100644
--- a/drivers/clk/mxs/clk-imx28.c
+++ b/drivers/clk/mxs/clk-imx28.c
@@ -152,6 +152,7 @@ int __init mx28_clocks_init(void __iomem *regs)
clkdev_add_physbase(clks[fec], IMX_FEC0_BASE, NULL);
clkdev_add_physbase(clks[xbus], IMX_DBGUART_BASE, NULL);
clkdev_add_physbase(clks[hbus], IMX_OCOTP_BASE, NULL);
+ clkdev_add_physbase(clks[hbus], MXS_APBH_BASE, NULL);
clkdev_add_physbase(clks[uart], IMX_UART0_BASE, NULL);
clkdev_add_physbase(clks[uart], IMX_UART1_BASE, NULL);
clkdev_add_physbase(clks[uart], IMX_UART2_BASE, NULL);