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authorSteffen Trumtrar <s.trumtrar@pengutronix.de>2018-07-31 12:44:31 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2018-08-08 09:21:48 +0200
commit98152c31407a97d5fda8eeb00aade6c93495a11b (patch)
treea100e66b7bc1c942eed911cf3ba92f8c504cf8fb
parent3927ffb241081253ffb5e06b7da72c4d2a742284 (diff)
downloadbarebox-98152c31407a97d5fda8eeb00aade6c93495a11b.tar.gz
ARM: socfpga: add SMP_TWD_ADDR for Arria10
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r--arch/arm/mach-socfpga/include/mach/arria10-regs.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-socfpga/include/mach/arria10-regs.h b/arch/arm/mach-socfpga/include/mach/arria10-regs.h
index 931876f..4464f06 100644
--- a/arch/arm/mach-socfpga/include/mach/arria10-regs.h
+++ b/arch/arm/mach-socfpga/include/mach/arria10-regs.h
@@ -45,6 +45,7 @@
#define ARRIA10_DMASECURE_ADDR (0xffda1000)
#define ARRIA10_OCRAM_ADDR (0xffe00000)
#define ARRIA10_MPUSCU_ADDR (0xffffc000)
+#define ARRIA10_SMP_TWD_ADDR (0xffffc600)
#define ARRIA10_MPUL2_ADDR (0xfffff000)
/* L2 cache controller */