summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorSascha Hauer <s.hauer@pengutronix.de>2008-08-14 09:43:03 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2008-08-14 09:43:03 +0200
commit384b6a4e5267aa730a57dd71898d4dcd98582903 (patch)
tree4c8b287a13ea9eb025a8f5da4ed38511b50ed093
parentccbf7b8dacc9a0c4b54097a81fbaa23ec323a32d (diff)
downloadbarebox-384b6a4e5267aa730a57dd71898d4dcd98582903.tar.gz
barebox-384b6a4e5267aa730a57dd71898d4dcd98582903.tar.xz
pcm038: Configure chipselects for SRAM / CAN Controller
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r--board/pcm038/pcm038.c16
1 files changed, 13 insertions, 3 deletions
diff --git a/board/pcm038/pcm038.c b/board/pcm038/pcm038.c
index c2c9cc2e95..f292089c6d 100644
--- a/board/pcm038/pcm038.c
+++ b/board/pcm038/pcm038.c
@@ -132,9 +132,19 @@ static int pcm038_devices_init(void)
};
/* configure 16 bit nor flash on cs0 */
- writel(0x0000CC03, 0xD8002000);
- writel(0xa0330D01, 0xD8002004);
- writel(0x00220800, 0xD8002008);
+ CS0U = 0x0000CC03;
+ CS0L = 0xa0330D01;
+ CS0A = 0x00220800;
+
+ /* configure SRAM on cs1 */
+ CS1U = 0x0000d843;
+ CS1L = 0x22252521;
+ CS1A = 0x22220a00;
+
+ /* configure SJA1000 on cs4 */
+ CS4U = 0x0000DCF6;
+ CS4L = 0x444A0301;
+ CS4A = 0x44443302;
/* initizalize gpios */
for (i = 0; i < ARRAY_SIZE(mode); i++)