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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2009-01-30 11:56:56 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2009-01-30 12:07:23 +0100 |
| commit | 4d19a68f35fe668372fe0c4e7bac09cc2f168ccb (patch) | |
| tree | ba949590deea947a6d5785d443b6126ee058bbc4 | |
| parent | 4aae146beeea02c48e6169080aedaa8c6ce5e6b7 (diff) | |
| download | barebox-4d19a68f35fe668372fe0c4e7bac09cc2f168ccb.tar.gz barebox-4d19a68f35fe668372fe0c4e7bac09cc2f168ccb.tar.xz | |
[MX27] use common PLL defines
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| -rw-r--r-- | board/pcm038/pcm038.c | 27 | ||||
| -rw-r--r-- | include/asm-arm/arch-imx/imx27-regs.h | 12 |
2 files changed, 14 insertions, 25 deletions
diff --git a/board/pcm038/pcm038.c b/board/pcm038/pcm038.c index 890e712e0e..2182a3649e 100644 --- a/board/pcm038/pcm038.c +++ b/board/pcm038/pcm038.c @@ -36,6 +36,7 @@ #include <spi/spi.h> #include <asm/io.h> #include <asm/arch/imx-nand.h> +#include <asm/arch/imx-pll.h> static struct device_d cfi_dev = { .name = "cfi_flash", @@ -236,10 +237,10 @@ static int pcm038_power_init(void) if (ret) goto out; - MPCTL0 = PLL_PCTL_PD(0) | - PLL_PCTL_MFD(51) | - PLL_PCTL_MFI(7) | - PLL_PCTL_MFN(35); + MPCTL0 = IMX_PLL_PD(0) | + IMX_PLL_MFD(51) | + IMX_PLL_MFI(7) | + IMX_PLL_MFN(35); CSCR |= CSCR_MPLL_RESTART; @@ -295,15 +296,15 @@ static int pll_init(void) /* * pll clock initialization - see section 3.4.3 of the i.MX27 manual */ - MPCTL0 = PLL_PCTL_PD(1) | - PLL_PCTL_MFD(51) | - PLL_PCTL_MFI(7) | - PLL_PCTL_MFN(35); /* MPLL = 2 * 26 * 3.83654 MHz = 199.5 MHz */ - - SPCTL0 = PLL_PCTL_PD(1) | - PLL_PCTL_MFD(12) | - PLL_PCTL_MFI(9) | - PLL_PCTL_MFN(3); /* SPLL = 2 * 26 * 4.61538 MHz = 240 MHz */ + MPCTL0 = IMX_PLL_PD(1) | + IMX_PLL_MFD(51) | + IMX_PLL_MFI(7) | + IMX_PLL_MFN(35); /* MPLL = 2 * 26 * 3.83654 MHz = 199.5 MHz */ + + SPCTL0 = IMX_PLL_PD(1) | + IMX_PLL_MFD(12) | + IMX_PLL_MFI(9) | + IMX_PLL_MFN(3); /* SPLL = 2 * 26 * 4.61538 MHz = 240 MHz */ /* * ARM clock = (399 MHz / 2) / (ARM divider = 1) = 200 MHz diff --git a/include/asm-arm/arch-imx/imx27-regs.h b/include/asm-arm/arch-imx/imx27-regs.h index 6722751594..3af42ae259 100644 --- a/include/asm-arm/arch-imx/imx27-regs.h +++ b/include/asm-arm/arch-imx/imx27-regs.h @@ -97,18 +97,6 @@ #define PCCR1 __REG(IMX_PLL_BASE + 0x24) /* Peripheral Clock Control Register 1 */ #define CCSR __REG(IMX_PLL_BASE + 0x28) /* Clock Control Status Register */ -/* - * This can be used for MPCTL0 and SPCTL0. - * - * mfi + mfn / (mfd + 1) - * fpll = 2 * fref * --------------------- - * pd + 1 - */ -#define PLL_PCTL_PD(pd) ((pd) << 26) -#define PLL_PCTL_MFD(mfd) ((mfd) << 16) -#define PLL_PCTL_MFI(mfi) ((mfi) << 10) -#define PLL_PCTL_MFN(mfn) ((mfn) << 0) - #define CSCR_MPEN (1 << 0) #define CSCR_SPEN (1 << 1) #define CSCR_FPM_EN (1 << 2) |