add initial phyCard-i.MX27 support

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

14 files changed, 535 insertions, 0 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 22f25bb8ce..cd541e6cec 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -15,6 +15,7 @@ config ARCH_TEXT_BASE
 	default 0x23f00000 if MACH_PM9263
 	default 0x87f00000 if MACH_FREESCALE_MX35_3STACK
 	default 0x87f00000 if MACH_PCM043
+	default 0xa7f00000 if MACH_PCA100
 
 config BOARDINFO
 	default "Synertronixx scb9328" if MACH_SCB9328
@@ -27,6 +28,7 @@ config BOARDINFO
 	default "Ronetix PM9263" if MACH_PM9263
 	default "Freescale MX35 3Stack" if MACH_FREESCALE_MX35_3STACK
 	default "Phytec phyCORE-i.MX35" if MACH_PCM043
+	default "Phytec phyCard-i.MX27" if MACH_PCA100
 
 config BOARD_LINKER_SCRIPT
 	bool
@@ -186,6 +188,14 @@ config MACH_PM9263
 	help
 	  Say y here if you are using the Ronetix PM9263 Board
 
+config MACH_PCA100
+	bool "phyCard-i.MX27"
+	select ARCH_IMX27
+	select MACH_HAS_LOWLEVEL_INIT
+	help
+	  Say Y here if you are using Phytec's phyCard-i.MX27 (pca100) equipped
+	  with a Freescale i.MX27 Processor
+
 endchoice
 
 source arch/arm/mach-imx/Kconfig
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 1dcf5f7ecf..e2e1da11b5 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -20,6 +20,7 @@ board-$(CONFIG_MACH_AT91SAM9260_EK):= at91sam9260ek
 board-$(CONFIG_MACH_PM9263)        := pm9263
 board-$(CONFIG_MACH_FREESCALE_MX35_3STACK) := freescale-mx35-3-stack
 board-$(CONFIG_MACH_PCM043)        := pcm043
+board-$(CONFIG_MACH_PCA100)        := phycard-i.MX27
 
 # FIXME "cpu-y" never used on ARM!
 cpu-$(CONFIG_ARM920T)              := arm920t
diff --git a/board/phycard-i.MX27/Makefile b/board/phycard-i.MX27/Makefile
new file mode 100644
index 0000000000..fd52350fbb
--- /dev/null
+++ b/board/phycard-i.MX27/Makefile
@@ -0,0 +1,3 @@
+
+obj-y += lowlevel_init.o
+obj-y += pca100.o
diff --git a/board/phycard-i.MX27/config.h b/board/phycard-i.MX27/config.h
new file mode 100644
index 0000000000..b3eed0bb3c
--- /dev/null
+++ b/board/phycard-i.MX27/config.h
@@ -0,0 +1,24 @@
+/**
+ * @file
+ * @brief Global defintions for the ARM i.MX27 based pcm038
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#endif	/* __CONFIG_H */
diff --git a/board/phycard-i.MX27/env/bin/_update b/board/phycard-i.MX27/env/bin/_update
new file mode 100644
index 0000000000..fb7cbe8619
--- /dev/null
+++ b/board/phycard-i.MX27/env/bin/_update
@@ -0,0 +1,36 @@
+#!/bin/sh
+
+if [ -z "$part" -o -z "$image" ]; then
+	echo "define \$part and \$image"
+	exit 1
+fi
+
+if [ \! -e "$part" ]; then
+	echo "Partition $part does not exist"
+	exit 1
+fi
+
+if [ $# = 1 ]; then
+	image=$1
+fi
+
+if [ x$ip = xdhcp ]; then
+	dhcp
+fi
+
+ping $eth0.serverip
+if [ $? -ne 0 ] ; then
+	echo "update aborted"
+	exit 1
+fi
+
+unprotect $part
+
+echo
+echo "erasing partition $part"
+erase $part
+
+echo
+echo "flashing $image to $part"
+echo
+tftp $image $part
diff --git a/board/phycard-i.MX27/env/bin/boot b/board/phycard-i.MX27/env/bin/boot
new file mode 100644
index 0000000000..dfb59aa692
--- /dev/null
+++ b/board/phycard-i.MX27/env/bin/boot
@@ -0,0 +1,47 @@
+#!/bin/sh
+
+. /env/config
+
+if [ x$1 = xnand ]; then
+	root=nand
+	kernel=nand
+fi
+
+if [ x$1 = xnet ]; then
+	root=net
+	kernel=net
+fi
+
+if [ x$1 = xnor ]; then
+	root=nor
+	kernel=nor
+fi
+
+if [ x$ip = xdhcp ]; then
+	bootargs="$bootargs ip=dhcp"
+else
+	bootargs="$bootargs ip=$eth0.ipaddr:$eth0.serverip:$eth0.gateway:$eth0.netmask:::"
+fi
+
+if [ x$root = xnand ]; then
+	bootargs="$bootargs root=$rootpart_nand rootfstype=jffs2"
+elif [ x$root = xnor ]; then
+	bootargs="$bootargs root=$rootpart_nor rootfstype=jffs2"
+else
+	bootargs="$bootargs root=/dev/nfs nfsroot=$eth0.serverip:$nfsroot,v3,tcp"
+fi
+
+bootargs="$bootargs mtdparts=physmap-flash.0:$nor_parts;imx_nand:$nand_parts"
+
+if [ $kernel = net ]; then
+	if [ x$ip = xdhcp ]; then
+		dhcp
+	fi
+	tftp $uimage uImage || exit 1
+	bootm uImage
+elif [ $kernel = nor ]; then
+	bootm /dev/nor0.kernel
+else
+	bootm /dev/nand0.kernel.bb
+fi
+
diff --git a/board/phycard-i.MX27/env/bin/hush_hack b/board/phycard-i.MX27/env/bin/hush_hack
new file mode 100644
index 0000000000..5fffa92ecd
--- /dev/null
+++ b/board/phycard-i.MX27/env/bin/hush_hack
@@ -0,0 +1 @@
+nand -a /dev/nand0.*
diff --git a/board/phycard-i.MX27/env/bin/init b/board/phycard-i.MX27/env/bin/init
new file mode 100644
index 0000000000..3bfd194913
--- /dev/null
+++ b/board/phycard-i.MX27/env/bin/init
@@ -0,0 +1,37 @@
+#!/bin/sh
+
+PATH=/env/bin
+export PATH
+
+. /env/config
+if [ -e /dev/nor0 ]; then
+	addpart /dev/nor0 $nor_parts
+fi
+
+if [ -e /dev/nand0 ]; then
+	addpart /dev/nand0 $nand_parts
+
+	# Uh, oh, hush first expands wildcards and then starts executing
+	# commands. What a bug!
+	source /env/bin/hush_hack 
+fi
+
+if [ -z $eth0.ethaddr ]; then
+	while [ -z $eth0.ethaddr ]; do
+		readline "no MAC address set for eth0. please enter the one found on your board: " eth0.ethaddr
+	done
+	echo -a /env/config "eth0.ethaddr=$eth0.ethaddr"
+fi
+
+echo
+echo -n "Hit any key to stop autoboot: "
+timeout -a $autoboot_timeout
+if [ $? != 0 ]; then
+	echo
+	echo "type update_kernel nand|nor [<imagename>] to update kernel into flash"
+	echo "type update_root nand|nor [<imagename>] to update rootfs into flash"
+	echo
+	exit
+fi
+
+boot
diff --git a/board/phycard-i.MX27/env/bin/update_kernel b/board/phycard-i.MX27/env/bin/update_kernel
new file mode 100644
index 0000000000..05c822d860
--- /dev/null
+++ b/board/phycard-i.MX27/env/bin/update_kernel
@@ -0,0 +1,15 @@
+#!/bin/sh
+
+. /env/config
+
+image=$uimage
+if [ x$1 = xnand ]; then
+	part=/dev/nand0.kernel.bb
+elif [ x$1 = xnor ]; then
+	part=/dev/nor0.kernel
+else
+	echo "usage: $0 nor|nand [imagename]"
+	exit 1
+fi
+
+. /env/bin/_update $2
diff --git a/board/phycard-i.MX27/env/bin/update_root b/board/phycard-i.MX27/env/bin/update_root
new file mode 100644
index 0000000000..eaf36ebcea
--- /dev/null
+++ b/board/phycard-i.MX27/env/bin/update_root
@@ -0,0 +1,16 @@
+#!/bin/sh
+
+. /env/config
+
+image=$uimage
+if [ x$1 = xnand ]; then
+	part=/dev/nand0.root.bb
+elif [ x$1 = xnor ]; then
+	part=/dev/nor0.root
+else
+	echo "usage: $0 nor|nand [imagename]"
+	exit 1
+fi
+
+. /env/bin/_update $2
+
diff --git a/board/phycard-i.MX27/env/config b/board/phycard-i.MX27/env/config
new file mode 100644
index 0000000000..c0e63c13c6
--- /dev/null
+++ b/board/phycard-i.MX27/env/config
@@ -0,0 +1,25 @@
+#!/bin/sh
+
+# can be either 'net', 'nor' or 'nand''
+kernel=net
+root=net
+
+uimage=uImage-pca100
+jffs2=root-pca100.jffs2
+
+autoboot_timeout=3
+
+nfsroot="/tmp/root"
+bootargs="console=ttymxc0,115200"
+
+nand_parts="256k(uboot)ro,128k(ubootenv),1536k(kernel),-(root)"
+rootpart_nand="/dev/mtdblock3"
+
+# use 'dhcp' to do dhcp in uboot and in kernel
+ip=dhcp
+
+# or set your networking parameters here
+#eth0.ipaddr=a.b.c.d
+#eth0.netmask=a.b.c.d
+#eth0.gateway=a.b.c.d
+#eth0.serverip=a.b.c.d
diff --git a/board/phycard-i.MX27/lowlevel_init.S b/board/phycard-i.MX27/lowlevel_init.S
new file mode 100644
index 0000000000..64c55778b1
--- /dev/null
+++ b/board/phycard-i.MX27/lowlevel_init.S
@@ -0,0 +1,111 @@
+/*
+ * For clock initialization, see chapter 3 of the "MCIMX27 Multimedia
+ * Applications Processor Reference Manual, Rev. 0.2".
+ *
+ */
+
+#include <config.h>
+#include <asm/arch/imx-regs.h>
+
+#define writel(val, reg) \
+	ldr		r0,	=reg;	\
+	ldr		r1,	=val;	\
+	str		r1,   [r0];
+
+
+#define ESDCTL0_VAL (ESDCTL0_SDE | ESDCTL0_ROW13 | ESDCTL0_COL10)
+
+.macro sdram_init
+	/*
+	 * DDR on CSD0
+	 */
+	writel(0x00000008, ESDMISC) /* Enable DDR SDRAM operation */
+
+	writel(0x55555555, DSCR(3)) /* Set the driving strength   */
+	writel(0x55555555, DSCR(5))
+	writel(0x55555555, DSCR(6))
+	writel(0x00005005, DSCR(7))
+	writel(0x15555555, DSCR(8))
+
+	writel(0x00000004, ESDMISC) /* Initial reset */
+	writel(0x006ac73a, ESDCFG0)
+
+	writel(ESDCTL0_VAL | ESDCTL0_SMODE_PRECHARGE, ESDCTL0) /* precharge CSD0 all banks */
+	writel(0x00000000, 0xA0000F00)	/* CSD0 precharge address (A10 = 1) */
+	writel(ESDCTL0_VAL | ESDCTL0_SMODE_AUTO_REFRESH, ESDCTL0)
+
+	ldr	r0, =0xa0000f00
+	mov	r1, #0
+	mov	r2, #8
+1:
+	str	r1, [r0]
+	subs	r2, #1
+	bne	1b
+
+	writel(ESDCTL0_VAL | ESDCTL0_SMODE_LOAD_MODE, ESDCTL0)
+	ldr		r0, =0xA0000033
+	mov		r1, #0xda
+	strb		r1, [r0]
+	ldr		r0, =0xA1000000
+	mov		r1, #0xff
+	strb		r1, [r0]
+	writel(ESDCTL0_VAL | ESDCTL0_DSIZ_31_0 | ESDCTL0_REF4 | ESDCTL0_BL | ESDCTL0_SMODE_NORMAL, ESDCTL0)
+.endm
+
+	.section ".text_bare_init","ax"
+
+.globl board_init_lowlevel
+board_init_lowlevel:
+
+	mov	r10, lr
+
+	/* ahb lite ip interface */
+	writel(0x20040304, AIPI1_PSR0)
+	writel(0xDFFBFCFB, AIPI1_PSR1)
+	writel(0x00000000, AIPI2_PSR0)
+	writel(0xFFFFFFFF, AIPI2_PSR1)
+
+	/* skip sdram initialization if we run from ram */
+	cmp	pc, #0xa0000000
+	bls	1f
+	cmp	pc, #0xc0000000
+	bhi	1f
+
+	mov	pc,r10
+1:
+	sdram_init
+
+#ifdef CONFIG_NAND_IMX_BOOT
+	ldr	sp, =0xa0f00000		/* Setup a temporary stack in SDRAM */
+
+	ldr	r0, =IMX_NFC_BASE		/* start of NFC SRAM                */
+	ldr	r2, =IMX_NFC_BASE + 0x1000	/* end of NFC SRAM                  */
+
+	/* skip NAND boot if not running from NFC space */
+	cmp	pc, r0
+	bls	ret
+	cmp	pc, r2
+	bhi	ret
+
+	/* Move ourselves out of NFC SRAM */
+	ldr	r1, =TEXT_BASE
+
+copy_loop:
+	ldmia	r0!, {r3-r9}		/* copy from source address [r0]    */
+	stmia	r1!, {r3-r9}		/* copy to   target address [r1]    */
+	cmp	r0, r2			/* until source end addreee [r2]    */
+	ble	copy_loop
+
+	ldr	pc, =1f			/* Jump to SDRAM                    */
+1:
+	bl	nand_boot		/* Load U-Boot from NAND Flash      */
+
+	ldr	r1, =IMX_NFC_BASE - TEXT_BASE
+	sub	r10, r10, r1		/* adjust return address from NFC SRAM */
+					/* to SDRAM                            */
+
+#endif /* CONFIG_NAND_IMX_BOOT */
+
+ret:
+	mov	pc,r10
+
diff --git a/board/phycard-i.MX27/pca100.c b/board/phycard-i.MX27/pca100.c
new file mode 100644
index 0000000000..eec6dd761f
--- /dev/null
+++ b/board/phycard-i.MX27/pca100.c
@@ -0,0 +1,201 @@
+	/*
+ * Copyright (C) 2007 Sascha Hauer, Pengutronix 
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <net.h>
+#include <cfi_flash.h>
+#include <init.h>
+#include <environment.h>
+#include <asm/arch/imx-regs.h>
+#include <fec.h>
+#include <asm/arch/gpio.h>
+#include <asm/armlinux.h>
+#include <asm/mach-types.h>
+#include <partition.h>
+#include <fs.h>
+#include <fcntl.h>
+#include <nand.h>
+#include <spi/spi.h>
+#include <asm/io.h>
+#include <asm/arch/imx-nand.h>
+#include <asm/arch/imx-pll.h>
+
+static struct device_d sdram_dev = {
+	.name     = "ram",
+	.id       = "ram0",
+
+	.map_base = 0xa0000000,
+	.size     = 128 * 1024 * 1024,
+
+	.type     = DEVICE_TYPE_DRAM,
+};
+
+static struct fec_platform_data fec_info = {
+	.xcv_type = MII100,
+	.phy_addr = 1,
+};
+
+static struct device_d fec_dev = {
+	.name     = "fec_imx",
+	.id       = "eth0",
+	.map_base = 0x1002b000,
+	.platform_data	= &fec_info,
+	.type     = DEVICE_TYPE_ETHER,
+};
+
+struct imx_nand_platform_data nand_info = {
+	.width = 1,
+	.hw_ecc = 1,
+};
+
+static struct device_d nand_dev = {
+	.name     = "imx_nand",
+	.map_base = 0xd8000000,
+	.platform_data	= &nand_info,
+};
+
+static int pca100_devices_init(void)
+{
+	int i;
+	struct device_d *nand, *dev;
+
+	unsigned int mode[] = {
+		PD0_AIN_FEC_TXD0,
+		PD1_AIN_FEC_TXD1,
+		PD2_AIN_FEC_TXD2,
+		PD3_AIN_FEC_TXD3,
+		PD4_AOUT_FEC_RX_ER,
+		PD5_AOUT_FEC_RXD1,
+		PD6_AOUT_FEC_RXD2,
+		PD7_AOUT_FEC_RXD3,
+		PD8_AF_FEC_MDIO,
+		PD9_AIN_FEC_MDC | GPIO_PUEN,
+		PD10_AOUT_FEC_CRS,
+		PD11_AOUT_FEC_TX_CLK,
+		PD12_AOUT_FEC_RXD0,
+		PD13_AOUT_FEC_RX_DV,
+		PD14_AOUT_FEC_CLR,
+		PD15_AOUT_FEC_COL,
+		PD16_AIN_FEC_TX_ER,
+		PF23_AIN_FEC_TX_EN,
+		PE12_PF_UART1_TXD,
+		PE13_PF_UART1_RXD,
+		PE14_PF_UART1_CTS,
+		PE15_PF_UART1_RTS,
+		PD25_PF_CSPI1_RDY,
+		PD26_PF_CSPI1_SS2,
+		PD27_PF_CSPI1_SS1,
+		PD28_PF_CSPI1_SS0,
+		PD29_PF_CSPI1_SCLK,
+		PD30_PF_CSPI1_MISO,
+		PD31_PF_CSPI1_MOSI,
+	};
+
+	/* initizalize gpios */
+	for (i = 0; i < ARRAY_SIZE(mode); i++)
+		imx_gpio_mode(mode[i]);
+
+	register_device(&nand_dev);
+	register_device(&sdram_dev);
+	register_device(&fec_dev);
+
+	PCCR1 |= PCCR1_PERCLK2_EN;
+
+	nand = get_device_by_path("/dev/nand0");
+	dev = dev_add_partition(nand, 0x00000, 0x40000, PARTITION_FIXED, "self_raw");
+	dev_add_bb_dev(dev, "self0");
+
+	dev = dev_add_partition(nand, 0x40000, 0x20000, PARTITION_FIXED, "env_raw");
+	dev_add_bb_dev(dev, "env0");
+
+	armlinux_set_bootparams((void *)0xa0000100);
+	armlinux_set_architecture(2149);
+
+	return 0;
+}
+
+device_initcall(pca100_devices_init);
+
+static struct device_d pca100_serial_device = {
+	.name     = "imx_serial",
+	.id       = "cs0",
+	.map_base = IMX_UART1_BASE,
+	.size     = 4096,
+	.type     = DEVICE_TYPE_CONSOLE,
+};
+
+static int pca100_console_init(void)
+{
+	register_device(&pca100_serial_device);
+	return 0;
+}
+
+console_initcall(pca100_console_init);
+
+#ifdef CONFIG_NAND_IMX_BOOT
+void __bare_init nand_boot(void)
+{
+	imx_nand_load_image((void *)TEXT_BASE, 256 * 1024, 512, 16384);
+}
+#endif
+
+static int pll_init(void)
+{
+	int i = 0;
+
+        /* for i.MX27 TO2, Set divider of H264_CLK to zero, NFC to 3. */
+	PCDR0 &= ~0x0000FC00;
+
+        /* Configure PCDR */
+        /* Configure PCDR1 */
+	PCDR1 = 0x09030913;
+
+        /* Configure PCCR0 and PCCR1 */
+	PCCR0 = 0x3108480F;
+	PCCR1 |= 0x0780;
+
+	CSCR |= CSCR_UPDATE_DIS;
+
+	MPCTL0 = IMX_PLL_PD(0) |
+		 IMX_PLL_MFD(51) |
+		 IMX_PLL_MFI(7) |
+		 IMX_PLL_MFN(35); /* 399 MHz */
+
+	SPCTL0 = IMX_PLL_PD(1) |
+		 IMX_PLL_MFD(12) |
+		 IMX_PLL_MFI(9) |
+		 IMX_PLL_MFN(3); /* SPLL = 2 * 26 * 4.61538 MHz = 240 MHz */
+
+	CSCR = CSCR_MPLL_RESTART | CSCR_SPLL_RESTART | CSCR_ARM_SRC_MPLL |
+	       CSCR_MCU_SEL | CSCR_SP_SEL | CSCR_FPM_EN | CSCR_MPEN |
+	       CSCR_SPEN | CSCR_ARM_DIV(0) | CSCR_AHB_DIV(3) | CSCR_USB_DIV(3) |
+	       CSCR_SD_CNT(3) | CSCR_SSI2_SEL | CSCR_SSI1_SEL | CSCR_H264_SEL |
+	       CSCR_MSHC_SEL;
+
+	while (i++ < 1000) {
+		while (CCSR & CCSR_32K_SR);
+		while (!(CCSR & CCSR_32K_SR));
+	}
+
+	return 0;
+}
+
+core_initcall(pll_init);
+
diff --git a/board/phycard-i.MX27/pca100.dox b/board/phycard-i.MX27/pca100.dox
new file mode 100644
index 0000000000..9b17674a21
--- /dev/null
+++ b/board/phycard-i.MX27/pca100.dox
@@ -0,0 +1,8 @@
+/** @page pcm038 Phytec's phyCORE-i.MX27
+
+This CPU card is based on a Freescale i.MX27 CPU. The card is shipped with:
+
+- up to 32MiB NOR type Flash Memory
+- 32MiB synchronous dynamic RAM
+
+*/