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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2010-03-30 11:07:43 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2010-03-30 14:15:04 +0200 |
| commit | 844ca16e1f9b398ab118587d32e65e8f7d1f77d2 (patch) | |
| tree | 9c48a4e5cd26f58b0ad3119bd9eae56378f1a38b | |
| parent | be00ed538c15a3818c2d692e0e66fd2e75a66a25 (diff) | |
| download | barebox-844ca16e1f9b398ab118587d32e65e8f7d1f77d2.tar.gz barebox-844ca16e1f9b398ab118587d32e65e8f7d1f77d2.tar.xz | |
pcm043: enable l2x0 cache
Also, initialize the MMU in a postcore_initcall to enable
it earlier.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| -rw-r--r-- | arch/arm/mach-imx/Kconfig | 3 | ||||
| -rw-r--r-- | board/pcm043/pcm043.c | 15 |
2 files changed, 10 insertions, 8 deletions
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index eeb392aa1e..10561f0866 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -228,7 +228,8 @@ config MACH_PCM043 bool "phyCORE-i.MX35" select HAS_CFI select HAVE_MMU - select MACH_HAS_LOWLEVEL_INIT + select MACH_HAS_LOWLEVEL_INIT + select ARCH_HAS_L2X0 help Say Y here if you are using Phytec's phyCORE-i.MX35 (pcm043) equipped with a Freescale i.MX35 Processor diff --git a/board/pcm043/pcm043.c b/board/pcm043/pcm043.c index 7b0bad1fb3..2ce7e3a587 100644 --- a/board/pcm043/pcm043.c +++ b/board/pcm043/pcm043.c @@ -145,7 +145,7 @@ static struct device_d imx_ipu_fb_dev = { }; #ifdef CONFIG_MMU -static void pcm043_mmu_init(void) +static int pcm043_mmu_init(void) { mmu_init(); @@ -159,20 +159,21 @@ static void pcm043_mmu_init(void) #else arm_create_section(0x0, TEXT_BASE, 1, PMD_SECT_DEF_UNCACHED); #endif + mmu_enable(); + +#ifdef CONFIG_CACHE_L2X0 + l2x0_init((void __iomem *)0x30000000, 0x00030024, 0x00000000); +#endif + return 0; } -#else -static void pcm043_mmu_init(void) -{ -} +postcore_initcall(pcm043_mmu_init); #endif static int imx35_devices_init(void) { uint32_t reg; - pcm043_mmu_init(); - /* CS0: Nor Flash */ writel(0x0000cf03, CSCR_U(0)); writel(0x10000d03, CSCR_L(0)); |