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| author | Juergen Beisert <juergen@kreuzholzen.de> | 2011-02-16 19:13:30 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2011-03-03 16:15:53 +0100 |
| commit | c3f4e1d6cb362ac7648379c104e066341c418746 (patch) | |
| tree | 9f8ddaf3e623c26dda7889d8c4bb8ea50d46b967 | |
| parent | 073f39c95ee79a694a6a88ae4ea7c3d4fefc676c (diff) | |
| download | barebox-c3f4e1d6cb362ac7648379c104e066341c418746.tar.gz barebox-c3f4e1d6cb362ac7648379c104e066341c418746.tar.xz | |
MACH-S3C2440: Fix NAND controller for this CPU
There are a few but important differences in S3C2410 and S3C2440. This patch
fixes them for the S3C2440 CPU.
Signed-off-by: Juergen Beisert <juergen@kreuzholzen.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| -rw-r--r-- | drivers/mtd/nand/nand_s3c2410.c | 18 |
1 files changed, 15 insertions, 3 deletions
diff --git a/drivers/mtd/nand/nand_s3c2410.c b/drivers/mtd/nand/nand_s3c2410.c index 8a47dc6c2f..76ea9db46e 100644 --- a/drivers/mtd/nand/nand_s3c2410.c +++ b/drivers/mtd/nand/nand_s3c2410.c @@ -77,14 +77,13 @@ #define NFCMD 0x08 #define NFADDR 0x0C #define NFDATA 0x10 - -#define NFECC 0x1C #define NFSTAT 0x20 +#define NFECC 0x2C /* S3C2440 specific bits */ #define NFSTAT_BUSY (1) #define NFCONT_nFCE (1 << 1) -#define NFCONF_INITECC (1 << 12) +#define NFCONT_INITECC (1 << 4) #define NFCONT_EN (1) #endif /* CONFIG_CPU_S3C2440 */ @@ -272,7 +271,12 @@ static void s3c2410_nand_enable_hwecc(struct mtd_info *mtd, int mode) struct nand_chip *nand_chip = mtd->priv; struct s3c24x0_nand_host *host = nand_chip->priv; +#ifdef CONFIG_CPU_S3C2410 writel(readl(host->base + NFCONF) | NFCONF_INITECC , host->base + NFCONF); +#endif +#ifdef CONFIG_CPU_S3C2440 + writel(readl(host->base + NFCONT) | NFCONT_INITECC , host->base + NFCONT); +#endif } static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd, const uint8_t *dat, uint8_t *ecc_code) @@ -280,10 +284,18 @@ static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd, const uint8_t *dat, struct nand_chip *nand_chip = mtd->priv; struct s3c24x0_nand_host *host = nand_chip->priv; +#ifdef CONFIG_CPU_S3C2410 ecc_code[0] = readb(host->base + NFECC); ecc_code[1] = readb(host->base + NFECC + 1); ecc_code[2] = readb(host->base + NFECC + 2); +#endif +#ifdef CONFIG_CPU_S3C2440 + unsigned long ecc = readl(host->base + NFECC); + ecc_code[0] = ecc; + ecc_code[1] = ecc >> 8; + ecc_code[2] = ecc >> 16; +#endif return 0; } |