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authorSascha Hauer <s.hauer@pengutronix.de>2011-04-07 17:02:56 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2011-04-11 15:58:21 +0200
commitd332597c7c161d3f59c48102e1d681bd13b6e0e8 (patch)
tree226f1264f2e4a366ab4d8ec638d9330bd2daa841
parent523daf675a2d9a1fd01edc854c98eb4ad2726962 (diff)
downloadbarebox-d332597c7c161d3f59c48102e1d681bd13b6e0e8.tar.gz
barebox-d332597c7c161d3f59c48102e1d681bd13b6e0e8.tar.xz
ARM: make exception handling optional
On several boards without MMU support the vectors cannot be mapped to 0x0 and exception support is nonfunctional anyway, so make this configurable. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r--arch/arm/Kconfig5
-rw-r--r--arch/arm/cpu/Makefile4
-rw-r--r--arch/arm/cpu/start.c10
3 files changed, 17 insertions, 2 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 4392620419..6b2b40077a 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -120,9 +120,14 @@ config ARM_OPTIMZED_STRING_FUNCTIONS
These functions work much faster than the normal versions but
increase your binary size.
+config ARM_EXCEPTIONS
+ bool "enable arm exception handling support"
+ default y
+
config ARM_UNWIND
bool "enable stack unwinding support"
depends on AEABI
+ depends on ARM_EXCEPTIONS
help
This option enables stack unwinding support in barebox
using the information automatically generated by the
diff --git a/arch/arm/cpu/Makefile b/arch/arm/cpu/Makefile
index 036768eb60..e30ae1cc1f 100644
--- a/arch/arm/cpu/Makefile
+++ b/arch/arm/cpu/Makefile
@@ -1,6 +1,6 @@
obj-y += cpu.o
-obj-y += exceptions.o
-obj-y += interrupts.o
+obj-$(CONFIG_ARM_EXCEPTIONS) += exceptions.o
+obj-$(CONFIG_ARM_EXCEPTIONS) += interrupts.o
obj-y += start.o
#
diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index e0fb7123cf..1f8eed8a4f 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -31,6 +31,7 @@ void __naked __section(.text_entry) exception_vectors(void)
{
__asm__ __volatile__ (
"b reset\n" /* reset */
+#ifdef CONFIG_ARM_EXCEPTIONS
"ldr pc, =undefined_instruction\n" /* undefined instruction */
"ldr pc, =software_interrupt\n" /* software interrupt (SWI) */
"ldr pc, =prefetch_abort\n" /* prefetch abort */
@@ -38,6 +39,15 @@ void __naked __section(.text_entry) exception_vectors(void)
"ldr pc, =not_used\n" /* (reserved) */
"ldr pc, =irq\n" /* irq (interrupt) */
"ldr pc, =fiq\n" /* fiq (fast interrupt) */
+#else
+ "1: bne 1b\n" /* undefined instruction */
+ "1: bne 1b\n" /* software interrupt (SWI) */
+ "1: bne 1b\n" /* prefetch abort */
+ "1: bne 1b\n" /* data abort */
+ "1: bne 1b\n" /* (reserved) */
+ "1: bne 1b\n" /* irq (interrupt) */
+ "1: bne 1b\n" /* fiq (fast interrupt) */
+#endif
);
}