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authorTeresa Gámez <t.gamez@phytec.de>2011-12-12 15:50:54 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2011-12-13 11:33:58 +0100
commit6accea7a5cc68df52d4c3b22ff269ce8c43e2c60 (patch)
treeee6740d14500a1a46ff52b42a2f01385473a3401
parent54a1df3005f533336d5012f80c462c2505dbb88a (diff)
downloadbarebox-6accea7a5cc68df52d4c3b22ff269ce8c43e2c60.tar.gz
barebox-6accea7a5cc68df52d4c3b22ff269ce8c43e2c60.tar.xz
pcm038: Updated NOR-Flash CS values
Newer pcm038 are populated with a PC28F256P30BFE NOR-Flash. This flash requires different CS values. The values also work with older NOR-Flashes. Signed-off-by: Teresa Gámez <t.gamez@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r--arch/arm/boards/pcm038/pcm038.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/boards/pcm038/pcm038.c b/arch/arm/boards/pcm038/pcm038.c
index 0b07a6378a..6b8897e00d 100644
--- a/arch/arm/boards/pcm038/pcm038.c
+++ b/arch/arm/boards/pcm038/pcm038.c
@@ -223,9 +223,9 @@ static int pcm038_devices_init(void)
};
/* configure 16 bit nor flash on cs0 */
- CS0U = 0x0000CC03;
- CS0L = 0xa0330D01;
- CS0A = 0x00220800;
+ CS0U = 0x22C2CF00;
+ CS0L = 0x75000D01;
+ CS0A = 0x00000900;
/* configure SRAM on cs1 */
CS1U = 0x0000d843;