diff options
| author | Sascha Hauer <s.hauer@pengutronix.de> | 2012-04-05 11:09:58 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2012-04-05 11:09:58 +0200 |
| commit | 2a6460cbb6f5e4ca02f988c7dac243882d7e080a (patch) | |
| tree | 7131c44c619fe70f0c178064b56bd4d80d64ca6f | |
| parent | 4eb3478212e49240a1d9e9d8a1e212049829ef68 (diff) | |
| parent | ac29648413d1a33126ad1f98714717cbee452e55 (diff) | |
| download | barebox-2a6460cbb6f5e4ca02f988c7dac243882d7e080a.tar.gz barebox-2a6460cbb6f5e4ca02f988c7dac243882d7e080a.tar.xz | |
Merge branch 'next'
177 files changed, 5676 insertions, 1225 deletions
@@ -1000,8 +1000,8 @@ endif # CONFIG_MODULES # Directories & files removed with 'make clean' CLEAN_DIRS += $(MODVERDIR) CLEAN_FILES += barebox System.map include/generated/barebox_default_env.h \ - .tmp_version .tmp_barebox* barebox.bin barebox.S \ - .tmp_kallsyms* barebox_default_env barebox.ldr Doxyfile.version + .tmp_version .tmp_barebox* barebox.bin barebox.map barebox.S \ + .tmp_kallsyms* barebox_default_env* barebox.ldr Doxyfile.version # Directories & files removed with 'make mrproper' MRPROPER_DIRS += include/config include2 usr/include diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 4c6a566ff2..529948691d 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -72,6 +72,7 @@ board-$(CONFIG_MACH_AT91SAM9261EK) := at91sam9261ek board-$(CONFIG_MACH_AT91SAM9263EK) := at91sam9263ek board-$(CONFIG_MACH_AT91SAM9G10EK) := at91sam9261ek board-$(CONFIG_MACH_AT91SAM9G20EK) := at91sam9260ek +board-$(CONFIG_MACH_AT91SAM9X5EK) := at91sam9x5ek board-$(CONFIG_MACH_AT91SAM9M10G45EK) := at91sam9m10g45ek board-$(CONFIG_MACH_DSS11) := dss11 board-$(CONFIG_MACH_EDB9301) := edb93xx @@ -102,6 +103,7 @@ board-$(CONFIG_MACH_PANDA) := panda board-$(CONFIG_MACH_PCM049) := pcm049 board-$(CONFIG_MACH_PCA100) := phycard-i.MX27 board-$(CONFIG_MACH_PCAAL1) := phycard-a-l1 +board-$(CONFIG_MACH_PCAAXL2) := phycard-a-xl2 board-$(CONFIG_MACH_PCM037) := pcm037 board-$(CONFIG_MACH_PCM038) := pcm038 board-$(CONFIG_MACH_PCM043) := pcm043 diff --git a/arch/arm/boards/at91rm9200ek/env/bin/init_board b/arch/arm/boards/at91rm9200ek/env/bin/init_board new file mode 100644 index 0000000000..0d40eb41a5 --- /dev/null +++ b/arch/arm/boards/at91rm9200ek/env/bin/init_board @@ -0,0 +1,11 @@ +#!/bin/sh + +if [ $at91_udc0.vbus != 1 ] +then + echo "No USB Device cable plugged, normal boot" + exit +fi + +autoboot_timeout=16 +echo "enable tty over USB Device, increase the boot delay to ${autoboot_timeout}s" +usbserial diff --git a/arch/arm/boards/at91rm9200ek/env/config b/arch/arm/boards/at91rm9200ek/env/config index 12655c2b43..735bb107aa 100644 --- a/arch/arm/boards/at91rm9200ek/env/config +++ b/arch/arm/boards/at91rm9200ek/env/config @@ -2,7 +2,8 @@ # use 'dhcp' to do dhcp in barebox and in kernel # use 'none' if you want to skip kernel ip autoconfiguration -ip=dhcp +ip=dhcp-barebox +dhcp_vendor_id=barebox-at91rm9200ek # or set your networking parameters here #eth0.ipaddr=a.b.c.d @@ -11,7 +12,7 @@ ip=dhcp #eth0.serverip=a.b.c.d # can be either 'nfs', 'tftp' or 'nor' -kernel_loc=tftp +kernel_loc=nfs # can be either 'net', 'nor' or 'initrd' rootfs_loc=net @@ -24,7 +25,7 @@ kernelimage=uImage #kernelimage=Image #kernelimage=Image.lzo -nor_parts="256k(barebox)ro,64k(bareboxenv),1536k(kernel),-(root)" +nor_parts="256k(barebox)ro,64k(bareboxenv),3M(kernel),-(root)" rootfs_mtdblock_nor=3 autoboot_timeout=3 diff --git a/arch/arm/boards/at91rm9200ek/init.c b/arch/arm/boards/at91rm9200ek/init.c index b2008a4394..6911447aaf 100644 --- a/arch/arm/boards/at91rm9200ek/init.c +++ b/arch/arm/boards/at91rm9200ek/init.c @@ -47,6 +47,65 @@ static int at91rm9200ek_mem_init(void) } mem_initcall(at91rm9200ek_mem_init); +static struct at91_usbh_data ek_usbh_data = { + .ports = 2, +}; + +#ifdef CONFIG_LED_GPIO +struct gpio_led ek_leds[] = { + { + .gpio = AT91_PIN_PB0, + .active_low = 1, + .led = { + .name = "green", + }, + }, { + .gpio = AT91_PIN_PB1, + .active_low = 1, + .led = { + .name = "yellow", + }, + }, { + .gpio = AT91_PIN_PB2, + .active_low = 1, + .led = { + .name = "red", + }, + }, +}; + +static void ek_device_add_leds(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(ek_leds); i++) { + at91_set_gpio_output(ek_leds[i].gpio, ek_leds[i].active_low); + led_gpio_register(&ek_leds[i]); + } + led_set_trigger(LED_TRIGGER_HEARTBEAT, &ek_leds[1].led); +} +#else +static void ek_device_add_leds(void) {} +#endif + +#if defined(CONFIG_USB_GADGET_DRIVER_AT91) +/* + * USB Device port + */ +static struct at91_udc_data __initdata ek_udc_data = { + .vbus_pin = AT91_PIN_PD4, + .pullup_pin = AT91_PIN_PD5, +}; + +static void ek_add_device_udc(void) +{ + at91_add_device_udc(&ek_udc_data); + at91_set_multi_drive(ek_udc_data.pullup_pin, 1); /* pullup_pin is connected to reset */ +} +#else +static void ek_add_device_udc(void) {} +#endif + static int at91rm9200ek_devices_init(void) { /* @@ -55,9 +114,13 @@ static int at91rm9200ek_devices_init(void) */ at91_set_gpio_output(AT91_PIN_PA23, 1); - at91_add_device_eth(ðer_pdata); + at91_add_device_eth(0, ðer_pdata); add_cfi_flash_device(0, AT91_CHIPSELECT_0, 0, 0); + /* USB Host */ + at91_add_device_usbh_ohci(&ek_usbh_data); + ek_device_add_leds(); + ek_add_device_udc(); #if defined(CONFIG_DRIVER_CFI) || defined(CONFIG_DRIVER_CFI_OLD) devfs_add_partition("nor0", 0x00000, 0x40000, PARTITION_FIXED, "self"); diff --git a/arch/arm/boards/at91sam9260ek/env/config b/arch/arm/boards/at91sam9260ek/env/config index ba14c2bfc5..2c0f075fa8 100644 --- a/arch/arm/boards/at91sam9260ek/env/config +++ b/arch/arm/boards/at91sam9260ek/env/config @@ -2,7 +2,14 @@ # use 'dhcp' to do dhcp in barebox and in kernel # use 'none' if you want to skip kernel ip autoconfiguration -ip=dhcp +ip=dhcp-barebox + +if [ x$armlinux_architecture = x1099 ] +then + dhcp_vendor_id=barebox-at91sam9260ek +else + dhcp_vendor_id=barebox-at91sam9g20ek +fi # or set your networking parameters here #eth0.ipaddr=a.b.c.d @@ -19,14 +26,9 @@ rootfs_loc=net rootfs_type=ubifs rootfsimage=root.$rootfs_type -# The image type of the kernel. Can be uimage, zimage, raw, or raw_lzo -#kernelimage_type=zimage #kernelimage=zImage -kernelimage_type=uimage kernelimage=uImage -#kernelimage_type=raw #kernelimage=Image -#kernelimage_type=raw_lzo #kernelimage=Image.lzo nand_device=atmel_nand diff --git a/arch/arm/boards/at91sam9260ek/init.c b/arch/arm/boards/at91sam9260ek/init.c index 03abc0e3fc..a1d37507af 100644 --- a/arch/arm/boards/at91sam9260ek/init.c +++ b/arch/arm/boards/at91sam9260ek/init.c @@ -254,7 +254,7 @@ static int at91sam9260ek_devices_init(void) { ek_add_device_nand(); at91sam9260ek_phy_reset(); - at91_add_device_eth(&macb_pdata); + at91_add_device_eth(0, &macb_pdata); at91_add_device_usbh_ohci(&ek_usbh_data); at91_add_device_udc(&ek_udc_data); ek_usb_add_device_mci(); diff --git a/arch/arm/boards/at91sam9261ek/env/bin/init_board b/arch/arm/boards/at91sam9261ek/env/bin/init_board new file mode 100644 index 0000000000..a76a660aba --- /dev/null +++ b/arch/arm/boards/at91sam9261ek/env/bin/init_board @@ -0,0 +1,51 @@ +#!/bin/sh + +button_name="dfu_bp" +button_wait=5 + +product_id=0x1234 +vendor_id=0x4321 + +dfu_config="/dev/nand0.barebox.bb(barebox)sr,/dev/nand0.kernel.bb(kernel)r,/dev/nand0.rootfs.bb(rootfs)r" + +if [ $at91_udc0.vbus != 1 ] +then + echo "No USB Device cable plugged, normal boot" + exit +fi + +gpio_get_value ${dfu_button} +if [ $? != 0 ] +then + autoboot_timeout=16 + echo "enable tty over USB Device, increase the boot delay to ${autoboot_timeout}s" + usbserial + exit +fi + +echo "${button_name} pressed detected wait ${button_wait}s" +timeout -s -a ${button_wait} + +if [ $at91_udc0.vbus != 1 ] +then + echo "No USB Device cable plugged, normal boot" + exit +fi + +gpio_get_value ${dfu_button} +if [ $? != 0 ] +then + echo "${button_name} released, normal boot" + autoboot_timeout=16 + echo "enable tty over USB Device, increase the boot delay to ${autoboot_timeout}s" + usbserial + exit +fi + +echo "" +echo "Start DFU Mode" +echo "" + +led ds7 1 +dfu ${dfu_config} -P ${product_id} -V ${vendor_id} +led ds7 0 diff --git a/arch/arm/boards/at91sam9261ek/env/config b/arch/arm/boards/at91sam9261ek/env/config index d6eeea42f9..be4d37ce4e 100644 --- a/arch/arm/boards/at91sam9261ek/env/config +++ b/arch/arm/boards/at91sam9261ek/env/config @@ -2,7 +2,14 @@ # use 'dhcp' to do dhcp in barebox and in kernel # use 'none' if you want to skip kernel ip autoconfiguration -ip=dhcp +ip=dhcp-barebox + +if [ x$armlinux_architecture = x848 ] +then + dhcp_vendor_id=barebox-at91sam9261ek +else + dhcp_vendor_id=barebox-at91sam9g10ek +fi # or set your networking parameters here #eth0.ipaddr=a.b.c.d @@ -25,13 +32,12 @@ kernelimage=uImage #kernelimage=Image.lzo nand_device=atmel_nand -nand_parts="256k(barebox)ro,128k(bareboxenv),1536k(kernel),-(root)" -rootfs_mtdblock_nand=3 +nand_parts="128k(at91bootstrap),256k(barebox)ro,128k(bareboxenv),128k(bareboxenv2),4M(kernel),120M(rootfs),-(data)" +rootfs_mtdblock_nand=5 autoboot_timeout=3 bootargs="console=ttyS0,115200" # set a fancy prompt (if support is compiled in) -PS1="\e[1;32mbarebox@\e[1;31m\h:\w\e[0m " - +PS1="\e[1;32mbarebox@\e[1;31m\h:\w\e[0m\n# " diff --git a/arch/arm/boards/at91sam9261ek/init.c b/arch/arm/boards/at91sam9261ek/init.c index 8b192b2cf7..acc71f4f58 100644 --- a/arch/arm/boards/at91sam9261ek/init.c +++ b/arch/arm/boards/at91sam9261ek/init.c @@ -30,6 +30,7 @@ #include <io.h> #include <asm/hardware.h> #include <nand.h> +#include <sizes.h> #include <linux/mtd/nand.h> #include <mach/at91_pmc.h> #include <mach/board.h> @@ -38,6 +39,9 @@ #include <mach/at91sam9_smc.h> #include <mach/sam9_smc.h> #include <dm9000.h> +#include <gpio_keys.h> +#include <readkey.h> +#include <led.h> static struct atmel_nand_data nand_pdata = { .ale = 22, @@ -133,6 +137,103 @@ static void __init ek_add_device_dm9000(void) static void __init ek_add_device_dm9000(void) {} #endif /* CONFIG_DRIVER_NET_DM9K */ +#if defined(CONFIG_USB_GADGET_DRIVER_AT91) +/* + * USB Device port + */ +static struct at91_udc_data __initdata ek_udc_data = { + .vbus_pin = AT91_PIN_PB29, + .pullup_pin = 0, +}; + +static void ek_add_device_udc(void) +{ + at91_add_device_udc(&ek_udc_data); +} +#else +static void ek_add_device_udc(void) {} +#endif + +#ifdef CONFIG_KEYBOARD_GPIO +struct gpio_keys_button keys[] = { + { + .code = KEY_UP, + .gpio = AT91_PIN_PA26, + }, { + .code = KEY_DOWN, + .gpio = AT91_PIN_PA25, + }, { + .code = KEY_ENTER, + .gpio = AT91_PIN_PA24, + }, +}; + +struct gpio_keys_platform_data gk_pdata = { + .buttons = keys, + .nbuttons = ARRAY_SIZE(keys), +}; + +static void ek_add_device_keyboard_buttons(void) +{ + int i; + + for (i = 0; i < gk_pdata.nbuttons; i++) { + /* user push button, pull up enabled */ + keys[i].active_low = 1; + at91_set_GPIO_periph(keys[i].gpio, keys[i].active_low); + at91_set_deglitch(keys[i].gpio, 1); + } + + add_gpio_keys_device(-1, &gk_pdata); +} +#else +static void ek_add_device_keyboard_buttons(void) {} +#endif + +static void __init ek_add_device_buttons(void) +{ + at91_set_gpio_input(AT91_PIN_PA27, 1); + at91_set_deglitch(AT91_PIN_PA27, 1); + export_env_ull("dfu_button", AT91_PIN_PA27); + ek_add_device_keyboard_buttons(); +} + +#ifdef CONFIG_LED_GPIO +struct gpio_led ek_leds[] = { + { + .gpio = AT91_PIN_PA23, + .led = { + .name = "ds1", + }, + }, { + .gpio = AT91_PIN_PA14, + .active_low = 1, + .led = { + .name = "ds7", + }, + }, { + .gpio = AT91_PIN_PA13, + .active_low = 1, + .led = { + .name = "ds8", + }, + }, +}; + +static void ek_device_add_leds(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(ek_leds); i++) { + at91_set_gpio_output(ek_leds[i].gpio, ek_leds[i].active_low); + led_gpio_register(&ek_leds[i]); + } + led_set_trigger(LED_TRIGGER_HEARTBEAT, &ek_leds[0].led); +} +#else +static void ek_device_add_leds(void) {} +#endif + static int at91sam9261ek_mem_init(void) { at91_add_device_sdram(64 * 1024 * 1024); @@ -146,11 +247,17 @@ static int at91sam9261ek_devices_init(void) ek_add_device_nand(); ek_add_device_dm9000(); + ek_add_device_udc(); + ek_add_device_buttons(); + ek_device_add_leds(); - devfs_add_partition("nand0", 0x00000, 0x40000, PARTITION_FIXED, "self_raw"); + devfs_add_partition("nand0", 0x00000, SZ_128K, PARTITION_FIXED, "at91bootstrap_raw"); + devfs_add_partition("nand0", SZ_128K, SZ_256K, PARTITION_FIXED, "self_raw"); dev_add_bb_dev("self_raw", "self0"); - devfs_add_partition("nand0", 0x40000, 0x20000, PARTITION_FIXED, "env_raw"); + devfs_add_partition("nand0", SZ_256K + SZ_128K, SZ_128K, PARTITION_FIXED, "env_raw"); dev_add_bb_dev("env_raw", "env0"); + devfs_add_partition("nand0", SZ_512K, SZ_128K, PARTITION_FIXED, "env_raw1"); + dev_add_bb_dev("env_raw1", "env1"); armlinux_set_bootparams((void *)(AT91_CHIPSELECT_1 + 0x100)); if (machine_is_at91sam9g10ek()) diff --git a/arch/arm/boards/at91sam9263ek/env/bin/init_board b/arch/arm/boards/at91sam9263ek/env/bin/init_board new file mode 100644 index 0000000000..ae2ac7d766 --- /dev/null +++ b/arch/arm/boards/at91sam9263ek/env/bin/init_board @@ -0,0 +1,51 @@ +#!/bin/sh + +button_name="dfu_bp" +button_wait=5 + +product_id=0x1234 +vendor_id=0x4321 + +dfu_config="/dev/nand0.barebox.bb(barebox)sr,/dev/nand0.kernel.bb(kernel)r,/dev/nand0.rootfs.bb(rootfs)r" + +if [ $at91_udc0.vbus != 1 ] +then + echo "No USB Device cable plugged, normal boot" + exit +fi + +gpio_get_value ${dfu_button} +if [ $? != 0 ] +then + autoboot_timeout=16 + echo "enable tty over USB Device, increase the boot delay to ${autoboot_timeout}s" + usbserial + exit +fi + +echo "${button_name} pressed detected wait ${button_wait}s" +timeout -s -a ${button_wait} + +if [ $at91_udc0.vbus != 1 ] +then + echo "No USB Device cable plugged, normal boot" + exit +fi + +gpio_get_value ${dfu_button} +if [ $? != 0 ] +then + echo "${button_name} released, normal boot" + autoboot_timeout=16 + echo "enable tty over USB Device, increase the boot delay to ${autoboot_timeout}s" + usbserial + exit +fi + +echo "" +echo "Start DFU Mode" +echo "" + +led ds2 1 +dfu ${dfu_config} -P ${product_id} -V ${vendor_id} +led ds2 0 diff --git a/arch/arm/boards/at91sam9263ek/env/config b/arch/arm/boards/at91sam9263ek/env/config index e189b8e593..93eeb1e2ce 100644 --- a/arch/arm/boards/at91sam9263ek/env/config +++ b/arch/arm/boards/at91sam9263ek/env/config @@ -2,7 +2,8 @@ # use 'dhcp' to do dhcp in barebox and in kernel # use 'none' if you want to skip kernel ip autoconfiguration -ip=dhcp +ip=dhcp-barebox +dhcp_vendor_id=barebox-at91sam9263ek # or set your networking parameters here #eth0.ipaddr=a.b.c.d @@ -25,10 +26,10 @@ kernelimage=uImage #kernelimage=Image.lzo nand_device=atmel_nand -nand_parts="256k(barebox)ro,128k(bareboxenv),1536k(kernel),-(root)" -rootfs_mtdblock_nand=3 +nand_parts="128k(at91bootstrap),256k(barebox)ro,128k(bareboxenv),128k(bareboxenv2),4M(kernel),120M(rootfs),-(data)" +rootfs_mtdblock_nand=5 -nor_parts="256k(barebox),64k(bareboxenv),1536k(kernel),-(root)" +nor_parts="256k(barebox),64k(bareboxenv),4M(kernel),-(root)" autoboot_timeout=3 diff --git a/arch/arm/boards/at91sam9263ek/init.c b/arch/arm/boards/at91sam9263ek/init.c index d7b9afe5db..33b7955edb 100644 --- a/arch/arm/boards/at91sam9263ek/init.c +++ b/arch/arm/boards/at91sam9263ek/init.c @@ -32,6 +32,7 @@ #include <io.h> #include <asm/hardware.h> #include <nand.h> +#include <sizes.h> #include <linux/mtd/nand.h> #include <mach/at91_pmc.h> #include <mach/board.h> @@ -106,6 +107,63 @@ static void ek_add_device_mci(void) static void ek_add_device_mci(void) {} #endif +#ifdef CONFIG_LED_GPIO +struct gpio_led ek_leds[] = { + { + .gpio = AT91_PIN_PC29, + .active_low = 1, + .led = { + .name = "ds2", + }, + }, { + .gpio = AT91_PIN_PB7, + .led = { + .name = "ds3", + }, + }, +}; + +static void ek_device_add_leds(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(ek_leds); i++) { + at91_set_gpio_output(ek_leds[i].gpio, ek_leds[i].active_low); + led_gpio_register(&ek_leds[i]); + } + led_set_trigger(LED_TRIGGER_HEARTBEAT, &ek_leds[1].led); +} +#else +static void ek_device_add_leds(void) {} +#endif + +#if defined(CONFIG_USB_GADGET_DRIVER_AT91) +/* + * USB Device port + */ +static struct at91_udc_data __initdata ek_udc_data = { + .vbus_pin = AT91_PIN_PA25, + .pullup_pin = -EINVAL, /* pull-up driven by UDC */ +}; + +static void ek_add_device_udc(void) +{ + at91_add_device_udc(&ek_udc_data); +} +#else +static void ek_add_device_udc(void) {} +#endif + +static void __init ek_add_device_buttons(void) +{ + at91_set_gpio_input(AT91_PIN_PC5, 1); + at91_set_deglitch(AT91_PIN_PC5, 1); + export_env_ull("dfu_button", AT91_PIN_PC5); + at91_set_gpio_input(AT91_PIN_PC4, 1); + at91_set_deglitch(AT91_PIN_PC4, 1); + export_env_ull("right_click", AT91_PIN_PC4); +} + static int at91sam9263ek_mem_init(void) { at91_add_device_sdram(64 * 1024 * 1024); @@ -125,19 +183,26 @@ static int at91sam9263ek_devices_init(void) at91_set_gpio_value(AT91_PIN_PB27, 1); /* 1- enable, 0 - disable */ ek_add_device_nand(); - at91_add_device_eth(&macb_pdata); + at91_add_device_eth(0, &macb_pdata); add_cfi_flash_device(0, AT91_CHIPSELECT_0, 8 * 1024 * 1024, 0); ek_add_device_mci(); - -#if defined(CONFIG_DRIVER_CFI) || defined(CONFIG_DRIVER_CFI_OLD) - devfs_add_partition("nor0", 0x00000, 0x40000, PARTITION_FIXED, "self"); - devfs_add_partition("nor0", 0x40000, 0x20000, PARTITION_FIXED, "env0"); -#elif defined(CONFIG_NAND_ATMEL) - devfs_add_partition("nand0", 0x00000, 0x80000, PARTITION_FIXED, "self_raw"); - dev_add_bb_dev("self_raw", "self0"); - devfs_add_partition("nand0", 0x80000, 0x20000, PARTITION_FIXED, "env_raw"); - dev_add_bb_dev("env_raw", "env0"); -#endif + ek_device_add_leds(); + ek_add_device_udc(); + ek_add_device_buttons(); + + if (IS_ENABLED(CONFIG_DRIVER_CFI) && cdev_by_name("nor0")) { + devfs_add_partition("nor0", 0x00000, 0x40000, PARTITION_FIXED, "self"); + devfs_add_partition("nor0", 0x40000, 0x20000, PARTITION_FIXED, "env0"); + } else if (IS_ENABLED(CONFIG_NAND_ATMEL)) { + devfs_add_partition("nand0", 0x00000, SZ_128K, PARTITION_FIXED, "at91bootstrap_raw"); + dev_add_bb_dev("at91bootstrap_raw", "at91bootstrap"); + devfs_add_partition("nand0", SZ_128K, SZ_256K, PARTITION_FIXED, "self_raw"); + dev_add_bb_dev("self_raw", "self0"); + devfs_add_partition("nand0", SZ_256K + SZ_128K, SZ_128K, PARTITION_FIXED, "env_raw"); + dev_add_bb_dev("env_raw", "env0"); + devfs_add_partition("nand0", SZ_512K, SZ_128K, PARTITION_FIXED, "env_raw1"); + dev_add_bb_dev("env_raw1", "env1"); + } armlinux_set_bootparams((void *)(AT91_CHIPSELECT_1 + 0x100)); armlinux_set_architecture(MACH_TYPE_AT91SAM9263EK); diff --git a/arch/arm/boards/at91sam9m10g45ek/env/config b/arch/arm/boards/at91sam9m10g45ek/env/config index 3dea7247f5..d1151323df 100644 --- a/arch/arm/boards/at91sam9m10g45ek/env/config +++ b/arch/arm/boards/at91sam9m10g45ek/env/config @@ -2,7 +2,8 @@ # use 'dhcp' to do dhcp in barebox and in kernel # use 'none' if you want to skip kernel ip autoconfiguration -ip=dhcp +ip=dhcp-barebox +dhcp_vendor_id=barebox-at91sam9m10g45ek # or set your networking parameters here #eth0.ipaddr=a.b.c.d @@ -25,8 +26,8 @@ kernelimage=uImage #kernelimage=Image.lzo nand_device=atmel_nand -nand_parts="256k(barebox)ro,64k(bareboxenv),1536k(kernel),-(root)" -rootfs_mtdblock_nand=3 +nand_parts="128k(at91bootstrap),256k(barebox)ro,128k(bareboxenv),128k(bareboxenv2),4M(kernel),120M(rootfs),-(data)" +rootfs_mtdblock_nand=5 autoboot_timeout=3 diff --git a/arch/arm/boards/at91sam9m10g45ek/init.c b/arch/arm/boards/at91sam9m10g45ek/init.c index eff2769de5..6011bad2f6 100644 --- a/arch/arm/boards/at91sam9m10g45ek/init.c +++ b/arch/arm/boards/at91sam9m10g45ek/init.c @@ -33,6 +33,7 @@ #include <io.h> #include <asm/hardware.h> #include <nand.h> +#include <sizes.h> #include <linux/mtd/nand.h> #include <mach/at91_pmc.h> #include <mach/board.h> @@ -127,6 +128,42 @@ static void ek_add_device_mci(void) static void ek_add_device_mci(void) {} #endif +#ifdef CONFIG_LED_GPIO +struct gpio_led ek_leds[] = { + { + .gpio = AT91_PIN_PD30, + .led = { + .name = "d8", + }, + }, { + .active_low = 1, + .gpio = AT91_PIN_PD0, + .led = { + .name = "d6", + }, + }, { + .active_low = 1, + .gpio = AT91_PIN_PD31, + .led = { + .name = "d7", + }, + }, +}; + +static void ek_device_add_leds(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(ek_leds); i++) { + at91_set_gpio_output(ek_leds[i].gpio, ek_leds[i].active_low); + led_gpio_register(&ek_leds[i]); + } + led_set_trigger(LED_TRIGGER_HEARTBEAT, &ek_leds[0].led); +} +#else +static void ek_device_add_leds(void) {} +#endif + static int at91sam9m10g45ek_mem_init(void) { at91_add_device_sdram(128 * 1024 * 1024); @@ -138,13 +175,18 @@ mem_initcall(at91sam9m10g45ek_mem_init); static int at91sam9m10g45ek_devices_init(void) { ek_add_device_nand(); - at91_add_device_eth(&macb_pdata); + at91_add_device_eth(0, &macb_pdata); ek_add_device_mci(); + ek_device_add_leds(); - devfs_add_partition("nand0", 0x00000, 0x80000, PARTITION_FIXED, "self_raw"); + devfs_add_partition("nand0", 0x00000, SZ_128K, PARTITION_FIXED, "at91bootstrap_raw"); + dev_add_bb_dev("at91bootstrap_raw", "at91bootstrap"); + devfs_add_partition("nand0", SZ_128K, SZ_256K, PARTITION_FIXED, "self_raw"); dev_add_bb_dev("self_raw", "self0"); - devfs_add_partition("nand0", 0x80000, 0x20000, PARTITION_FIXED, "env_raw"); + devfs_add_partition("nand0", SZ_256K + SZ_128K, SZ_128K, PARTITION_FIXED, "env_raw"); dev_add_bb_dev("env_raw", "env0"); + devfs_add_partition("nand0", SZ_512K, SZ_128K, PARTITION_FIXED, "env_raw1"); + dev_add_bb_dev("env_raw1", "env1"); armlinux_set_bootparams((void *)(AT91_CHIPSELECT_6 + 0x100)); armlinux_set_architecture(MACH_TYPE_AT91SAM9M10G45EK); diff --git a/arch/arm/boards/at91sam9x5ek/Makefile b/arch/arm/boards/at91sam9x5ek/Makefile new file mode 100644 index 0000000000..eb072c0161 --- /dev/null +++ b/arch/arm/boards/at91sam9x5ek/Makefile @@ -0,0 +1 @@ +obj-y += init.o diff --git a/arch/arm/boards/at91sam9x5ek/config.h b/arch/arm/boards/at91sam9x5ek/config.h new file mode 100644 index 0000000000..d97181032f --- /dev/null +++ b/arch/arm/boards/at91sam9x5ek/config.h @@ -0,0 +1,6 @@ +#ifndef __CONFIG_H +#define __CONFIG_H + +#define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ + +#endif /* __CONFIG_H */ diff --git a/arch/arm/boards/at91sam9x5ek/env/config b/arch/arm/boards/at91sam9x5ek/env/config new file mode 100644 index 0000000000..cc7286796f --- /dev/null +++ b/arch/arm/boards/at91sam9x5ek/env/config @@ -0,0 +1,38 @@ +#!/bin/sh + +# use 'dhcp' to do dhcp in barebox and in kernel +# use 'none' if you want to skip kernel ip autoconfiguration +ip=dhcp-barebox +dhcp_vendor_id=barebox-at91sam9x5ek + +# or set your networking parameters here +#eth0.ipaddr=a.b.c.d +#eth0.netmask=a.b.c.d +#eth0.gateway=a.b.c.d +#eth0.serverip=a.b.c.d + +# can be either 'nfs', 'tftp', 'nor' or 'nand' +kernel_loc=nfs +# can be either 'net', 'nor', 'nand' or 'initrd' +rootfs_loc=net + +# can be either 'jffs2' or 'ubifs' +rootfs_type=ubifs +rootfsimage=root.$rootfs_type + +# The image type of the kernel. Can be uimage, zimage, raw, or raw_lzo +kernelimage=zImage +#kernelimage=uImage +#kernelimage=Image +#kernelimage=Image.lzo + +nand_device=atmel_nand +nand_parts="256k(at91bootstrap),384k(barebox)ro,128k(bareboxenv),128k(bareboxenv2),1152k(free),6M(kernel),120M(rootfs),-(data)" +rootfs_mtdblock_nand=5 + +autoboot_timeout=3 + +bootargs="console=ttyS0,115200" + +# set a fancy prompt (if support is compiled in) +PS1="\e[1;32mbarebox@\e[1;31m\h:\w\e[0m\n# " diff --git a/arch/arm/boards/at91sam9x5ek/init.c b/arch/arm/boards/at91sam9x5ek/init.c new file mode 100644 index 0000000000..1839dd6642 --- /dev/null +++ b/arch/arm/boards/at91sam9x5ek/init.c @@ -0,0 +1,167 @@ +/* + * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#include <common.h> +#include <net.h> +#include <init.h> +#include <environment.h> +#include <fec.h> +#include <asm/armlinux.h> +#include <generated/mach-types.h> +#include <partition.h> +#include <fs.h> +#include <fcntl.h> +#include <io.h> +#include <asm/hardware.h> +#include <nand.h> +#include <sizes.h> +#include <linux/mtd/nand.h> +#include <mach/board.h> +#include <mach/at91sam9_smc.h> +#include <mach/sam9_smc.h> +#include <gpio.h> +#include <mach/io.h> +#include <mach/at91_pmc.h> +#include <mach/at91_rstc.h> +#include <gpio_keys.h> +#include <readkey.h> + +static struct atmel_nand_data nand_pdata = { + .ale = 21, + .cle = 22, + .det_pin = 0, + .rdy_pin = AT91_PIN_PD5, + .enable_pin = AT91_PIN_PD4, +#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16) + .bus_width_16 = 1, +#endif + .on_flash_bbt = 1, +}; + +static struct sam9_smc_config cm_nand_smc_config = { + .ncs_read_setup = 0, + .nrd_setup = 1, + .ncs_write_setup = 0, + .nwe_setup = 1, + + .ncs_read_pulse = 6, + .nrd_pulse = 4, + .ncs_write_pulse = 5, + .nwe_pulse = 3, + + .read_cycle = 6, + .write_cycle = 5, + + .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE, + .tdf_cycles = 1, +}; + +static void ek_add_device_nand(void) +{ + /* setup bus-width (8 or 16) */ + if (nand_pdata.bus_width_16) + cm_nand_smc_config.mode |= AT91_SMC_DBW_16; + else + cm_nand_smc_config.mode |= AT91_SMC_DBW_8; + + /* configure chip-select 3 (NAND) */ + sam9_smc_configure(3, &cm_nand_smc_config); + + at91_add_device_nand(&nand_pdata); +} + +static struct at91_ether_platform_data macb_pdata = { + .flags = AT91SAM_ETHER_RMII, + .phy_addr = 0, +}; + +/* + * USB Host port + */ +static struct at91_usbh_data __initdata ek_usbh_data = { + .ports = 2, + .vbus_pin = {AT91_PIN_PD20, AT91_PIN_PD19}, +}; + +struct gpio_led leds[] = { + { + .gpio = AT91_PIN_PB18, + .active_low = 1, + .led = { + .name = "d1", + }, + }, { + .gpio = AT91_PIN_PD21, + .led = { + .name = "d2", + }, + }, +}; + +static void __init ek_add_led(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(leds); i++) { + at91_set_gpio_output(leds[i].gpio, leds[i].active_low); + led_gpio_register(&leds[i]); + } + led_set_trigger(LED_TRIGGER_HEARTBEAT, &leds[0].led); +} + +static int at91sam9x5ek_mem_init(void) +{ + at91_add_device_sdram(128 * 1024 * 1024); + + return 0; +} +mem_initcall(at91sam9x5ek_mem_init); + +static int at91sam9x5ek_devices_init(void) +{ + ek_add_device_nand(); + at91_add_device_eth(0, &macb_pdata); + at91_add_device_usbh_ohci(&ek_usbh_data); + ek_add_led(); + + armlinux_set_bootparams((void *)(AT91_CHIPSELECT_1 + 0x100)); + armlinux_set_architecture(CONFIG_MACH_AT91SAM9X5EK); + + devfs_add_partition("nand0", 0x00000, SZ_256K, PARTITION_FIXED, "at91bootstrap_raw"); + dev_add_bb_dev("at91bootstrap_raw", "at91bootstrap"); + devfs_add_partition("nand0", SZ_256K, SZ_256K + SZ_128K, PARTITION_FIXED, "self_raw"); + dev_add_bb_dev("self_raw", "self0"); + devfs_add_partition("nand0", SZ_512K + SZ_128K, SZ_128K, PARTITION_FIXED, "env_raw"); + dev_add_bb_dev("env_raw", "env0"); + devfs_add_partition("nand0", SZ_512K + SZ_256K, SZ_128K, PARTITION_FIXED, "env_raw1"); + dev_add_bb_dev("env_raw1", "env1"); + + return 0; +} +device_initcall(at91sam9x5ek_devices_init); + +static int at91sam9x5ek_console_init(void) +{ + at91_register_uart(0, 0); + at91_register_uart(1, 0); + at91_register_uart(2, 0); + return 0; +} +console_initcall(at91sam9x5ek_console_init); diff --git a/arch/arm/boards/beagle/board.c b/arch/arm/boards/beagle/board.c index faeaf8ec33..90525d88c2 100644 --- a/arch/arm/boards/beagle/board.c +++ b/arch/arm/boards/beagle/board.c @@ -306,7 +306,8 @@ static int beagle_devices_init(void) /* WP is made high and WAIT1 active Low */ gpmc_generic_init(0x10); #endif - gpmc_generic_nand_devices_init(0, 16, OMAP_ECC_HAMMING_CODE_HW_ROMCODE); + gpmc_generic_nand_devices_init(0, 16, + OMAP_ECC_HAMMING_CODE_HW_ROMCODE, &omap3_nand_cfg); add_generic_device("omap-hsmmc", -1, NULL, OMAP_MMC1_BASE, SZ_4K, IORESOURCE_MEM, NULL); diff --git a/arch/arm/boards/dss11/init.c b/arch/arm/boards/dss11/init.c index 722c0f6b07..950cf763e9 100644 --- a/arch/arm/boards/dss11/init.c +++ b/arch/arm/boards/dss11/init.c @@ -131,7 +131,7 @@ static int dss11_devices_init(void) { dss11_add_device_nand(); dss11_phy_reset(); - at91_add_device_eth(&macb_pdata); + at91_add_device_eth(0, &macb_pdata); at91_add_device_mci(0, &dss11_mci_data); at91_add_device_usbh_ohci(&dss11_usbh_data); diff --git a/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c b/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c index 695e75f288..1e48650a9d 100644 --- a/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c +++ b/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c @@ -28,6 +28,7 @@ #include <environment.h> #include <mach/imx-regs.h> #include <asm/armlinux.h> +#include <asm-generic/sections.h> #include <mach/gpio.h> #include <io.h> #include <asm/mmu.h> @@ -48,7 +49,6 @@ #include <mach/devices-imx25.h> #include <asm/barebox-arm-head.h> -extern unsigned long _stext; extern void exception_vectors(void); void __naked __flash_header_start go(void) @@ -83,9 +83,7 @@ struct imx_flash_header __flash_header_section flash_header = { .dcd_block_len = sizeof(dcd_entry), }; -extern unsigned long __bss_start; - -unsigned long __image_len_section barebox_len = 0x40000; +unsigned long __image_len_section barebox_len = DCD_BAREBOX_SIZE; static struct fec_platform_data fec_info = { .xcv_type = RMII, @@ -279,7 +277,7 @@ console_initcall(eukrea_cpuimx25_console_init); #ifdef CONFIG_NAND_IMX_BOOT void __bare_init nand_boot(void) { - imx_nand_load_image((void *)TEXT_BASE, 256 * 1024); + imx_nand_load_image((void *)TEXT_BASE, barebox_image_size); } #endif diff --git a/arch/arm/boards/eukrea_cpuimx25/lowlevel.c b/arch/arm/boards/eukrea_cpuimx25/lowlevel.c index 12219737c0..ff66e92ec4 100644 --- a/arch/arm/boards/eukrea_cpuimx25/lowlevel.c +++ b/arch/arm/boards/eukrea_cpuimx25/lowlevel.c @@ -29,6 +29,7 @@ #include <io.h> #include <mach/imx-nand.h> #include <asm/barebox-arm.h> +#include <asm-generic/sections.h> #include <asm-generic/memory_layout.h> #include <asm/system.h> @@ -41,7 +42,7 @@ static void __bare_init __naked insdram(void) r = STACK_BASE + STACK_SIZE - 12; __asm__ __volatile__("mov sp, %0" : : "r"(r)); - imx_nand_load_image((void *)TEXT_BASE, 256 * 1024); + imx_nand_load_image((void *)TEXT_BASE, barebox_image_size); board_init_lowlevel_return(); } diff --git a/arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c b/arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c index e2766fb49c..4d2b482c9a 100644 --- a/arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c +++ b/arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c @@ -30,6 +30,7 @@ #include <notifier.h> #include <mach/gpio.h> #include <asm/armlinux.h> +#include <asm-generic/sections.h> #include <generated/mach-types.h> #include <mach/pmic.h> #include <partition.h> @@ -184,9 +185,7 @@ static int eukrea_cpuimx27_devices_init(void) }; /* configure 16 bit nor flash on cs0 */ - CS0U = 0x00008F03; - CS0L = 0xA0330D01; - CS0A = 0x002208C0; + imx27_setup_weimcs(0, 0x00008F03, 0xA0330D01, 0x002208C0); /* initialize gpios */ for (i = 0; i < ARRAY_SIZE(mode); i++) @@ -232,9 +231,7 @@ static int eukrea_cpuimx27_console_init(void) #endif /* configure 8 bit UART on cs3 */ FMCR &= ~0x2; - CS3U = 0x0000D603; - CS3L = 0x0D1D0D01; - CS3A = 0x00D20000; + imx27_setup_weimcs(3, 0x0000D603, 0x0D1D0D01, 0x00D20000); #ifdef CONFIG_DRIVER_SERIAL_NS16550 add_ns16550_device(-1, IMX_CS3_BASE + QUART_OFFSET, 0xf, IORESOURCE_MEM_16BIT, &quad_uart_serial_plat); @@ -268,7 +265,7 @@ late_initcall(eukrea_cpuimx27_late_init); #ifdef CONFIG_NAND_IMX_BOOT void __bare_init nand_boot(void) { - imx_nand_load_image((void *)TEXT_BASE, 256 * 1024); + imx_nand_load_image((void *)TEXT_BASE, barebox_image_size); } #endif diff --git a/arch/arm/boards/eukrea_cpuimx35/flash_header.c b/arch/arm/boards/eukrea_cpuimx35/flash_header.c index f8ed5d483e..a745442028 100644 --- a/arch/arm/boards/eukrea_cpuimx35/flash_header.c +++ b/arch/arm/boards/eukrea_cpuimx35/flash_header.c @@ -42,4 +42,4 @@ struct imx_flash_header __flash_header_section flash_header = { .dcd_block_len = sizeof(dcd_entry), }; -unsigned long __image_len_section barebox_len = 0x40000; +unsigned long __image_len_section barebox_len = DCD_BAREBOX_SIZE; diff --git a/arch/arm/boards/eukrea_cpuimx35/lowlevel.c b/arch/arm/boards/eukrea_cpuimx35/lowlevel.c index 969c813f62..552b0cf5c5 100644 --- a/arch/arm/boards/eukrea_cpuimx35/lowlevel.c +++ b/arch/arm/boards/eukrea_cpuimx35/lowlevel.c @@ -29,6 +29,7 @@ #include <io.h> #include <mach/imx-nand.h> #include <asm/barebox-arm.h> +#include <asm-generic/sections.h> #include <asm-generic/memory_layout.h> #include <asm/system.h> @@ -52,7 +53,7 @@ static void __bare_init __naked insdram(void) r = STACK_BASE + STACK_SIZE - 12; __asm__ __volatile__("mov sp, %0" : : "r"(r)); - imx_nand_load_image((void *)TEXT_BASE, 256 * 1024); + imx_nand_load_image((void *)TEXT_BASE, barebox_image_size); board_init_lowlevel_return(); } diff --git a/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c b/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c index 153ad2f261..6de8f1f192 100644 --- a/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c +++ b/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c @@ -33,7 +33,6 @@ #include <fcntl.h> #include <nand.h> #include <spi/spi.h> -#include <mfd/mc13892.h> #include <io.h> #include <asm/mmu.h> #include <mach/imx-nand.h> diff --git a/arch/arm/boards/eukrea_cpuimx51/flash_header.c b/arch/arm/boards/eukrea_cpuimx51/flash_header.c index ac6bbdcc0f..81bd4427b9 100644 --- a/arch/arm/boards/eukrea_cpuimx51/flash_header.c +++ b/arch/arm/boards/eukrea_cpuimx51/flash_header.c @@ -2,8 +2,6 @@ #include <mach/imx-flash-header.h> #include <asm/barebox-arm-head.h> -extern unsigned long _stext; - void __naked __flash_header_start go(void) { barebox_arm_head(); @@ -82,4 +80,4 @@ struct imx_flash_header __flash_header_section flash_header = { .dcd_block_len = sizeof (dcd_entry), }; -unsigned long __image_len_section barebox_len = 0x40000; +unsigned long __image_len_section barebox_len = DCD_BAREBOX_SIZE; diff --git a/arch/arm/boards/freescale-mx25-3-stack/3stack.c b/arch/arm/boards/freescale-mx25-3-stack/3stack.c index d7e24cf3e7..c63467a267 100644 --- a/arch/arm/boards/freescale-mx25-3-stack/3stack.c +++ b/arch/arm/boards/freescale-mx25-3-stack/3stack.c @@ -27,6 +27,7 @@ #include <environment.h> #include <mach/imx-regs.h> #include <asm/armlinux.h> +#include <asm-generic/sections.h> #include <mach/gpio.h> #include <io.h> #include <partition.h> @@ -44,7 +45,6 @@ #include <mach/devices-imx25.h> #include <asm/barebox-arm-head.h> -extern unsigned long _stext; extern void exception_vectors(void); void __naked __flash_header_start go(void) @@ -106,9 +106,7 @@ struct imx_flash_header __flash_header_section flash_header = { .dcd_block_len = sizeof(dcd_entry), }; -extern unsigned long __bss_start; - -unsigned long __image_len_section barebox_len = 0x40000; +unsigned long __image_len_section barebox_len = DCD_BAREBOX_SIZE; static struct fec_platform_data fec_info = { .xcv_type = RMII, @@ -298,7 +296,7 @@ console_initcall(imx25_console_init); #ifdef CONFIG_NAND_IMX_BOOT void __bare_init nand_boot(void) { - imx_nand_load_image((void *)TEXT_BASE, 256 * 1024); + imx_nand_load_image((void *)TEXT_BASE, barebox_image_size); } #endif diff --git a/arch/arm/boards/freescale-mx28-evk/mx28-evk.c b/arch/arm/boards/freescale-mx28-evk/mx28-evk.c index b80b910f54..9168ed8823 100644 --- a/arch/arm/boards/freescale-mx28-evk/mx28-evk.c +++ b/arch/arm/boards/freescale-mx28-evk/mx28-evk.c @@ -31,6 +31,8 @@ #include <asm/armlinux.h> #include <asm/mmu.h> +#include <mach/fb.h> + #include <generated/mach-types.h> #define MX28EVK_FEC_PHY_RESET_GPIO 141 @@ -73,6 +75,39 @@ static const uint32_t mx28evk_pads[] = { PWM3_GPIO | VE_3_3V | GPIO_OUT | GPIO_VALUE(0), /* MCI write protect 1 = not protected */ SSP1_SCK_GPIO | VE_3_3V | GPIO_IN, + + /* lcd */ + LCD_WR_RWN_LCD_HSYNC | VE_3_3V | STRENGTH(S8MA), + LCD_RD_E_LCD_VSYNC | VE_3_3V | STRENGTH(S8MA), + LCD_CS_LCD_ENABLE | VE_3_3V | STRENGTH(S8MA), + LCD_RS_LCD_DOTCLK | VE_3_3V | STRENGTH(S8MA), + LCD_D0 | VE_3_3V | STRENGTH(S8MA), + LCD_D1 | VE_3_3V | STRENGTH(S8MA), + LCD_D2 | VE_3_3V | STRENGTH(S8MA), + LCD_D3 | VE_3_3V | STRENGTH(S8MA), + LCD_D4 | VE_3_3V | STRENGTH(S8MA), + LCD_D5 | VE_3_3V | STRENGTH(S8MA), + LCD_D6 | VE_3_3V | STRENGTH(S8MA), + LCD_D7 | VE_3_3V | STRENGTH(S8MA), + LCD_D8 | VE_3_3V | STRENGTH(S8MA), + LCD_D9 | VE_3_3V | STRENGTH(S8MA), + LCD_D10 | VE_3_3V | STRENGTH(S8MA), + LCD_D11 | VE_3_3V | STRENGTH(S8MA), + LCD_D12 | VE_3_3V | STRENGTH(S8MA), + LCD_D13 | VE_3_3V | STRENGTH(S8MA), + LCD_D14 | VE_3_3V | STRENGTH(S8MA), + LCD_D15 | VE_3_3V | STRENGTH(S8MA), + LCD_D16 | VE_3_3V | STRENGTH(S8MA), + LCD_D17 | VE_3_3V | STRENGTH(S8MA), + LCD_D18 | VE_3_3V | STRENGTH(S8MA), + LCD_D19 | VE_3_3V | STRENGTH(S8MA), + LCD_D20 | VE_3_3V | STRENGTH(S8MA), + LCD_D21 | VE_3_3V | STRENGTH(S8MA), + LCD_D22 | VE_3_3V | STRENGTH(S8MA), + LCD_D23 | VE_3_3V | STRENGTH(S8MA), + LCD_RESET_GPIO | VE_3_3V | GPIO_OUT | GPIO_VALUE(0), + /* backlight */ + PWM2_GPIO | VE_3_3V | STRENGTH(S4MA) | SE | VE, }; static struct mxs_mci_platform_data mci_pdata = { @@ -95,6 +130,54 @@ static struct fec_platform_data fec_info = { .phy_addr = 0, }; +/* LCD */ +static struct fb_videomode mx28_evk_vmodes[] = { + { + .name = "43WVF1G-0", + .refresh = 60, + .xres = 800, + .yres = 480, + .pixclock = 29851 /* (33,5 MHz) */, + .left_margin = 89, + .hsync_len = 10, + .right_margin = 164, + .upper_margin = 23, + .vsync_len = 10, + .lower_margin = 10, + .sync = FB_SYNC_DE_HIGH_ACT | FB_SYNC_CLK_INVERT, + .vmode = FB_VMODE_NONINTERLACED, + .flag = 0, + } +}; + +#define MAX_FB_SIZE SZ_2M + +#define GPIO_LCD_RESET 126 /* Reset */ +#define GPIO_BACKLIGHT 114 /* Backlight active */ + +static void mx28_evk_fb_enable(int enable) +{ + gpio_direction_output(GPIO_LCD_RESET, enable); + + /* Give the display a chance to sync before we enable + * the backlight to avoid flickering + */ + if (enable) + mdelay(200); + + gpio_direction_output(GPIO_BACKLIGHT, enable); +} + +static struct imx_fb_platformdata mx28_evk_fb_pdata = { + .mode_list = mx28_evk_vmodes, + .mode_cnt = ARRAY_SIZE(mx28_evk_vmodes), + .dotclk_delay = 0, /* no adaption required */ + .ld_intf_width = STMLCDIF_24BIT, /* full 24 bit */ + .bits_per_pixel = 32, + .fixed_screen = NULL, + .enable = mx28_evk_fb_enable, +}; + static int mx28_evk_mem_init(void) { arm_add_mem_device("ram0", IMX_MEMORY_BASE, 128 * 1024 * 1024); @@ -122,6 +205,9 @@ static int mx28_evk_devices_init(void) add_generic_device("mxs_mci", 0, NULL, IMX_SSP0_BASE, 0, IORESOURCE_MEM, &mci_pdata); + add_generic_device("stmfb", 0, NULL, IMX_FB_BASE, 4096, + IORESOURCE_MEM, &mx28_evk_fb_pdata); + imx_enable_enetclk(); mx28_evk_fec_reset(); add_generic_device("fec_imx", 0, NULL, IMX_FEC0_BASE, 0, diff --git a/arch/arm/boards/freescale-mx35-3-stack/3stack.c b/arch/arm/boards/freescale-mx35-3-stack/3stack.c index 7ae2352375..cb30e6ce67 100644 --- a/arch/arm/boards/freescale-mx35-3-stack/3stack.c +++ b/arch/arm/boards/freescale-mx35-3-stack/3stack.c @@ -37,6 +37,7 @@ #include <partition.h> #include <asm/armlinux.h> +#include <asm-generic/sections.h> #include <io.h> #include <generated/mach-types.h> @@ -450,6 +451,6 @@ void __bare_init nand_boot(void) * The driver is able to detect NAND's pagesize by CPU internal * fuses or external pull ups. But not the blocksize... */ - imx_nand_load_image((void *)TEXT_BASE, 256 * 1024); + imx_nand_load_image((void *)TEXT_BASE, barebox_image_size); } #endif diff --git a/arch/arm/boards/freescale-mx35-3-stack/flash_header.c b/arch/arm/boards/freescale-mx35-3-stack/flash_header.c index 85b52a25ca..07868360f2 100644 --- a/arch/arm/boards/freescale-mx35-3-stack/flash_header.c +++ b/arch/arm/boards/freescale-mx35-3-stack/flash_header.c @@ -70,5 +70,5 @@ struct imx_flash_header __flash_header_section flash_header = { .dcd_block_len = sizeof(dcd_entry), }; -unsigned long __image_len_section barebox_len = 0x40000; +unsigned long __image_len_section barebox_len = DCD_BAREBOX_SIZE; diff --git a/arch/arm/boards/freescale-mx51-pdk/board.c b/arch/arm/boards/freescale-mx51-pdk/board.c index e6781f3a6a..2ca4339272 100644 --- a/arch/arm/boards/freescale-mx51-pdk/board.c +++ b/arch/arm/boards/freescale-mx51-pdk/board.c @@ -30,6 +30,7 @@ #include <fs.h> #include <fcntl.h> #include <nand.h> +#include <notifier.h> #include <spi/spi.h> #include <mfd/mc13892.h> #include <io.h> @@ -130,94 +131,91 @@ static void babbage_power_init(void) } /* Write needed to Power Gate 2 register */ - mc13892_reg_read(mc13892, 34, &val); + mc13892_reg_read(mc13892, MC13892_REG_POWER_MISC, &val); val &= ~0x10000; - mc13892_reg_write(mc13892, 34, val); + mc13892_reg_write(mc13892, MC13892_REG_POWER_MISC, val); /* Write needed to update Charger 0 */ - mc13892_reg_write(mc13892, 48, 0x0023807F); + mc13892_reg_write(mc13892, MC13892_REG_CHARGE, 0x0023807F); /* power up the system first */ - mc13892_reg_write(mc13892, 34, 0x00200000); + mc13892_reg_write(mc13892, MC13892_REG_POWER_MISC, 0x00200000); if (imx_silicon_revision() < MX51_CHIP_REV_3_0) { /* Set core voltage to 1.1V */ - mc13892_reg_read(mc13892, 24, &val); + mc13892_reg_read(mc13892, MC13892_REG_SW_0, &val); val &= ~0x1f; val |= 0x14; - mc13892_reg_write(mc13892, 24, val); + mc13892_reg_write(mc13892, MC13892_REG_SW_0, val); /* Setup VCC (SW2) to 1.25 */ - mc13892_reg_read(mc13892, 25, &val); + mc13892_reg_read(mc13892, MC13892_REG_SW_1, &val); val &= ~0x1f; val |= 0x1a; - mc13892_reg_write(mc13892, 25, val); + mc13892_reg_write(mc13892, MC13892_REG_SW_1, val); /* Setup 1V2_DIG1 (SW3) to 1.25 */ - mc13892_reg_read(mc13892, 26, &val); + mc13892_reg_read(mc13892, MC13892_REG_SW_2, &val); val &= ~0x1f; val |= 0x1a; - mc13892_reg_write(mc13892, 26, val); - udelay(50); - /* Raise the core frequency to 800MHz */ - writel(0x0, MX51_CCM_BASE_ADDR + MX51_CCM_CACRR); + mc13892_reg_write(mc13892, MC13892_REG_SW_2, val); } else { /* Setup VCC (SW2) to 1.225 */ - mc13892_reg_read(mc13892, 25, &val); + mc13892_reg_read(mc13892, MC13892_REG_SW_1, &val); val &= ~0x1f; val |= 0x19; - mc13892_reg_write(mc13892, 25, val); + mc13892_reg_write(mc13892, MC13892_REG_SW_1, val); /* Setup 1V2_DIG1 (SW3) to 1.2 */ - mc13892_reg_read(mc13892, 26, &val); + mc13892_reg_read(mc13892, MC13892_REG_SW_2, &val); val &= ~0x1f; val |= 0x18; - mc13892_reg_write(mc13892, 26, val); + mc13892_reg_write(mc13892, MC13892_REG_SW_2, val); } if (mc13892_get_revision(mc13892) < MC13892_REVISION_2_0) { /* Set switchers in PWM mode for Atlas 2.0 and lower */ /* Setup the switcher mode for SW1 & SW2*/ - mc13892_reg_read(mc13892, 28, &val); + mc13892_reg_read(mc13892, MC13892_REG_SW_4, &val); val &= ~0x3c0f; val |= 0x1405; - mc13892_reg_write(mc13892, 28, val); + mc13892_reg_write(mc13892, MC13892_REG_SW_4, val); /* Setup the switcher mode for SW3 & SW4 */ - mc13892_reg_read(mc13892, 29, &val); + mc13892_reg_read(mc13892, MC13892_REG_SW_5, &val); val &= ~0xf0f; val |= 0x505; - mc13892_reg_write(mc13892, 29, val); + mc13892_reg_write(mc13892, MC13892_REG_SW_5, val); } else { /* Set switchers in Auto in NORMAL mode & STANDBY mode for Atlas 2.0a */ /* Setup the switcher mode for SW1 & SW2*/ - mc13892_reg_read(mc13892, 28, &val); + mc13892_reg_read(mc13892, MC13892_REG_SW_4, &val); val &= ~0x3c0f; val |= 0x2008; - mc13892_reg_write(mc13892, 28, val); + mc13892_reg_write(mc13892, MC13892_REG_SW_4, val); /* Setup the switcher mode for SW3 & SW4 */ - mc13892_reg_read(mc13892, 29, &val); + mc13892_reg_read(mc13892, MC13892_REG_SW_5, &val); val &= ~0xf0f; val |= 0x808; - mc13892_reg_write(mc13892, 29, val); + mc13892_reg_write(mc13892, MC13892_REG_SW_5, val); } /* Set VDIG to 1.65V, VGEN3 to 1.8V, VCAM to 2.5V */ - mc13892_reg_read(mc13892, 30, &val); + mc13892_reg_read(mc13892, MC13892_REG_SETTING_0, &val); val &= ~0x34030; val |= 0x10020; - mc13892_reg_write(mc13892, 30, val); + mc13892_reg_write(mc13892, MC13892_REG_SETTING_0, val); /* Set VVIDEO to 2.775V, VAUDIO to 3V, VSD to 3.15V */ - mc13892_reg_read(mc13892, 31, &val); + mc13892_reg_read(mc13892, MC13892_REG_SETTING_1, &val); val &= ~0x1FC; val |= 0x1F4; - mc13892_reg_write(mc13892, 31, val); + mc13892_reg_write(mc13892, MC13892_REG_SETTING_1, val); /* Configure VGEN3 and VCAM regulators to use external PNP */ val = 0x208; - mc13892_reg_write(mc13892, 33, val); + mc13892_reg_write(mc13892, MC13892_REG_MODE_1, val); udelay(200); #define GPIO_LAN8700_RESET (1 * 32 + 14) @@ -226,7 +224,7 @@ static void babbage_power_init(void) /* Enable VGEN3, VCAM, VAUDIO, VVIDEO, VSD regulators */ val = 0x49249; - mc13892_reg_write(mc13892, 33, val); + mc13892_reg_write(mc13892, MC13892_REG_MODE_1, val); udelay(500); @@ -245,6 +243,10 @@ static int f3s_devices_init(void) babbage_power_init(); + console_flush(); + imx51_init_lowlevel(); + clock_notifier_call_chain(); + armlinux_set_bootparams((void *)0x90000100); armlinux_set_architecture(MACH_TYPE_MX51_BABBAGE); @@ -266,8 +268,6 @@ static int f3s_console_init(void) { mxc_iomux_v3_setup_multiple_pads(f3s_pads, ARRAY_SIZE(f3s_pads)); - imx51_init_lowlevel(); - writel(0, 0x73fa8228); writel(0, 0x73fa822c); writel(0, 0x73fa8230); diff --git a/arch/arm/boards/freescale-mx51-pdk/flash_header.c b/arch/arm/boards/freescale-mx51-pdk/flash_header.c index 297dca1c29..c148eea4ff 100644 --- a/arch/arm/boards/freescale-mx51-pdk/flash_header.c +++ b/arch/arm/boards/freescale-mx51-pdk/flash_header.c @@ -2,8 +2,6 @@ #include <mach/imx-flash-header.h> #include <asm/barebox-arm-head.h> -extern unsigned long _stext; - void __naked __flash_header_start go(void) { barebox_arm_head(); @@ -82,5 +80,5 @@ struct imx_flash_header __flash_header_section flash_header = { .dcd_block_len = sizeof (dcd_entry), }; -unsigned long __image_len_section barebox_len = 0x40000; +unsigned long __image_len_section barebox_len = DCD_BAREBOX_SIZE; diff --git a/arch/arm/boards/freescale-mx53-loco/board.c b/arch/arm/boards/freescale-mx53-loco/board.c index 6c0e1d1b6c..6ae597adad 100644 --- a/arch/arm/boards/freescale-mx53-loco/board.c +++ b/arch/arm/boards/freescale-mx53-loco/board.c @@ -165,7 +165,7 @@ static struct esdhc_platform_data loco_sd3_data = { static int loco_devices_init(void) { - imx51_iim_register_fec_ethaddr(); + imx53_iim_register_fec_ethaddr(); imx53_add_fec(&fec_info); imx53_add_mmc0(&loco_sd1_data); imx53_add_mmc2(&loco_sd3_data); diff --git a/arch/arm/boards/freescale-mx53-loco/flash_header.c b/arch/arm/boards/freescale-mx53-loco/flash_header.c index b45964059a..52e6eeef4d 100644 --- a/arch/arm/boards/freescale-mx53-loco/flash_header.c +++ b/arch/arm/boards/freescale-mx53-loco/flash_header.c @@ -90,7 +90,7 @@ struct imx_flash_header_v2 __flash_header_section flash_header = { .self = APP_DEST + 0x400, .boot_data.start = APP_DEST, - .boot_data.size = 0x40000, + .boot_data.size = DCD_BAREBOX_SIZE, .dcd.header.tag = DCD_HEADER_TAG, .dcd.header.length = cpu_to_be16(sizeof(struct imx_dcd) + sizeof(dcd_entry)), diff --git a/arch/arm/boards/freescale-mx53-smd/board.c b/arch/arm/boards/freescale-mx53-smd/board.c index a7259ba3fe..72302456eb 100644 --- a/arch/arm/boards/freescale-mx53-smd/board.c +++ b/arch/arm/boards/freescale-mx53-smd/board.c @@ -133,7 +133,7 @@ static struct esdhc_platform_data loco_sd3_data = { static int smd_devices_init(void) { - imx51_iim_register_fec_ethaddr(); + imx53_iim_register_fec_ethaddr(); imx53_add_fec(&fec_info); imx53_add_mmc0(&loco_sd1_data); imx53_add_mmc2(&loco_sd3_data); diff --git a/arch/arm/boards/freescale-mx53-smd/flash_header.c b/arch/arm/boards/freescale-mx53-smd/flash_header.c index b45964059a..52e6eeef4d 100644 --- a/arch/arm/boards/freescale-mx53-smd/flash_header.c +++ b/arch/arm/boards/freescale-mx53-smd/flash_header.c @@ -90,7 +90,7 @@ struct imx_flash_header_v2 __flash_header_section flash_header = { .self = APP_DEST + 0x400, .boot_data.start = APP_DEST, - .boot_data.size = 0x40000, + .boot_data.size = DCD_BAREBOX_SIZE, .dcd.header.tag = DCD_HEADER_TAG, .dcd.header.length = cpu_to_be16(sizeof(struct imx_dcd) + sizeof(dcd_entry)), diff --git a/arch/arm/boards/guf-cupid/lowlevel.c b/arch/arm/boards/guf-cupid/lowlevel.c index 396604d59f..bcaa199385 100644 --- a/arch/arm/boards/guf-cupid/lowlevel.c +++ b/arch/arm/boards/guf-cupid/lowlevel.c @@ -29,6 +29,7 @@ #include <io.h> #include <mach/imx-nand.h> #include <asm/barebox-arm.h> +#include <asm-generic/sections.h> #include <asm-generic/memory_layout.h> #include <asm/system.h> @@ -59,7 +60,7 @@ static void __bare_init __naked insdram(void) r = STACK_BASE + STACK_SIZE - 12; __asm__ __volatile__("mov sp, %0" : : "r"(r)); - imx_nand_load_image((void *)TEXT_BASE, 256 * 1024); + imx_nand_load_image((void *)TEXT_BASE, barebox_image_size); board_init_lowlevel_return(); } diff --git a/arch/arm/boards/guf-neso/board.c b/arch/arm/boards/guf-neso/board.c index 62d82f2ff9..84ef2253b3 100644 --- a/arch/arm/boards/guf-neso/board.c +++ b/arch/arm/boards/guf-neso/board.c @@ -30,7 +30,7 @@ #include <nand.h> #include <command.h> #include <spi/spi.h> -#include <usb/isp1504.h> +#include <usb/ulpi.h> #include <io.h> #include <asm/mmu.h> @@ -133,7 +133,7 @@ static void neso_usbh_init(void) gpio_set_value(USBH2_PHY_CS_GPIO, 0); mdelay(10); - isp1504_set_vbus_power((void *)(IMX_OTG_BASE + 0x570), 1); + ulpi_setup((void *)(IMX_OTG_BASE + 0x570), 1); } #endif diff --git a/arch/arm/boards/guf-neso/lowlevel.c b/arch/arm/boards/guf-neso/lowlevel.c index b1ad621e06..a8718e7c08 100644 --- a/arch/arm/boards/guf-neso/lowlevel.c +++ b/arch/arm/boards/guf-neso/lowlevel.c @@ -30,6 +30,7 @@ #include <mach/imx-nand.h> #include <asm/barebox-arm.h> #include <asm/system.h> +#include <asm-generic/sections.h> #include <asm-generic/memory_layout.h> #ifdef CONFIG_NAND_IMX_BOOT @@ -43,7 +44,7 @@ static void __bare_init __naked insdram(void) r = STACK_BASE + STACK_SIZE - 12; __asm__ __volatile__("mov sp, %0" : : "r"(r)); - imx_nand_load_image((void *)TEXT_BASE, 256 * 1024); + imx_nand_load_image((void *)TEXT_BASE, barebox_image_size); board_init_lowlevel_return(); } diff --git a/arch/arm/boards/imx21ads/imx21ads.c b/arch/arm/boards/imx21ads/imx21ads.c index fde67743cd..a0c9fb6722 100644 --- a/arch/arm/boards/imx21ads/imx21ads.c +++ b/arch/arm/boards/imx21ads/imx21ads.c @@ -27,6 +27,7 @@ #include <environment.h> #include <mach/imx-regs.h> #include <asm/armlinux.h> +#include <asm-generic/sections.h> #include <io.h> #include <mach/gpio.h> #include <partition.h> @@ -203,7 +204,7 @@ console_initcall(mx21ads_console_init); void __bare_init nand_boot(void) { PCCR0 |= PCCR0_NFC_EN; - imx_nand_load_image((void *)TEXT_BASE, 256 * 1024); + imx_nand_load_image((void *)TEXT_BASE, barebox_image_size); } #endif diff --git a/arch/arm/boards/imx27ads/imx27ads.c b/arch/arm/boards/imx27ads/imx27ads.c index e93f07a078..7ffaeab2f8 100644 --- a/arch/arm/boards/imx27ads/imx27ads.c +++ b/arch/arm/boards/imx27ads/imx27ads.c @@ -42,15 +42,11 @@ static struct fec_platform_data fec_info = { static int imx27ads_timing_init(void) { /* configure cpld on cs4 */ - CS4U = 0x0000DCF6; - CS4L = 0x444A4541; - CS4A = 0x44443302; + imx27_setup_weimcs(4, 0x0000DCF6, 0x444A4541, 0x44443302); /* configure synchronous mode for * 16 bit nor flash on cs0 */ - CS0U = 0x0000CC03; - CS0L = 0xa0330D01; - CS0A = 0x00220800; + imx27_setup_weimcs(0, 0x0000CC03, 0xa0330D01, 0x00220800); writew(0x00f0, 0xc0000000); writew(0x00aa, 0xc0000aaa); @@ -59,9 +55,7 @@ static int imx27ads_timing_init(void) writew(0x66ca, 0xc0000aaa); writew(0x00f0, 0xc0000000); - CS0U = 0x23524E80; - CS0L = 0x10000D03; - CS0A = 0x00720900; + imx27_setup_weimcs(0, 0x23524E80, 0x10000D03, 0x00720900); /* Select FEC data through data path */ writew(0x0020, IMX_CS4_BASE + 0x10); diff --git a/arch/arm/boards/karo-tx25/board.c b/arch/arm/boards/karo-tx25/board.c index bfccd0c09a..451d91df75 100644 --- a/arch/arm/boards/karo-tx25/board.c +++ b/arch/arm/boards/karo-tx25/board.c @@ -27,6 +27,7 @@ #include <environment.h> #include <mach/imx-regs.h> #include <asm/armlinux.h> +#include <asm-generic/sections.h> #include <mach/gpio.h> #include <io.h> #include <partition.h> @@ -167,7 +168,7 @@ console_initcall(tx25_console_init); #ifdef CONFIG_NAND_IMX_BOOT void __bare_init nand_boot(void) { - imx_nand_load_image((void *)TEXT_BASE, 256 * 1024); + imx_nand_load_image((void *)TEXT_BASE, barebox_image_size); } #endif diff --git a/arch/arm/boards/karo-tx25/lowlevel.c b/arch/arm/boards/karo-tx25/lowlevel.c index 09c0339659..35dfe9f5fa 100644 --- a/arch/arm/boards/karo-tx25/lowlevel.c +++ b/arch/arm/boards/karo-tx25/lowlevel.c @@ -28,6 +28,7 @@ #include <mach/imx-nand.h> #include <asm/barebox-arm.h> #include <asm/system.h> +#include <asm-generic/sections.h> #include <asm-generic/memory_layout.h> #ifdef CONFIG_NAND_IMX_BOOT @@ -39,7 +40,7 @@ static void __bare_init __naked insdram(void) r = STACK_BASE + STACK_SIZE - 12; __asm__ __volatile__("mov sp, %0" : : "r"(r)); - imx_nand_load_image((void *)TEXT_BASE, 256 * 1024); + imx_nand_load_image((void *)TEXT_BASE, barebox_image_size); board_init_lowlevel_return(); } diff --git a/arch/arm/boards/mmccpu/init.c b/arch/arm/boards/mmccpu/init.c index 51dbf24621..9d4d496521 100644 --- a/arch/arm/boards/mmccpu/init.c +++ b/arch/arm/boards/mmccpu/init.c @@ -60,7 +60,7 @@ static int mmccpu_devices_init(void) at91_set_gpio_output(AT91_PIN_PB27, 1); at91_set_gpio_value(AT91_PIN_PB27, 1); /* 1- enable, 0 - disable */ - at91_add_device_eth(&macb_pdata); + at91_add_device_eth(0, &macb_pdata); add_cfi_flash_device(0, AT91_CHIPSELECT_0, 0, 0); devfs_add_partition("nor0", 0x00000, 256 * 1024, PARTITION_FIXED, "self0"); diff --git a/arch/arm/boards/panda/lowlevel.c b/arch/arm/boards/panda/lowlevel.c index 45ea221d87..8591fff053 100644 --- a/arch/arm/boards/panda/lowlevel.c +++ b/arch/arm/boards/panda/lowlevel.c @@ -44,37 +44,6 @@ static const struct ddr_regs ddr_regs_400_mhz_2cs = { .mr2 = 0x4 }; -#define I2C_SLAVE 0x12 - -static int noinline scale_vcores(void) -{ - unsigned int rev = omap4_revision(); - - /* For VC bypass only VCOREx_CGF_FORCE is necessary and - * VCOREx_CFG_VOLTAGE changes can be discarded - */ - writel(0, OMAP44XX_PRM_VC_CFG_I2C_MODE); - writel(0x6026, OMAP44XX_PRM_VC_CFG_I2C_CLK); - - /* set VCORE1 force VSEL */ - omap4_power_i2c_send((0x3A55 << 8) | I2C_SLAVE); - - /* FIXME: set VCORE2 force VSEL, Check the reset value */ - omap4_power_i2c_send((0x295B << 8) | I2C_SLAVE); - - /* set VCORE3 force VSEL */ - switch (rev) { - case OMAP4430_ES2_0: - omap4_power_i2c_send((0x2961 << 8) | I2C_SLAVE); - break; - case OMAP4430_ES2_1: - omap4_power_i2c_send((0x2A61 << 8) | I2C_SLAVE); - break; - } - - return 0; -} - static void noinline panda_init_lowlevel(void) { struct dpll_param core = OMAP4_CORE_DPLL_PARAM_38M4_DDR400; @@ -101,7 +70,7 @@ static void noinline panda_init_lowlevel(void) omap4_ddr_init(&ddr_regs_400_mhz_2cs, &core); /* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */ - scale_vcores(); + omap4_scale_vcores(); board_init_lowlevel_return(); } diff --git a/arch/arm/boards/panda/mux.c b/arch/arm/boards/panda/mux.c index 7586e86745..310e43372f 100644 --- a/arch/arm/boards/panda/mux.c +++ b/arch/arm/boards/panda/mux.c @@ -238,20 +238,11 @@ static const struct pad_conf_entry wkup_padconf_array[] = { { PAD0_FREF_CLK4_OUT, M3 /* gpio_wk8 */ }, }; -static void do_set_mux(u32 base, struct pad_conf_entry const *array, int size) -{ - int i; - struct pad_conf_entry *pad = (struct pad_conf_entry *) array; - - for (i = 0; i < size; i++, pad++) - writew(pad->val, base + pad->offset); -} - void set_muxconf_regs(void) { - do_set_mux(OMAP44XX_CONTROL_PADCONF_CORE, core_padconf_array, + omap4_do_set_mux(OMAP44XX_CONTROL_PADCONF_CORE, core_padconf_array, ARRAY_SIZE(core_padconf_array)); - do_set_mux(OMAP44XX_CONTROL_PADCONF_WKUP, wkup_padconf_array, + omap4_do_set_mux(OMAP44XX_CONTROL_PADCONF_WKUP, wkup_padconf_array, ARRAY_SIZE(wkup_padconf_array)); } diff --git a/arch/arm/boards/pcm037/pcm037.c b/arch/arm/boards/pcm037/pcm037.c index 42a543d2cc..46f2ce9900 100644 --- a/arch/arm/boards/pcm037/pcm037.c +++ b/arch/arm/boards/pcm037/pcm037.c @@ -27,10 +27,11 @@ #include <driver.h> #include <fs.h> #include <environment.h> -#include <usb/isp1504.h> +#include <usb/ulpi.h> #include <mach/imx-regs.h> #include <mach/iomux-mx31.h> #include <asm/armlinux.h> +#include <asm-generic/sections.h> #include <mach/gpio.h> #include <io.h> #include <asm/mmu.h> @@ -92,7 +93,7 @@ static void pcm037_usb_init(void) imx_iomux_mode(MX31_PIN_USBOTG_STP__USBOTG_STP); mdelay(50); - isp1504_set_vbus_power((void *)(IMX_OTG_BASE + 0x170), 1); + ulpi_setup((void *)(IMX_OTG_BASE + 0x170), 1); /* Host 2 */ tmp = readl(IOMUXC_BASE + 0x8); @@ -137,7 +138,7 @@ static void pcm037_usb_init(void) writel(tmp, IMX_OTG_BASE + 0x584); mdelay(50); - isp1504_set_vbus_power((void *)(IMX_OTG_BASE + 0x570), 1); + ulpi_setup((void *)(IMX_OTG_BASE + 0x570), 1); /* Set to Host mode */ tmp = readl(IMX_OTG_BASE + 0x1a8); @@ -245,6 +246,6 @@ console_initcall(imx31_console_init); #ifdef CONFIG_NAND_IMX_BOOT void __bare_init nand_boot(void) { - imx_nand_load_image((void *)TEXT_BASE, 256 * 1024); + imx_nand_load_image((void *)TEXT_BASE, barebox_image_size); } #endif diff --git a/arch/arm/boards/pcm038/lowlevel.c b/arch/arm/boards/pcm038/lowlevel.c index 32392636e7..2bc89a0c13 100644 --- a/arch/arm/boards/pcm038/lowlevel.c +++ b/arch/arm/boards/pcm038/lowlevel.c @@ -30,6 +30,7 @@ #include <asm/barebox-arm.h> #include <asm/system.h> #include <asm-generic/memory_layout.h> +#include <asm-generic/sections.h> #include "pll.h" @@ -44,7 +45,7 @@ static void __bare_init __naked insdram(void) r = STACK_BASE + STACK_SIZE - 12; __asm__ __volatile__("mov sp, %0" : : "r"(r)); - imx_nand_load_image((void *)TEXT_BASE, 256 * 1024); + imx_nand_load_image((void *)TEXT_BASE, barebox_image_size); board_init_lowlevel_return(); } diff --git a/arch/arm/boards/pcm038/pcm038.c b/arch/arm/boards/pcm038/pcm038.c index 58dacaeee4..8535e41a5c 100644 --- a/arch/arm/boards/pcm038/pcm038.c +++ b/arch/arm/boards/pcm038/pcm038.c @@ -41,7 +41,7 @@ #include <mach/imxfb.h> #include <asm/mmu.h> #include <i2c/i2c.h> -#include <usb/isp1504.h> +#include <usb/ulpi.h> #include <mach/spi.h> #include <mach/iomux-mx27.h> #include <mach/devices-imx27.h> @@ -127,7 +127,7 @@ static void pcm038_usbh_init(void) mdelay(10); - isp1504_set_vbus_power((void *)(IMX_OTG_BASE + 0x570), 1); + ulpi_setup((void *)(IMX_OTG_BASE + 0x570), 1); } #endif @@ -224,19 +224,13 @@ static int pcm038_devices_init(void) }; /* configure 16 bit nor flash on cs0 */ - CS0U = 0x22C2CF00; - CS0L = 0x75000D01; - CS0A = 0x00000900; + imx27_setup_weimcs(0, 0x22C2CF00, 0x75000D01, 0x00000900); /* configure SRAM on cs1 */ - CS1U = 0x0000d843; - CS1L = 0x22252521; - CS1A = 0x22220a00; + imx27_setup_weimcs(1, 0x0000d843, 0x22252521, 0x22220a00); /* configure SJA1000 on cs4 */ - CS4U = 0x0000DCF6; - CS4L = 0x444A0301; - CS4A = 0x44443302; + imx27_setup_weimcs(4, 0x0000DCF6, 0x444A0301, 0x44443302); /* initizalize gpios */ for (i = 0; i < ARRAY_SIZE(mode); i++) diff --git a/arch/arm/boards/pcm043/lowlevel.c b/arch/arm/boards/pcm043/lowlevel.c index 40e3204425..69cc4f17a4 100644 --- a/arch/arm/boards/pcm043/lowlevel.c +++ b/arch/arm/boards/pcm043/lowlevel.c @@ -29,6 +29,7 @@ #include <io.h> #include <mach/imx-nand.h> #include <asm/barebox-arm.h> +#include <asm-generic/sections.h> #include <asm-generic/memory_layout.h> #include <asm/system.h> @@ -57,7 +58,7 @@ static void __bare_init __naked insdram(void) r = STACK_BASE + STACK_SIZE - 12; __asm__ __volatile__("mov sp, %0" : : "r"(r)); - imx_nand_load_image((void *)TEXT_BASE, 256 * 1024); + imx_nand_load_image((void *)TEXT_BASE, barebox_image_size); board_init_lowlevel_return(); } diff --git a/arch/arm/boards/pcm049/board.c b/arch/arm/boards/pcm049/board.c index 826856cb37..0c82261d5e 100644 --- a/arch/arm/boards/pcm049/board.c +++ b/arch/arm/boards/pcm049/board.c @@ -68,12 +68,12 @@ mem_initcall(pcm049_mem_init); static struct gpmc_config net_cfg = { .cfg = { - 0x00001000, /* CONF1 */ - 0x001e1e01, /* CONF2 */ - 0x00080300, /* CONF3 */ - 0x1c091c09, /* CONF4 */ - 0x04181f1f, /* CONF5 */ - 0x00000FCF, /* CONF6 */ + 0xc1001000, /* CONF1 */ + 0x00070700, /* CONF2 */ + 0x00000000, /* CONF3 */ + 0x07000700, /* CONF4 */ + 0x09060909, /* CONF5 */ + 0x000003c2, /* CONF6 */ }, .base = 0x2C000000, .size = GPMC_SIZE_16M, @@ -106,7 +106,8 @@ static int pcm049_devices_init(void) pcm049_network_init(); - gpmc_generic_nand_devices_init(0, 8, OMAP_ECC_BCH8_CODE_HW); + gpmc_generic_nand_devices_init(0, 8, + OMAP_ECC_BCH8_CODE_HW, &omap4_nand_cfg); #ifdef CONFIG_PARTITION devfs_add_partition("nand0", 0x00000, SZ_128K, PARTITION_FIXED, "xload_raw"); diff --git a/arch/arm/boards/pcm049/lowlevel.c b/arch/arm/boards/pcm049/lowlevel.c index bea895e31f..5b9109833b 100644 --- a/arch/arm/boards/pcm049/lowlevel.c +++ b/arch/arm/boards/pcm049/lowlevel.c @@ -30,54 +30,22 @@ void set_muxconf_regs(void); -/* Erstmal 200Mhz... */ -static const struct ddr_regs ddr_regs_mt42L64M64_3_200_mhz = { - .tim1 = 0x0aa8d4e3, - .tim2 = 0x202e0b92, - .tim3 = 0x009da2b3, - .phy_ctrl_1 = 0x849FF404, /* mostly from elpida */ - .ref_ctrl = 0x0000030c, /* from elpida 200MHz! */ - .config_init = 0x80000eb1, - .config_final = 0x80000eb1, - .zq_config = 0x500b3215, /* mostly from elpida */ - .mr1 = 0x23, /* from elpida 200MHz! */ - .mr2 = 0x1 /* from elpida 200MHz! */ +static const struct ddr_regs ddr_regs_mt42L64M64_25_400_mhz = { + .tim1 = 0x0EEB0662, + .tim2 = 0x20370DD2, + .tim3 = 0x00BFC33F, + .phy_ctrl_1 = 0x849FF408, + .ref_ctrl = 0x00000618, + .config_init = 0x80001AB1, + .config_final = 0x80001AB1, + .zq_config = 0xd0093215, + .mr1 = 0x83, + .mr2 = 0x4 }; -#define I2C_SLAVE 0x12 - -static int noinline scale_vcores(void) -{ - unsigned int rev = omap4_revision(); - - /* For VC bypass only VCOREx_CGF_FORCE is necessary and - * VCOREx_CFG_VOLTAGE changes can be discarded - */ - writel(0, OMAP44XX_PRM_VC_CFG_I2C_MODE); - writel(0x6026, OMAP44XX_PRM_VC_CFG_I2C_CLK); - - /* set VCORE1 force VSEL */ - omap4_power_i2c_send((0x3A55 << 8) | I2C_SLAVE); - - /* FIXME: set VCORE2 force VSEL, Check the reset value */ - omap4_power_i2c_send((0x295B << 8) | I2C_SLAVE); - - /* set VCORE3 force VSEL */ - switch (rev) { - case OMAP4430_ES2_0: - omap4_power_i2c_send((0x2961 << 8) | I2C_SLAVE); - break; - case OMAP4430_ES2_1: - omap4_power_i2c_send((0x2A61 << 8) | I2C_SLAVE); - break; - } - - return 0; -} - static void noinline pcm049_init_lowlevel(void) { - struct dpll_param core = OMAP4_CORE_DPLL_PARAM_19M2_DDR200; + struct dpll_param core = OMAP4_CORE_DPLL_PARAM_19M2_DDR400; struct dpll_param mpu = OMAP4_MPU_DPLL_PARAM_19M2_MPU1000; struct dpll_param iva = OMAP4_IVA_DPLL_PARAM_19M2; struct dpll_param per = OMAP4_PER_DPLL_PARAM_19M2; @@ -86,10 +54,10 @@ static void noinline pcm049_init_lowlevel(void) set_muxconf_regs(); - omap4_ddr_init(&ddr_regs_mt42L64M64_3_200_mhz, &core); + omap4_ddr_init(&ddr_regs_mt42L64M64_25_400_mhz, &core); /* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */ - scale_vcores(); + omap4_scale_vcores(); writel(CM_SYS_CLKSEL_19M2, CM_SYS_CLKSEL); diff --git a/arch/arm/boards/pcm049/mux.c b/arch/arm/boards/pcm049/mux.c index 9911b62e5a..a7a77b5adc 100644 --- a/arch/arm/boards/pcm049/mux.c +++ b/arch/arm/boards/pcm049/mux.c @@ -49,27 +49,27 @@ static const struct pad_conf_entry core_padconf_array[] = { {C2C_DATA13, (IDIS | PTU | EN | M0)}, /* gpmc_nsc5 */ {C2C_DATA14, (SAFE_MODE)}, /* nc */ {C2C_DATA15, (SAFE_MODE)}, /* nc */ - {HDMI_HPD, (M0)}, /* hdmi_hpd */ - {HDMI_CEC, (DIS | IEN | M3)}, /* gpio_64 */ - {HDMI_DDC_SCL, (PTU | M0)}, /* hdmi_ddc_scl */ - {HDMI_DDC_SDA, (PTU | IEN | M0)}, /* hdmi_ddc_sda */ - {CSI21_DX0, (IEN | M0)}, /* csi21_dx0 */ - {CSI21_DY0, (IEN | M0)}, /* csi21_dy0 */ - {CSI21_DX1, (IEN | M0)}, /* csi21_dx1 */ - {CSI21_DY1, (IEN | M0)}, /* csi21_dy1 */ - {CSI21_DX2, (IEN | M0)}, /* csi21_dx2 */ - {CSI21_DY2, (IEN | M0)}, /* csi21_dy2 */ - {CSI21_DX3, (PTD | M7)}, /* csi21_dx3 */ - {CSI21_DY3, (PTD | M7)}, /* csi21_dy3 */ - {CSI21_DX4, (PTD | OFF_EN | OFF_PD | OFF_IN | M7)}, /* csi21_dx4 */ - {CSI21_DY4, (PTD | OFF_EN | OFF_PD | OFF_IN | M7)}, /* csi21_dy4 */ - {CSI22_DX0, (IEN | M0)}, /* csi22_dx0 */ - {CSI22_DY0, (IEN | M0)}, /* csi22_dy0 */ - {CSI22_DX1, (IEN | M0)}, /* csi22_dx1 */ - {CSI22_DY1, (IEN | M0)}, /* csi22_dy1 */ - {CAM_SHUTTER, (OFF_EN | OFF_PD | OFF_OUT_PTD | M0)}, /* cam_shutter */ - {CAM_STROBE, (OFF_EN | OFF_PD | OFF_OUT_PTD | M0)}, /* cam_strobe */ - {CAM_GLOBALRESET, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_83 */ + {HDMI_HPD, (SAFE_MODE)}, /* unused */ + {HDMI_CEC, (SAFE_MODE)}, /* unused */ + {HDMI_DDC_SCL, (SAFE_MODE)}, /* unused */ + {HDMI_DDC_SDA, (SAFE_MODE)}, /* unused */ + {CSI21_DX0, (SAFE_MODE)}, /* unused */ + {CSI21_DY0, (SAFE_MODE)}, /* unused */ + {CSI21_DX1, (SAFE_MODE)}, /* unused */ + {CSI21_DY1, (SAFE_MODE)}, /* unused */ + {CSI21_DX2, (SAFE_MODE)}, /* unused */ + {CSI21_DY2, (SAFE_MODE)}, /* unused */ + {CSI21_DX3, (SAFE_MODE)}, /* unused */ + {CSI21_DY3, (SAFE_MODE)}, /* unused */ + {CSI21_DX4, (SAFE_MODE)}, /* unused */ + {CSI21_DY4, (SAFE_MODE)}, /* unused */ + {CSI22_DX0, (SAFE_MODE)}, /* unused */ + {CSI22_DY0, (SAFE_MODE)}, /* unused */ + {CSI22_DX1, (SAFE_MODE)}, /* unused */ + {CSI22_DY1, (SAFE_MODE)}, /* unused */ + {CAM_SHUTTER, (SAFE_MODE)}, /* unused */ + {CAM_STROBE, (SAFE_MODE)}, /* unused */ + {CAM_GLOBALRESET, (SAFE_MODE)}, /* unused */ {USBB1_ULPITLL_CLK, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M4)},/* usbb1_ulpiphy_clk */ {USBB1_ULPITLL_STP, (OFF_EN | OFF_OUT_PTD | M4)}, /* usbb1_ulpiphy_stp */ {USBB1_ULPITLL_DIR, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dir */ @@ -82,57 +82,57 @@ static const struct pad_conf_entry core_padconf_array[] = { {USBB1_ULPITLL_DAT5, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat5 */ {USBB1_ULPITLL_DAT6, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat6 */ {USBB1_ULPITLL_DAT7, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat7 */ - {USBB1_HSIC_DATA, (DIS | IEN | M3)}, /* gpio_96 */ - {USBB1_HSIC_STROBE, (DIS | IEN | M3)}, /* gpio_97 */ - {USBC1_ICUSB_DP, (IEN | M0)}, /* usbc1_icusb_dp */ - {USBC1_ICUSB_DM, (IEN | M0)}, /* usbc1_icusb_dm */ + {USBB1_HSIC_DATA, (SAFE_MODE)}, /* nc */ + {USBB1_HSIC_STROBE, (SAFE_MODE)}, /* nc */ + {USBC1_ICUSB_DP, (SAFE_MODE)}, /* unused */ + {USBC1_ICUSB_DM, (SAFE_MODE)}, /* unused */ {SDMMC1_CLK, (PTU | OFF_EN | OFF_OUT_PTD | M0)}, /* sdmmc1_clk */ {SDMMC1_CMD, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_cmd */ {SDMMC1_DAT0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat0 */ {SDMMC1_DAT1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat1 */ {SDMMC1_DAT2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat2 */ {SDMMC1_DAT3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat3 */ - {SDMMC1_DAT4, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat4 */ - {SDMMC1_DAT5, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat5 */ - {SDMMC1_DAT6, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat6 */ - {SDMMC1_DAT7, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat7 */ - {ABE_MCBSP2_CLKX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_mcbsp2_clkx */ - {ABE_MCBSP2_DR, (IEN | OFF_EN | OFF_OUT_PTD | M0)}, /* abe_mcbsp2_dr */ - {ABE_MCBSP2_DX, (OFF_EN | OFF_OUT_PTD | M0)}, /* abe_mcbsp2_dx */ - {ABE_MCBSP2_FSX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_mcbsp2_fsx */ - {ABE_MCBSP1_CLKX, (DIS | IEN | M3)}, /* gpio_114 */ - {ABE_MCBSP1_DR, (DIS | IEN | M3)}, /* gpio_115 */ - {ABE_MCBSP1_DX, (DIS | IEN | M3)}, /* gpio_116 */ - {ABE_MCBSP1_FSX, (DIS | IEN | M2)}, /* abe_mcasp_amutein */ - {ABE_PDM_UL_DATA, (IEN | OFF_EN | OFF_OUT_PTD | M1)}, /* abe_mcbsp3_dr */ - {ABE_PDM_DL_DATA, (OFF_EN | OFF_OUT_PTD | M1)}, /* abe_mcbsp3_dx */ - {ABE_PDM_FRAME, (IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* abe_mcbsp3_clkx */ - {ABE_PDM_LB_CLK, (IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* abe_mcbsp3_fsx */ - {ABE_CLKS, (DIS | IEN | M3)}, /* gpio_118 */ + {SDMMC1_DAT4, (SAFE_MODE)}, /* unused */ + {SDMMC1_DAT5, (SAFE_MODE)}, /* unused */ + {SDMMC1_DAT6, (SAFE_MODE)}, /* unused */ + {SDMMC1_DAT7, (SAFE_MODE)}, /* unused */ + {ABE_MCBSP2_CLKX, (SAFE_MODE)}, /* unused */ + {ABE_MCBSP2_DR, (SAFE_MODE)}, /* unused */ + {ABE_MCBSP2_DX, (SAFE_MODE)}, /* unused */ + {ABE_MCBSP2_FSX, (SAFE_MODE)}, /* unused */ + {ABE_MCBSP1_CLKX, (SAFE_MODE)}, /* unused */ + {ABE_MCBSP1_DR, (SAFE_MODE)}, /* unused */ + {ABE_MCBSP1_DX, (SAFE_MODE)}, /* unused */ + {ABE_MCBSP1_FSX, (SAFE_MODE)}, /* unused */ + {ABE_PDM_UL_DATA, (SAFE_MODE)}, /* unused */ + {ABE_PDM_DL_DATA, (SAFE_MODE)}, /* unused */ + {ABE_PDM_FRAME, (SAFE_MODE)}, /* unused */ + {ABE_PDM_LB_CLK, (SAFE_MODE)}, /* unused */ + {ABE_CLKS, (SAFE_MODE)}, /* unused */ {ABE_DMIC_CLK1, (SAFE_MODE)}, /* nc */ - {ABE_DMIC_DIN1, (SAFE_MODE)}, /* nc */ - {ABE_DMIC_DIN2, (SAFE_MODE)}, /* nc */ - {ABE_DMIC_DIN3, (SAFE_MODE)}, /* nc */ - {UART2_CTS, (PTU | IEN | M0)}, /* uart2_cts */ - {UART2_RTS, (M0)}, /* uart2_rts */ - {UART2_RX, (PTU | IEN | M0)}, /* uart2_rx */ - {UART2_TX, (M0)}, /* uart2_tx */ - {HDQ_SIO, (M0)}, /* hdq_sio */ + {ABE_DMIC_DIN1, (SAFE_MODE)}, /* unused */ + {ABE_DMIC_DIN2, (DIS | IEN | M3)}, /* gpio_121 */ + {ABE_DMIC_DIN3, (SAFE_MODE)}, /* unused */ + {UART2_CTS, (SAFE_MODE)}, /* unused */ + {UART2_RTS, (SAFE_MODE)}, /* unused */ + {UART2_RX, (SAFE_MODE)}, /* unused */ + {UART2_TX, (SAFE_MODE)}, /* unused */ + {HDQ_SIO, (SAFE_MODE)}, /* unused */ {I2C1_SCL, (PTU | IEN | M0)}, /* i2c1_scl */ {I2C1_SDA, (PTU | IEN | M0)}, /* i2c1_sda */ - {I2C2_SCL, (PTU | IEN | M1)}, /* uart1_rx */ - {I2C2_SDA, (M1)}, /* uart1_tx */ + {I2C2_SCL, (SAFE_MODE)}, /* unused */ + {I2C2_SDA, (SAFE_MODE)}, /* unused */ {I2C3_SCL, (PTU | IEN | M0)}, /* i2c3_scl */ {I2C3_SDA, (PTU | IEN | M0)}, /* i2c3_sda */ {I2C4_SCL, (PTU | IEN | M0)}, /* i2c4_scl */ {I2C4_SDA, (PTU | IEN | M0)}, /* i2c4_sda */ - {MCSPI1_CLK, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_clk */ - {MCSPI1_SOMI, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_somi */ - {MCSPI1_SIMO, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_simo */ - {MCSPI1_CS0, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_cs0 */ - {MCSPI1_CS1, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_cs1 */ - {MCSPI1_CS2, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_cs2 */ - {MCSPI1_CS3, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_cs3 */ + {MCSPI1_CLK, (SAFE_MODE)}, /* unused */ + {MCSPI1_SOMI, (SAFE_MODE)}, /* unused */ + {MCSPI1_SIMO, (SAFE_MODE)}, /* unused */ + {MCSPI1_CS0, (SAFE_MODE)}, /* unused */ + {MCSPI1_CS1, (SAFE_MODE)}, /* unused */ + {MCSPI1_CS2, (SAFE_MODE)}, /* unused */ + {MCSPI1_CS3, (SAFE_MODE)}, /* unused */ {UART3_CTS_RCTX, (PTU | IEN | M0)}, /* uart3_tx */ {UART3_RTS_SD, (M0)}, /* uart3_rts_sd */ {UART3_RX_IRRX, (IEN | M0)}, /* uart3_rx */ @@ -147,82 +147,82 @@ static const struct pad_conf_entry core_padconf_array[] = { {MCSPI4_SIMO, (PTU | IEN | M3)}, /* gpio_152 */ {MCSPI4_SOMI, (PTU | IEN | M3)}, /* gpio_153 */ {MCSPI4_CS0, (SAFE_MODE)}, /* nc */ - {UART4_RX, (IEN | M0)}, /* uart4_rx */ - {UART4_TX, (M0)}, /* uart4_tx */ - {USBB2_ULPITLL_CLK, (IEN | M3)}, /* gpio_157 */ - {USBB2_ULPITLL_STP, (IEN | M5)}, /* dispc2_data23 */ - {USBB2_ULPITLL_DIR, (IEN | M5)}, /* dispc2_data22 */ - {USBB2_ULPITLL_NXT, (IEN | M5)}, /* dispc2_data21 */ - {USBB2_ULPITLL_DAT0, (IEN | M5)}, /* dispc2_data20 */ - {USBB2_ULPITLL_DAT1, (IEN | M5)}, /* dispc2_data19 */ - {USBB2_ULPITLL_DAT2, (IEN | M5)}, /* dispc2_data18 */ - {USBB2_ULPITLL_DAT3, (IEN | M5)}, /* dispc2_data15 */ - {USBB2_ULPITLL_DAT4, (IEN | M5)}, /* dispc2_data14 */ - {USBB2_ULPITLL_DAT5, (IEN | M5)}, /* dispc2_data13 */ - {USBB2_ULPITLL_DAT6, (IEN | M5)}, /* dispc2_data12 */ - {USBB2_ULPITLL_DAT7, (IEN | M5)}, /* dispc2_data11 */ + {UART4_RX, (SAFE_MODE)}, /* unused */ + {UART4_TX, (SAFE_MODE)}, /* unused */ + {USBB2_ULPITLL_CLK, (SAFE_MODE)}, /* nc */ + {USBB2_ULPITLL_STP, (SAFE_MODE)}, /* unused */ + {USBB2_ULPITLL_DIR, (SAFE_MODE)}, /* unused */ + {USBB2_ULPITLL_NXT, (SAFE_MODE)}, /* unused */ + {USBB2_ULPITLL_DAT0, (SAFE_MODE)}, /* unused */ + {USBB2_ULPITLL_DAT1, (SAFE_MODE)}, /* unused */ + {USBB2_ULPITLL_DAT2, (SAFE_MODE)}, /* unused */ + {USBB2_ULPITLL_DAT3, (SAFE_MODE)}, /* unused */ + {USBB2_ULPITLL_DAT4, (SAFE_MODE)}, /* unused */ + {USBB2_ULPITLL_DAT5, (SAFE_MODE)}, /* unused */ + {USBB2_ULPITLL_DAT6, (SAFE_MODE)}, /* unused */ + {USBB2_ULPITLL_DAT7, (SAFE_MODE)}, /* unused */ {USBB2_HSIC_DATA, (SAFE_MODE)}, /* nc */ {USBB2_HSIC_STROBE, (SAFE_MODE)}, /* nc */ - {UNIPRO_TX0, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col0 */ - {UNIPRO_TY0, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col1 */ - {UNIPRO_TX1, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col2 */ - {UNIPRO_TY1, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col3 */ - {UNIPRO_TX2, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col4 */ - {UNIPRO_TY2, (SAFE_MODE)}, /* nc */ - {UNIPRO_RX0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row0 */ - {UNIPRO_RY0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row1 */ - {UNIPRO_RX1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row2 */ - {UNIPRO_RY1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row3 */ - {UNIPRO_RX2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row4 */ - {UNIPRO_RY2, (DIS | IEN | M3)}, /* gpio_3 */ + {UNIPRO_TX0, (SAFE_MODE)}, /* unused */ + {UNIPRO_TY0, (SAFE_MODE)}, /* unused */ + {UNIPRO_TX1, (SAFE_MODE)}, /* unused */ + {UNIPRO_TY1, (SAFE_MODE)}, /* unused */ + {UNIPRO_TX2, (SAFE_MODE)}, /* unused */ + {UNIPRO_TY2, (SAFE_MODE)}, /* unused */ + {UNIPRO_RX0, (SAFE_MODE)}, /* unused */ + {UNIPRO_RY0, (SAFE_MODE)}, /* unused */ + {UNIPRO_RX1, (SAFE_MODE)}, /* unused */ + {UNIPRO_RY1, (SAFE_MODE)}, /* unused */ + {UNIPRO_RX2, (SAFE_MODE)}, /* unused */ + {UNIPRO_RY2, (SAFE_MODE)}, /* unused */ {USBA0_OTG_CE, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M0)}, /* usba0_otg_ce */ {USBA0_OTG_DP, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usba0_otg_dp */ {USBA0_OTG_DM, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usba0_otg_dm */ {FREF_CLK1_OUT, (SAFE_MODE)}, /* nc */ {FREF_CLK2_OUT, (SAFE_MODE)}, /* nc */ {SYS_NIRQ1, (PTU | IEN | M0)}, /* sys_nirq1 */ - {SYS_NIRQ2, (DIS | IEN | M3)}, /* gpio_183 */ - {SYS_BOOT0, (PTU | IEN | M3)}, /* gpio_184 */ - {SYS_BOOT1, (M3)}, /* gpio_185 */ - {SYS_BOOT2, (PTD | IEN | M3)}, /* gpio_186 */ - {SYS_BOOT3, (M3)}, /* gpio_187 */ - {SYS_BOOT4, (M3)}, /* gpio_188 */ - {SYS_BOOT5, (PTD | IEN | M3)}, /* gpio_189 */ + {SYS_NIRQ2, (M0)}, /* sys_boot0 */ + {SYS_BOOT0, (M0)}, /* sys_boot */ + {SYS_BOOT1, (M0)}, /* sys_boot */ + {SYS_BOOT2, (M0)}, /* sys_boot */ + {SYS_BOOT3, (M0)}, /* sys_boot */ + {SYS_BOOT4, (M0)}, /* sys_boot */ + {SYS_BOOT5, (M0)}, /* sys_boot */ {DPM_EMU0, (IEN | M0)}, /* dpm_emu0 */ {DPM_EMU1, (IEN | M0)}, /* dpm_emu1 */ - {DPM_EMU2, (SAFE_MODE)}, /* nc */ - {DPM_EMU3, (SAFE_MODE)}, /* nc */ - {DPM_EMU4, (SAFE_MODE)}, /* nc */ - {DPM_EMU5, (SAFE_MODE)}, /* nc */ - {DPM_EMU6, (SAFE_MODE)}, /* nc */ - {DPM_EMU7, (SAFE_MODE)}, /* nc */ - {DPM_EMU8, (SAFE_MODE)}, /* nc */ - {DPM_EMU9, (SAFE_MODE)}, /* nc */ - {DPM_EMU10, (SAFE_MODE)}, /* nc */ - {DPM_EMU11, (SAFE_MODE)}, /* nc */ - {DPM_EMU12, (SAFE_MODE)}, /* nc */ - {DPM_EMU13, (SAFE_MODE)}, /* nc */ - {DPM_EMU14, (SAFE_MODE)}, /* nc */ - {DPM_EMU15, (DIS | M3)}, /* gpio_26 */ - {DPM_EMU16, (M1)}, /* dmtimer8_pwm_evt */ - {DPM_EMU17, (M1)}, /* dmtimer9_pwm_evt */ - {DPM_EMU18, (IEN | M3)}, /* gpio_190 */ - {DPM_EMU19, (IEN | M3)}, /* gpio_191 */ + {DPM_EMU2, (SAFE_MODE)}, /* unused */ + {DPM_EMU3, (SAFE_MODE)}, /* unused */ + {DPM_EMU4, (SAFE_MODE)}, /* unused */ + {DPM_EMU5, (SAFE_MODE)}, /* unused */ + {DPM_EMU6, (SAFE_MODE)}, /* unused */ + {DPM_EMU7, (SAFE_MODE)}, /* unused */ + {DPM_EMU8, (SAFE_MODE)}, /* unused */ + {DPM_EMU9, (SAFE_MODE)}, /* unused */ + {DPM_EMU10, (SAFE_MODE)}, /* unused */ + {DPM_EMU11, (SAFE_MODE)}, /* unused */ + {DPM_EMU12, (SAFE_MODE)}, /* unused */ + {DPM_EMU13, (SAFE_MODE)}, /* unused */ + {DPM_EMU14, (SAFE_MODE)}, /* unused */ + {DPM_EMU15, (SAFE_MODE)}, /* unused */ + {DPM_EMU16, (SAFE_MODE)}, /* unused */ + {DPM_EMU17, (SAFE_MODE)}, /* unused */ + {DPM_EMU18, (SAFE_MODE)}, /* unused */ + {DPM_EMU19, (SAFE_MODE)}, /* unused */ }; static const struct pad_conf_entry wkup_padconf_array[] = { - {PAD0_SIM_IO, (IEN | M3)}, /* gpio_wk0 */ - {PAD1_SIM_CLK, (IEN | M3)}, /* gpio_wk1 */ - {PAD0_SIM_RESET, (IEN | M3)}, /* gpio_wk2 */ - {PAD1_SIM_CD, (SAFE_MODE)}, /* should be gpio_wk3 but muxed with gpio_3*/ - {PAD0_SIM_PWRCTRL, (IEN | M3)}, /* gpio_wk4 */ + {PAD0_SIM_IO, (SAFE_MODE)}, /* nc */ + {PAD1_SIM_CLK, (SAFE_MODE)}, /* nc */ + {PAD0_SIM_RESET, (SAFE_MODE)}, /* nc */ + {PAD1_SIM_CD, (SAFE_MODE)}, /* nc */ + {PAD0_SIM_PWRCTRL, (SAFE_MODE)}, /* nc */ {PAD1_SR_SCL, (PTU | IEN | M0)}, /* sr_scl */ {PAD0_SR_SDA, (PTU | IEN | M0)}, /* sr_sda */ {PAD1_FREF_XTAL_IN, (M0)}, /* # */ {PAD0_FREF_SLICER_IN, (SAFE_MODE)}, /* nc */ - {PAD1_FREF_CLK_IOREQ, (SAFE_MODE)}, /* nc */ + {PAD1_FREF_CLK_IOREQ, (SAFE_MODE)}, /* nc */ {PAD0_FREF_CLK0_OUT, (M2)}, /* sys_drm_msecure */ - {PAD1_FREF_CLK3_REQ, (SAFE_MODE)}, /* nc */ + {PAD1_FREF_CLK3_REQ, (IEN | M3)}, /* gpio_wk30 */ {PAD0_FREF_CLK3_OUT, (M0)}, /* fref_clk3_out */ {PAD1_FREF_CLK4_REQ, (M0)}, /* fref_clk4_req */ {PAD0_FREF_CLK4_OUT, (M0)}, /* fref_clk4_out */ @@ -231,24 +231,15 @@ static const struct pad_conf_entry wkup_padconf_array[] = { {PAD1_SYS_NRESWARM, (M0)}, /* sys_nreswarm */ {PAD0_SYS_PWR_REQ, (PTU | M0)}, /* sys_pwr_req */ {PAD1_SYS_PWRON_RESET, (M0)}, /* sys_pwron_reset_out */ - {PAD0_SYS_BOOT6, (IEN | M3)}, /* gpio_wk9 */ - {PAD1_SYS_BOOT7, (IEN | M3)}, /* gpio_wk10 */ + {PAD0_SYS_BOOT6, (M0)}, /* sys_boot6 */ + {PAD1_SYS_BOOT7, (M0)}, /* sys_boot7 */ }; -static void do_set_mux(u32 base, struct pad_conf_entry const *array, int size) -{ - int i; - struct pad_conf_entry *pad = (struct pad_conf_entry *) array; - - for (i = 0; i < size; i++, pad++) - writew(pad->val, base + pad->offset); -} - void set_muxconf_regs(void) { - do_set_mux(OMAP44XX_CONTROL_PADCONF_CORE, core_padconf_array, + omap4_do_set_mux(OMAP44XX_CONTROL_PADCONF_CORE, core_padconf_array, ARRAY_SIZE(core_padconf_array)); - do_set_mux(OMAP44XX_CONTROL_PADCONF_WKUP, wkup_padconf_array, + omap4_do_set_mux(OMAP44XX_CONTROL_PADCONF_WKUP, wkup_padconf_array, ARRAY_SIZE(wkup_padconf_array)); } diff --git a/arch/arm/boards/phycard-a-l1/pca-a-l1.c b/arch/arm/boards/phycard-a-l1/pca-a-l1.c index e4f24833ad..3fc3542506 100644 --- a/arch/arm/boards/phycard-a-l1/pca-a-l1.c +++ b/arch/arm/boards/phycard-a-l1/pca-a-l1.c @@ -332,7 +332,7 @@ static int pcaal1_late_init(void) { struct device_d *nand; - gpmc_generic_nand_devices_init(0, 16, OMAP_ECC_SOFT); + gpmc_generic_nand_devices_init(0, 16, OMAP_ECC_SOFT, &omap3_nand_cfg); nand = get_device_by_name("nand0"); diff --git a/arch/arm/boards/phycard-a-xl2/Makefile b/arch/arm/boards/phycard-a-xl2/Makefile new file mode 100644 index 0000000000..1d23d72ddc --- /dev/null +++ b/arch/arm/boards/phycard-a-xl2/Makefile @@ -0,0 +1,20 @@ +# (C) Copyright 2012 Jan Weitzel <j.weitzel@phytec.de> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +obj-y += pca-a-xl2.o mux.o lowlevel.o diff --git a/arch/arm/boards/phycard-a-xl2/config.h b/arch/arm/boards/phycard-a-xl2/config.h new file mode 100644 index 0000000000..da84fa5f6b --- /dev/null +++ b/arch/arm/boards/phycard-a-xl2/config.h @@ -0,0 +1 @@ +/* nothing */ diff --git a/arch/arm/boards/phycard-a-xl2/env/bin/nand_bootstrap b/arch/arm/boards/phycard-a-xl2/env/bin/nand_bootstrap new file mode 100644 index 0000000000..acd00dc904 --- /dev/null +++ b/arch/arm/boards/phycard-a-xl2/env/bin/nand_bootstrap @@ -0,0 +1,31 @@ + +echo "copying barebox to nand..." + +mci0.probe=1 +mkdir mnt + +mount /dev/disk0.0 fat /mnt +if [ $? != 0 ]; then + echo "failed to mount mmc card" + exit 1 +fi + +if [ ! -f /mnt/mlo-nand.bin ]; then + echo "mlo-nand.bin not found on mmc card" + exit 1 +fi + +if [ ! -f /mnt/barebox.bin ]; then + echo "barebox.bin not found on mmc card" +fi + +gpmc_nand0.eccmode=bch8_hw_romcode +erase /dev/nand0.xload.bb +cp /mnt/mlo-nand.bin /dev/nand0.xload.bb + +gpmc_nand0.eccmode=bch8_hw +erase /dev/nand0.barebox.bb +cp /mnt/barebox.bin /dev/nand0.barebox.bb + +echo "success" + diff --git a/arch/arm/boards/phycard-a-xl2/env/config b/arch/arm/boards/phycard-a-xl2/env/config new file mode 100644 index 0000000000..0cbfb16b3e --- /dev/null +++ b/arch/arm/boards/phycard-a-xl2/env/config @@ -0,0 +1,47 @@ +#!/bin/sh + +machine=pcaaxl2 +user= + +# use 'dhcp' to do dhcp in barebox and in kernel +# use 'none' if you want to skip kernel ip autoconfiguration +ip=dhcp + +# or set your networking parameters here +#eth0.ipaddr=a.b.c.d +#eth0.netmask=a.b.c.d +#eth0.gateway=a.b.c.d +#eth0.serverip=a.b.c.d + +# can be either 'nfs', 'tftp', 'nor' or 'nand' +kernel_loc=tftp +# can be either 'net', 'nor', 'nand' or 'initrd' +rootfs_loc=net + +# can be either 'jffs2' or 'ubifs' +rootfs_type=ubifs +rootfsimage=root-${machine}.$rootfs_type + +kernelimage=zImage-$machine +#kernelimage=uImage-$machine +#kernelimage=Image-$machine +#kernelimage=Image-${machine}.lzo + +if [ -n $user ]; then + kernelimage="$user"-"$kernelimage" + nfsroot="$eth0.serverip:/home/$user/nfsroot/$machine" + rootfsimage="$user"-"$rootfsimage" +else + nfsroot="$eth0.serverip:/path/to/nfs/root" +fi + +autoboot_timeout=3 + +bootargs="console=ttyO2,115200" + +nand_parts="128k(xload)ro,256k(barebox),128k(bareboxenv),4M(kernel),-(root)" +rootfs_mtdblock_nand=4 + +# set a fancy prompt (if support is compiled in) +PS1="\e[1;32mbarebox@\e[1;31m\h:\w\e[0m " + diff --git a/arch/arm/boards/phycard-a-xl2/lowlevel.c b/arch/arm/boards/phycard-a-xl2/lowlevel.c new file mode 100644 index 0000000000..b8de2aad0a --- /dev/null +++ b/arch/arm/boards/phycard-a-xl2/lowlevel.c @@ -0,0 +1,94 @@ +/* + * (C) Copyright 2004-2009 + * Texas Instruments, <www.ti.com> + * Richard Woodruff <r-woodruff2@ti.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <common.h> +#include <io.h> +#include <mach/omap4-mux.h> +#include <mach/omap4-silicon.h> +#include <mach/omap4-clock.h> +#include <mach/syslib.h> +#include <asm/barebox-arm.h> + +void set_muxconf_regs(void); + +static const struct ddr_regs ddr_regs_mt42L64M64_25_400_mhz = { + .tim1 = 0x0EEB0662, + .tim2 = 0x20370DD2, + .tim3 = 0x00BFC33F, + .phy_ctrl_1 = 0x849FF408, + .ref_ctrl = 0x00000618, + .config_init = 0x80001AB1, + .config_final = 0x80001AB1, + .zq_config = 0xd0093215, + .mr1 = 0x83, + .mr2 = 0x4 +}; + +static noinline void pcaaxl2_init_lowlevel(void) +{ + struct dpll_param core = OMAP4_CORE_DPLL_PARAM_19M2_DDR400; + struct dpll_param mpu = OMAP4_MPU_DPLL_PARAM_19M2_MPU1000; + struct dpll_param iva = OMAP4_IVA_DPLL_PARAM_19M2; + struct dpll_param per = OMAP4_PER_DPLL_PARAM_19M2; + struct dpll_param abe = OMAP4_ABE_DPLL_PARAM_19M2; + struct dpll_param usb = OMAP4_USB_DPLL_PARAM_19M2; + + set_muxconf_regs(); + + omap4_ddr_init(&ddr_regs_mt42L64M64_25_400_mhz, &core); + + /* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */ + omap4_scale_vcores(); + + writel(CM_SYS_CLKSEL_19M2, CM_SYS_CLKSEL); + + /* Configure all DPLL's at 100% OPP */ + omap4_configure_mpu_dpll(&mpu); + omap4_configure_iva_dpll(&iva); + omap4_configure_per_dpll(&per); + omap4_configure_abe_dpll(&abe); + omap4_configure_usb_dpll(&usb); + + /* Enable all clocks */ + omap4_enable_all_clocks(); + + sr32(0x4A30a31C, 8, 1, 0x1); /* enable software ioreq */ + sr32(0x4A30a31C, 1, 2, 0x0); /* set for sys_clk (19.2MHz) */ + sr32(0x4A30a31C, 16, 4, 0x0); /* set divisor to 1 */ + sr32(0x4A30a110, 0, 1, 0x1); /* set the clock source to active */ + sr32(0x4A30a110, 2, 2, 0x3); /* enable clocks */ + + board_init_lowlevel_return(); +} + +void board_init_lowlevel(void) +{ + u32 r; + + if (get_pc() > 0x80000000) + return; + + r = 0x4030d000; + __asm__ __volatile__("mov sp, %0" : : "r"(r)); + + pcaaxl2_init_lowlevel(); +} diff --git a/arch/arm/boards/phycard-a-xl2/mux.c b/arch/arm/boards/phycard-a-xl2/mux.c new file mode 100644 index 0000000000..179e6b67ab --- /dev/null +++ b/arch/arm/boards/phycard-a-xl2/mux.c @@ -0,0 +1,245 @@ +#include <common.h> +#include <init.h> +#include <io.h> +#include <mach/omap4-silicon.h> +#include <mach/omap4-mux.h> + +static const struct pad_conf_entry core_padconf_array[] = { + {GPMC_AD0, (IEN | PTD | DIS | M0)}, /* gpmc_ad0 */ + {GPMC_AD1, (IEN | PTD | DIS | M0)}, /* gpmc_ad1 */ + {GPMC_AD2, (IEN | PTD | DIS | M0)}, /* gpmc_ad2 */ + {GPMC_AD3, (IEN | PTD | DIS | M0)}, /* gpmc_ad3 */ + {GPMC_AD4, (IEN | PTD | DIS | M0)}, /* gpmc_ad4 */ + {GPMC_AD5, (IEN | PTD | DIS | M0)}, /* gpmc_ad5 */ + {GPMC_AD6, (IEN | PTD | DIS | M0)}, /* gpmc_ad6 */ + {GPMC_AD7, (IEN | PTD | DIS | M0)}, /* gpmc_ad7 */ + {GPMC_AD8, (IEN | PTD | DIS | M0)}, /* gpmc_ad8 */ + {GPMC_AD9, (IEN | PTD | DIS | M0)}, /* gpmc_ad9 */ + {GPMC_AD10, (IEN | PTD | DIS | M0)}, /* gpmc_ad10 */ + {GPMC_AD11, (IEN | PTD | DIS | M0)}, /* gpmc_ad11 */ + {GPMC_AD12, (IEN | PTD | DIS | M0)}, /* gpmc_ad12 */ + {GPMC_AD13, (IEN | PTD | DIS | M0)}, /* gpmc_ad13 */ + {GPMC_AD14, (IEN | PTD | DIS | M0)}, /* gpmc_ad14 */ + {GPMC_AD15, (IEN | PTD | DIS | M0)}, /* gpmc_ad15 */ + {GPMC_A16, (IEN | PTD | DIS | M0)}, /* gpmc_a16 */ + {GPMC_A17, (SAFE_MODE)}, /* nc */ + {GPMC_A18, (SAFE_MODE)}, /* nc */ + {GPMC_A19, (SAFE_MODE)}, /* nc */ + {GPMC_A20, (SAFE_MODE)}, /* nc */ + {GPMC_A21, (SAFE_MODE)}, /* nc */ + {GPMC_A22, (SAFE_MODE)}, /* nc */ + {GPMC_A23, (SAFE_MODE)}, /* nc */ + {GPMC_A24, (SAFE_MODE)}, /* nc */ + {GPMC_A25, (SAFE_MODE)}, /* nc */ + {GPMC_NCS0, (IDIS | PTU | EN | M0)}, /* gpmc_nsc0 */ + {GPMC_NCS1, (IDIS | PTU | EN | M0)}, /* gpmc_nsc1 */ + {GPMC_NCS2, (SAFE_MODE)}, /* nc */ + {GPMC_NCS3, (SAFE_MODE)}, /* nc */ + {GPMC_NWP, (IEN | PTD | DIS | M0)}, /* gpmc_nwp */ + {GPMC_CLK, (PTU | IEN | M3)}, /* gpio_55 */ + {GPMC_NADV_ALE, (IDIS | PTD | DIS | M0)}, /* gpmc_ndav_ale */ + {GPMC_NOE, (IDIS | PTD | DIS | M0)}, /* gpmc_noe */ + {GPMC_NWE, (IDIS | PTD | DIS | M0)}, /* gpmc_nwe */ + {GPMC_NBE0_CLE, (IDIS | PTD | DIS | M0)}, /* gpmc_nbe0_cle */ + {GPMC_NBE1, (SAFE_MODE)}, /* nc */ + {GPMC_WAIT0, (IEN | PTU | EN | M0)}, /* gpmc_wait0 */ + {GPMC_WAIT1, (IEN | PTU | EN | M0)}, /* gpmc_wait1 */ + {C2C_DATA11, (SAFE_MODE)}, /* nc */ + {C2C_DATA12, (SAFE_MODE)}, /* nc */ + {C2C_DATA13, (IDIS | PTU | EN | M0)}, /* gpmc_nsc5 */ + {C2C_DATA14, (SAFE_MODE)}, /* nc */ + {C2C_DATA15, (SAFE_MODE)}, /* nc */ + {HDMI_HPD, (SAFE_MODE)}, /* nc */ + {HDMI_CEC, (SAFE_MODE)}, /* nc */ + {HDMI_DDC_SCL, (SAFE_MODE)}, /* nc */ + {HDMI_DDC_SDA, (SAFE_MODE)}, /* nc */ + {CSI21_DX0, (SAFE_MODE)}, /* nc */ + {CSI21_DY0, (SAFE_MODE)}, /* nc */ + {CSI21_DX1, (SAFE_MODE)}, /* nc */ + {CSI21_DY1, (SAFE_MODE)}, /* nc */ + {CSI21_DX2, (SAFE_MODE)}, /* nc */ + {CSI21_DY2, (SAFE_MODE)}, /* nc */ + {CSI21_DX3, (SAFE_MODE)}, /* nc */ + {CSI21_DY3, (SAFE_MODE)}, /* nc */ + {CSI21_DX4, (SAFE_MODE)}, /* nc */ + {CSI21_DY4, (SAFE_MODE)}, /* nc */ + {CSI22_DX0, (SAFE_MODE)}, /* nc */ + {CSI22_DY0, (SAFE_MODE)}, /* nc */ + {CSI22_DX1, (SAFE_MODE)}, /* nc */ + {CSI22_DY1, (SAFE_MODE)}, /* nc */ + {CAM_SHUTTER, (SAFE_MODE)}, /* unused */ + {CAM_STROBE, (SAFE_MODE)}, /* unused */ + {CAM_GLOBALRESET, (SAFE_MODE)}, /* unused */ + {USBB1_ULPITLL_CLK, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M4)},/* usbb1_ulpiphy_clk */ + {USBB1_ULPITLL_STP, (OFF_EN | OFF_OUT_PTD | M4)}, /* usbb1_ulpiphy_stp */ + {USBB1_ULPITLL_DIR, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dir */ + {USBB1_ULPITLL_NXT, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_nxt */ + {USBB1_ULPITLL_DAT0, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat0 */ + {USBB1_ULPITLL_DAT1, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat1 */ + {USBB1_ULPITLL_DAT2, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat2 */ + {USBB1_ULPITLL_DAT3, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat3 */ + {USBB1_ULPITLL_DAT4, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat4 */ + {USBB1_ULPITLL_DAT5, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat5 */ + {USBB1_ULPITLL_DAT6, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat6 */ + {USBB1_ULPITLL_DAT7, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat7 */ + {USBB1_HSIC_DATA, (SAFE_MODE)}, /* nc */ + {USBB1_HSIC_STROBE, (SAFE_MODE)}, /* nc */ + {USBC1_ICUSB_DP, (SAFE_MODE)}, /* nc */ + {USBC1_ICUSB_DM, (SAFE_MODE)}, /* nc */ + {SDMMC1_CLK, (PTU | OFF_EN | OFF_OUT_PTD | M0)}, /* sdmmc1_clk */ + {SDMMC1_CMD, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_cmd */ + {SDMMC1_DAT0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat0 */ + {SDMMC1_DAT1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat1 */ + {SDMMC1_DAT2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat2 */ + {SDMMC1_DAT3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat3 */ + {SDMMC1_DAT4, (SAFE_MODE)}, /* nc */ + {SDMMC1_DAT5, (SAFE_MODE)}, /* nc */ + {SDMMC1_DAT6, (SAFE_MODE)}, /* nc */ + {SDMMC1_DAT7, (SAFE_MODE)}, /* nc */ + {ABE_MCBSP2_CLKX, (SAFE_MODE)}, /* nc */ + {ABE_MCBSP2_DR, (SAFE_MODE)}, /* nc */ + {ABE_MCBSP2_DX, (SAFE_MODE)}, /* nc */ + {ABE_MCBSP2_FSX, (SAFE_MODE)}, /* nc */ + {ABE_MCBSP1_CLKX, (SAFE_MODE)}, /* unused */ + {ABE_MCBSP1_DR, (SAFE_MODE)}, /* unused */ + {ABE_MCBSP1_DX, (SAFE_MODE)}, /* unused */ + {ABE_MCBSP1_FSX, (SAFE_MODE)}, /* nc */ + {ABE_PDM_UL_DATA, (SAFE_MODE)}, /* unused */ + {ABE_PDM_DL_DATA, (SAFE_MODE)}, /* unused */ + {ABE_PDM_FRAME, (SAFE_MODE)}, /* unused */ + {ABE_PDM_LB_CLK, (SAFE_MODE)}, /* unused */ + {ABE_CLKS, (SAFE_MODE)}, /* unused */ + {ABE_DMIC_CLK1, (SAFE_MODE)}, /* nc */ + {ABE_DMIC_DIN1, (SAFE_MODE)}, /* unused */ + {ABE_DMIC_DIN2, (SAFE_MODE)}, /* nc */ + {ABE_DMIC_DIN3, (SAFE_MODE)}, /* unused */ + {UART2_CTS, (SAFE_MODE)}, /* nc */ + {UART2_RTS, (SAFE_MODE)}, /* nc */ + {UART2_RX, (SAFE_MODE)}, /* nc */ + {UART2_TX, (SAFE_MODE)}, /* nc */ + {HDQ_SIO, (SAFE_MODE)}, /* unused */ + {I2C1_SCL, (PTU | IEN | M0)}, /* i2c1_scl */ + {I2C1_SDA, (PTU | IEN | M0)}, /* i2c1_sda */ + {I2C2_SCL, (SAFE_MODE)}, /* unused */ + {I2C2_SDA, (SAFE_MODE)}, /* unused */ + {I2C3_SCL, (PTU | IEN | M0)}, /* i2c3_scl */ + {I2C3_SDA, (PTU | IEN | M0)}, /* i2c3_sda */ + {I2C4_SCL, (SAFE_MODE)}, /* nc */ + {I2C4_SDA, (SAFE_MODE)}, /* nc */ + {MCSPI1_CLK, (SAFE_MODE)}, /* unused */ + {MCSPI1_SOMI, (SAFE_MODE)}, /* unused */ + {MCSPI1_SIMO, (SAFE_MODE)}, /* unused */ + {MCSPI1_CS0, (SAFE_MODE)}, /* unused */ + {MCSPI1_CS1, (SAFE_MODE)}, /* unused */ + {MCSPI1_CS2, (SAFE_MODE)}, /* nc */ + {MCSPI1_CS3, (SAFE_MODE)}, /* nc */ + {UART3_CTS_RCTX, (PTU | IEN | M0)}, /* uart3_tx */ + {UART3_RTS_SD, (M0)}, /* uart3_rts_sd */ + {UART3_RX_IRRX, (IEN | M0)}, /* uart3_rx */ + {UART3_TX_IRTX, (M0)}, /* uart3_tx */ + {SDMMC5_CLK, (PTU | IEN | M3)}, /* goio_145 */ + {SDMMC5_CMD, (PTU | IEN | M3)}, /* goio_146 */ + {SDMMC5_DAT0, (SAFE_MODE)}, /* nc */ + {SDMMC5_DAT1, (SAFE_MODE)}, /* nc */ + {SDMMC5_DAT2, (SAFE_MODE)}, /* nc */ + {SDMMC5_DAT3, (SAFE_MODE)}, /* nc */ + {MCSPI4_CLK, (PTU | IEN | M3)}, /* gpio_151 */ + {MCSPI4_SIMO, (PTU | IEN | M3)}, /* gpio_152 */ + {MCSPI4_SOMI, (PTU | IEN | M3)}, /* gpio_153 */ + {MCSPI4_CS0, (SAFE_MODE)}, /* nc */ + {UART4_RX, (SAFE_MODE)}, /* nc */ + {UART4_TX, (SAFE_MODE)}, /* nc */ + {USBB2_ULPITLL_CLK, (SAFE_MODE)}, /* nc */ + {USBB2_ULPITLL_STP, (SAFE_MODE)}, /* unused */ + {USBB2_ULPITLL_DIR, (SAFE_MODE)}, /* unused */ + {USBB2_ULPITLL_NXT, (SAFE_MODE)}, /* unused */ + {USBB2_ULPITLL_DAT0, (SAFE_MODE)}, /* unused */ + {USBB2_ULPITLL_DAT1, (SAFE_MODE)}, /* unused */ + {USBB2_ULPITLL_DAT2, (SAFE_MODE)}, /* unused */ + {USBB2_ULPITLL_DAT3, (SAFE_MODE)}, /* unused */ + {USBB2_ULPITLL_DAT4, (SAFE_MODE)}, /* unused */ + {USBB2_ULPITLL_DAT5, (SAFE_MODE)}, /* unused */ + {USBB2_ULPITLL_DAT6, (SAFE_MODE)}, /* unused */ + {USBB2_ULPITLL_DAT7, (SAFE_MODE)}, /* unused */ + {USBB2_HSIC_DATA, (SAFE_MODE)}, /* unused */ + {USBB2_HSIC_STROBE, (SAFE_MODE)}, /* nc */ + {UNIPRO_TX0, (SAFE_MODE)}, /* nc */ + {UNIPRO_TY0, (SAFE_MODE)}, /* nc */ + {UNIPRO_TX1, (SAFE_MODE)}, /* nc */ + {UNIPRO_TY1, (SAFE_MODE)}, /* nc */ + {UNIPRO_TX2, (SAFE_MODE)}, /* unused */ + {UNIPRO_TY2, (SAFE_MODE)}, /* unused */ + {UNIPRO_RX0, (SAFE_MODE)}, /* unused */ + {UNIPRO_RY0, (SAFE_MODE)}, /* unused */ + {UNIPRO_RX1, (SAFE_MODE)}, /* unused */ + {UNIPRO_RY1, (SAFE_MODE)}, /* unused */ + {UNIPRO_RX2, (SAFE_MODE)}, /* unused */ + {UNIPRO_RY2, (SAFE_MODE)}, /* unused */ + {USBA0_OTG_CE, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M0)}, /* usba0_otg_ce */ + {USBA0_OTG_DP, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usba0_otg_dp */ + {USBA0_OTG_DM, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usba0_otg_dm */ + {FREF_CLK1_OUT, (SAFE_MODE)}, /* nc */ + {FREF_CLK2_OUT, (SAFE_MODE)}, /* nc */ + {SYS_NIRQ1, (PTU | IEN | M0)}, /* sys_nirq1 */ + {SYS_NIRQ2, (SAFE_MODE)}, /* nc */ + {SYS_BOOT0, (M0)}, /* sys_boot */ + {SYS_BOOT1, (M0)}, /* sys_boot */ + {SYS_BOOT2, (M0)}, /* sys_boot */ + {SYS_BOOT3, (M0)}, /* sys_boot */ + {SYS_BOOT4, (M0)}, /* sys_boot */ + {SYS_BOOT5, (M0)}, /* sys_boot */ + {DPM_EMU0, (IEN | M0)}, /* dpm_emu0 */ + {DPM_EMU1, (IEN | M0)}, /* dpm_emu1 */ + {DPM_EMU2, (SAFE_MODE)}, /* unused */ + {DPM_EMU3, (SAFE_MODE)}, /* unused */ + {DPM_EMU4, (SAFE_MODE)}, /* unused */ + {DPM_EMU5, (SAFE_MODE)}, /* unused */ + {DPM_EMU6, (SAFE_MODE)}, /* unused */ + {DPM_EMU7, (SAFE_MODE)}, /* unused */ + {DPM_EMU8, (SAFE_MODE)}, /* unused */ + {DPM_EMU9, (SAFE_MODE)}, /* unused */ + {DPM_EMU10, (SAFE_MODE)}, /* unused */ + {DPM_EMU11, (SAFE_MODE)}, /* unused */ + {DPM_EMU12, (SAFE_MODE)}, /* unused */ + {DPM_EMU13, (SAFE_MODE)}, /* unused */ + {DPM_EMU14, (SAFE_MODE)}, /* unused */ + {DPM_EMU15, (SAFE_MODE)}, /* unused */ + {DPM_EMU16, (SAFE_MODE)}, /* unused */ + {DPM_EMU17, (SAFE_MODE)}, /* unused */ + {DPM_EMU18, (SAFE_MODE)}, /* unused */ + {DPM_EMU19, (SAFE_MODE)}, /* unused */ +}; + +static const struct pad_conf_entry wkup_padconf_array[] = { + {PAD0_SIM_IO, (SAFE_MODE)}, /* tbd */ + {PAD1_SIM_CLK, (SAFE_MODE)}, /* nc */ + {PAD0_SIM_RESET, (SAFE_MODE)}, /* nc */ + {PAD1_SIM_CD, (SAFE_MODE)}, /* nc */ + {PAD0_SIM_PWRCTRL, (SAFE_MODE)}, /* nc */ + {PAD1_SR_SCL, (PTU | IEN | M0)}, /* sr_scl */ + {PAD0_SR_SDA, (PTU | IEN | M0)}, /* sr_sda */ + {PAD1_FREF_XTAL_IN, (M0)}, /* # */ + {PAD0_FREF_SLICER_IN, (SAFE_MODE)}, /* nc */ + {PAD1_FREF_CLK_IOREQ, (SAFE_MODE)}, /* nc */ + {PAD0_FREF_CLK0_OUT, (M2)}, /* sys_drm_msecure */ + {PAD1_FREF_CLK3_REQ, (SAFE_MODE)}, /* nc */ + {PAD0_FREF_CLK3_OUT, (M0)}, /* fref_clk3_out */ + {PAD1_FREF_CLK4_REQ, (IEN | M3)}, /* gpio_wk7 */ + {PAD0_FREF_CLK4_OUT, (M0)}, /* fref_clk4_out */ + {PAD1_SYS_32K, (IEN | M0)}, /* sys_32k */ + {PAD0_SYS_NRESPWRON, (M0)}, /* sys_nrespwron */ + {PAD1_SYS_NRESWARM, (M0)}, /* sys_nreswarm */ + {PAD0_SYS_PWR_REQ, (PTU | M0)}, /* sys_pwr_req */ + {PAD1_SYS_PWRON_RESET, (M0)}, /* sys_pwron_reset_out */ + {PAD0_SYS_BOOT6, (M0)}, /* sys_boot6 */ + {PAD1_SYS_BOOT7, (M0)}, /* sys_boot7 */ +}; + +void set_muxconf_regs(void) +{ + omap4_do_set_mux(OMAP44XX_CONTROL_PADCONF_CORE, core_padconf_array, + ARRAY_SIZE(core_padconf_array)); + + omap4_do_set_mux(OMAP44XX_CONTROL_PADCONF_WKUP, wkup_padconf_array, + ARRAY_SIZE(wkup_padconf_array)); +} diff --git a/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c b/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c new file mode 100644 index 0000000000..72fc18f4ca --- /dev/null +++ b/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c @@ -0,0 +1,147 @@ +/* + * Copyright (C) 2011 Sascha Hauer, Pengutronix + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#include <common.h> +#include <console.h> +#include <init.h> +#include <driver.h> +#include <io.h> +#include <ns16550.h> +#include <asm/armlinux.h> +#include <generated/mach-types.h> +#include <mach/silicon.h> +#include <mach/sdrc.h> +#include <mach/sys_info.h> +#include <mach/syslib.h> +#include <mach/control.h> +#include <linux/err.h> +#include <sizes.h> +#include <partition.h> +#include <nand.h> +#include <asm/mmu.h> +#include <mach/gpio.h> +#include <mach/gpmc.h> +#include <mach/gpmc_nand.h> +#include <mach/xload.h> +#include <mach/omap_hsmmc.h> +#include <i2c/i2c.h> + +static struct NS16550_plat serial_plat = { + .clock = 48000000, /* 48MHz (APLL96/2) */ + .shift = 2, +}; + +static int pcaaxl2_console_init(void) +{ + /* Register the serial port */ + add_ns16550_device(-1, OMAP44XX_UART3_BASE, 1024, + IORESOURCE_MEM_8BIT, &serial_plat); + + return 0; +} +console_initcall(pcaaxl2_console_init); + +static int pcaaxl2_mem_init(void) +{ + arm_add_mem_device("ram0", 0x80000000, SZ_512M); + + add_mem_device("sram0", 0x40300000, 48 * 1024, + IORESOURCE_MEM_WRITEABLE); + return 0; +} +mem_initcall(pcaaxl2_mem_init); + +static struct gpmc_config net_cfg = { + .cfg = { + 0x00001000, /* CONF1 */ + 0x00080800, /* CONF2 */ + 0x00000000, /* CONF3 */ + 0x08000800, /* CONF4 */ + 0x000a0a0a, /* CONF5 */ + 0x000003c2, /* CONF6 */ + }, + .base = 0x2C000000, + .size = GPMC_SIZE_16M, +}; + +static void pcaaxl2_network_init(void) +{ + gpmc_cs_config(5, &net_cfg); + + add_ks8851_device(-1, net_cfg.base, net_cfg.base + 2, + IORESOURCE_MEM_16BIT, NULL); +} + +static struct i2c_board_info i2c_devices[] = { + { + I2C_BOARD_INFO("twlcore", 0x48), + }, +}; + +static struct omap_hsmmc_platform_data mmc_device = { + .f_max = 26000000, +}; + +#define OMAP4_CONTROL_PBIASLITE 0x4A100600 +#define OMAP4_MMC1_PBIASLITE_VMODE (1<<21) +#define OMAP4_MMC1_PBIASLITE_PWRDNZ (1<<22) +#define OMAP4_MMC1_PWRDNZ (1<<26) + +static int pcaaxl2_devices_init(void) +{ + u32 value; + + i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices)); + add_generic_device("i2c-omap", -1, NULL, 0x48070000, 0x1000, + IORESOURCE_MEM, NULL); + + value = readl(OMAP4_CONTROL_PBIASLITE); + value &= ~OMAP4_MMC1_PBIASLITE_VMODE; + value |= (OMAP4_MMC1_PBIASLITE_PWRDNZ | OMAP4_MMC1_PWRDNZ); + writel(value, OMAP4_CONTROL_PBIASLITE); + + add_generic_device("omap-hsmmc", -1, NULL, 0x4809C100, SZ_4K, + IORESOURCE_MEM, &mmc_device); + + gpmc_generic_init(0x10); + + pcaaxl2_network_init(); + + gpmc_generic_nand_devices_init(0, 16, + OMAP_ECC_BCH8_CODE_HW, &omap4_nand_cfg); + +#ifdef CONFIG_PARTITION + devfs_add_partition("nand0", 0x00000, SZ_128K, + PARTITION_FIXED, "xload_raw"); + dev_add_bb_dev("xload_raw", "xload"); + devfs_add_partition("nand0", SZ_128K, SZ_256K, + PARTITION_FIXED, "self_raw"); + dev_add_bb_dev("self_raw", "self0"); + devfs_add_partition("nand0", SZ_128K + SZ_256K, SZ_128K, + PARTITION_FIXED, "env_raw"); + dev_add_bb_dev("env_raw", "env0"); +#endif + + armlinux_set_bootparams((void *)0x80000100); + armlinux_set_architecture(MACH_TYPE_PCAAXL2); + + return 0; +} +device_initcall(pcaaxl2_devices_init); diff --git a/arch/arm/boards/phycard-i.MX27/pca100.c b/arch/arm/boards/phycard-i.MX27/pca100.c index 1b439516ba..a0a9911a88 100644 --- a/arch/arm/boards/phycard-i.MX27/pca100.c +++ b/arch/arm/boards/phycard-i.MX27/pca100.c @@ -26,6 +26,7 @@ #include <fec.h> #include <mach/gpio.h> #include <asm/armlinux.h> +#include <asm-generic/sections.h> #include <generated/mach-types.h> #include <partition.h> #include <fs.h> @@ -38,7 +39,7 @@ #include <mach/imxfb.h> #include <gpio.h> #include <asm/mmu.h> -#include <usb/isp1504.h> +#include <usb/ulpi.h> #include <mach/iomux-mx27.h> #include <mach/devices-imx27.h> @@ -139,9 +140,9 @@ static void pca100_usb_register(void) mdelay(10); - isp1504_set_vbus_power((void *)(IMX_OTG_BASE + 0x170), 1); + ulpi_setup((void *)(IMX_OTG_BASE + 0x170), 1); add_generic_usb_ehci_device(-1, IMX_OTG_BASE, NULL); - isp1504_set_vbus_power((void *)(IMX_OTG_BASE + 0x570), 1); + ulpi_setup((void *)(IMX_OTG_BASE + 0x570), 1); add_generic_usb_ehci_device(-1, IMX_OTG_BASE + 0x400, NULL); } #endif @@ -292,7 +293,7 @@ static int pca100_devices_init(void) imx27_add_nand(&nand_info); imx27_add_fec(&fec_info); - imx27_add_mmc0(NULL); + imx27_add_mmc1(NULL); imx27_add_fb(&pca100_fb_data); PCCR1 |= PCCR1_PERCLK2_EN; @@ -327,7 +328,7 @@ console_initcall(pca100_console_init); #ifdef CONFIG_NAND_IMX_BOOT void __bare_init nand_boot(void) { - imx_nand_load_image((void *)TEXT_BASE, 256 * 1024); + imx_nand_load_image((void *)TEXT_BASE, barebox_image_size); } #endif diff --git a/arch/arm/boards/pm9263/init.c b/arch/arm/boards/pm9263/init.c index 92d7e9f166..499ee466e4 100644 --- a/arch/arm/boards/pm9263/init.c +++ b/arch/arm/boards/pm9263/init.c @@ -108,7 +108,7 @@ static int pm9263_devices_init(void) at91_set_gpio_value(AT91_PIN_PB27, 1); /* 1- enable, 0 - disable */ pm_add_device_nand(); - at91_add_device_eth(&macb_pdata); + at91_add_device_eth(0, &macb_pdata); add_cfi_flash_device(0, AT91_CHIPSELECT_0, 4 * 1024 * 1024, 0); devfs_add_partition("nor0", 0x00000, 0x40000, PARTITION_FIXED, "self0"); diff --git a/arch/arm/boards/pm9g45/env/config b/arch/arm/boards/pm9g45/env/config index 3dea7247f5..5f05e6f04f 100644 --- a/arch/arm/boards/pm9g45/env/config +++ b/arch/arm/boards/pm9g45/env/config @@ -11,9 +11,9 @@ ip=dhcp #eth0.serverip=a.b.c.d # can be either 'nfs', 'tftp' or 'nand' -kernel_loc=tftp +kernel_loc=nand # can be either 'net', 'nand' or 'initrd' -rootfs_loc=net +rootfs_loc=nand # can be either 'jffs2' or 'ubifs' rootfs_type=ubifs @@ -25,8 +25,8 @@ kernelimage=uImage #kernelimage=Image.lzo nand_device=atmel_nand -nand_parts="256k(barebox)ro,64k(bareboxenv),1536k(kernel),-(root)" -rootfs_mtdblock_nand=3 +nand_parts="128k(bootstrap)ro,256k(barebox)ro,1664k(bareboxenv),3M(kernel),-(root)" +rootfs_mtdblock_nand=4 autoboot_timeout=3 diff --git a/arch/arm/boards/pm9g45/init.c b/arch/arm/boards/pm9g45/init.c index 480c7513e3..9b2227647a 100644 --- a/arch/arm/boards/pm9g45/init.c +++ b/arch/arm/boards/pm9g45/init.c @@ -77,11 +77,54 @@ static void pm_add_device_nand(void) at91_add_device_nand(&nand_pdata); } +#if defined(CONFIG_MCI_ATMEL) +static struct atmel_mci_platform_data __initdata mci_data = { + .bus_width = 4, + .wp_pin = 0, + .detect_pin = AT91_PIN_PD6, +}; + +static void pm9g45_add_device_mci(void) +{ + at91_add_device_mci(0, &mci_data); +} +#else +static void pm9g45_add_device_mci(void) {} +#endif + +/* + * USB OHCI Host port + */ +#ifdef CONFIG_USB_OHCI_AT91 +static struct at91_usbh_data __initdata usbh_data = { + .ports = 2, + .vbus_pin = { AT91_PIN_PD0, 0x0 }, +}; + +static void __init pm9g45_add_device_usbh(void) +{ + at91_add_device_usbh_ohci(&usbh_data); +} +#else +static void __init pm9g45_add_device_usbh(void) {} +#endif + static struct at91_ether_platform_data macb_pdata = { .flags = AT91SAM_ETHER_RMII, .phy_addr = 0, }; +static void pm9g45_phy_init(void) +{ + /* + * PD2 enables the 50MHz oscillator for Ethernet PHY + * 1 - enable + * 0 - disable + */ + at91_set_gpio_output(AT91_PIN_PD2, 1); + at91_set_gpio_value(AT91_PIN_PD2, 1); +} + static int pm9g45_mem_init(void) { at91_add_device_sdram(128 * 1024 * 1024); @@ -93,7 +136,10 @@ mem_initcall(pm9g45_mem_init); static int pm9g45_devices_init(void) { pm_add_device_nand(); - at91_add_device_eth(&macb_pdata); + pm9g45_add_device_mci(); + pm9g45_phy_init(); + at91_add_device_eth(0, &macb_pdata); + pm9g45_add_device_usbh(); devfs_add_partition("nand0", 0x00000, 0x80000, PARTITION_FIXED, "self_raw"); dev_add_bb_dev("self_raw", "self0"); diff --git a/arch/arm/boards/tny-a926x/env/config b/arch/arm/boards/tny-a926x/env/config index 0ca38d520e..b5215dc46e 100644 --- a/arch/arm/boards/tny-a926x/env/config +++ b/arch/arm/boards/tny-a926x/env/config @@ -2,7 +2,7 @@ # use 'dhcp' to do dhcp in barebox and in kernel # use 'none' if you want to skip kernel ip autoconfiguration -ip=none +ip=dhcp-barebox # or set your networking parameters here #eth0.ipaddr=a.b.c.d diff --git a/arch/arm/boards/tny-a926x/init.c b/arch/arm/boards/tny-a926x/init.c index ad77f7bfb1..2065eae985 100644 --- a/arch/arm/boards/tny-a926x/init.c +++ b/arch/arm/boards/tny-a926x/init.c @@ -156,7 +156,7 @@ static void tny_a9260_phy_reset(void) static void __init ek_add_device_macb(void) { tny_a9260_phy_reset(); - at91_add_device_eth(&macb_pdata); + at91_add_device_eth(0, &macb_pdata); } #else static void __init ek_add_device_macb(void) {} diff --git a/arch/arm/boards/tqma53/board.c b/arch/arm/boards/tqma53/board.c index 020eb6858b..184c00f16a 100644 --- a/arch/arm/boards/tqma53/board.c +++ b/arch/arm/boards/tqma53/board.c @@ -240,7 +240,7 @@ static int tqma53_devices_init(void) mdelay(1); gpio_set_value(GPIO_FEC_NRESET, 1); - imx51_iim_register_fec_ethaddr(); + imx53_iim_register_fec_ethaddr(); imx53_add_fec(&fec_info); imx53_add_mmc1(&tqma53_sd2_data); imx53_add_mmc2(&tqma53_sd3_data); diff --git a/arch/arm/boards/tqma53/flash_header.c b/arch/arm/boards/tqma53/flash_header.c index 73ea0c3270..f5e817c8c7 100644 --- a/arch/arm/boards/tqma53/flash_header.c +++ b/arch/arm/boards/tqma53/flash_header.c @@ -97,7 +97,7 @@ struct imx_flash_header_v2 __flash_header_section flash_header = { .self = APP_DEST + 0x400, .boot_data.start = APP_DEST, - .boot_data.size = 0x40000, + .boot_data.size = DCD_BAREBOX_SIZE, .dcd.header.tag = DCD_HEADER_TAG, .dcd.header.length = cpu_to_be16(sizeof(struct imx_dcd) + sizeof(dcd_entry)), diff --git a/arch/arm/boards/usb-a926x/env/config b/arch/arm/boards/usb-a926x/env/config index 96a4524844..1f7280382c 100644 --- a/arch/arm/boards/usb-a926x/env/config +++ b/arch/arm/boards/usb-a926x/env/config @@ -2,7 +2,8 @@ # use 'dhcp' to do dhcp in barebox and in kernel # use 'none' if you want to skip kernel ip autoconfiguration -ip=dhcp +ip=dhcp-barebox +dhcp_vendor_id=barebox-at91sam9x5ek # or set your networking parameters here #eth0.ipaddr=a.b.c.d diff --git a/arch/arm/boards/usb-a926x/init.c b/arch/arm/boards/usb-a926x/init.c index af025b414e..57609b1818 100644 --- a/arch/arm/boards/usb-a926x/init.c +++ b/arch/arm/boards/usb-a926x/init.c @@ -320,7 +320,7 @@ static int usb_a9260_devices_init(void) { usb_a9260_add_device_nand(); usb_a9260_phy_reset(); - at91_add_device_eth(&macb_pdata); + at91_add_device_eth(0, &macb_pdata); usb_a9260_add_device_mci(); at91_add_device_usbh_ohci(&ek_usbh_data); ek_add_device_udc(); diff --git a/arch/arm/configs/at91rm9200ek_defconfig b/arch/arm/configs/at91rm9200ek_defconfig index 584bfdfd20..1c5678707c 100644 --- a/arch/arm/configs/at91rm9200ek_defconfig +++ b/arch/arm/configs/at91rm9200ek_defconfig @@ -1,4 +1,8 @@ CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y +CONFIG_MMU=y +CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000 +CONFIG_EXPERIMENTAL=y +CONFIG_MALLOC_TLSF=y CONFIG_PROMPT="9200-EK:" CONFIG_LONGHELP=y CONFIG_GLOB=y @@ -6,13 +10,13 @@ CONFIG_HUSH_FANCY_PROMPT=y CONFIG_CMDLINE_EDITING=y CONFIG_AUTO_COMPLETE=y CONFIG_MENU=y -CONFIG_PARTITION=y +# CONFIG_CONSOLE_ACTIVATE_FIRST is not set +CONFIG_CONSOLE_ACTIVATE_ALL=y CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/at91rm9200ek/env" CONFIG_CMD_EDIT=y CONFIG_CMD_SLEEP=y CONFIG_CMD_SAVEENV=y -CONFIG_CMD_LOADENV=y CONFIG_CMD_EXPORT=y CONFIG_CMD_PRINTENV=y CONFIG_CMD_READLINE=y @@ -28,20 +32,35 @@ CONFIG_CMD_FLASH=y CONFIG_CMD_BOOTM_ZLIB=y CONFIG_CMD_BOOTM_BZLIB=y CONFIG_CMD_BOOTM_SHOW_TYPE=y +CONFIG_CMD_BOOTM_INITRD=y CONFIG_CMD_RESET=y CONFIG_CMD_GO=y CONFIG_CMD_TIMEOUT=y CONFIG_CMD_PARTITION=y CONFIG_CMD_GPIO=y CONFIG_CMD_UNCOMPRESS=y +CONFIG_CMD_LED=y +CONFIG_CMD_LED_TRIGGER=y +CONFIG_NET=y +CONFIG_NET_DHCP=y +CONFIG_NET_NFS=y +CONFIG_NET_PING=y +CONFIG_NET_TFTP=y +CONFIG_NET_TFTP_PUSH=y +CONFIG_NET_NETCONSOLE=y +CONFIG_NET_RESOLV=y +CONFIG_DRIVER_NET_AT91_ETHER=y # CONFIG_SPI is not set CONFIG_DRIVER_CFI=y # CONFIG_DRIVER_CFI_INTEL is not set # CONFIG_DRIVER_CFI_BANK_WIDTH_1 is not set # CONFIG_DRIVER_CFI_BANK_WIDTH_4 is not set CONFIG_CFI_BUFFER_WRITE=y -CONFIG_MTD=y -CONFIG_UBI=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_SERIAL=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_LED_TRIGGERS=y CONFIG_FS_CRAMFS=y CONFIG_SHA1=y CONFIG_SHA256=y diff --git a/arch/arm/configs/at91sam9260ek_defconfig b/arch/arm/configs/at91sam9260ek_defconfig index 613dd9f824..c288d396fd 100644 --- a/arch/arm/configs/at91sam9260ek_defconfig +++ b/arch/arm/configs/at91sam9260ek_defconfig @@ -2,6 +2,8 @@ CONFIG_ARCH_AT91SAM9260=y CONFIG_AEABI=y # CONFIG_CMD_ARM_CPUINFO is not set CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y +CONFIG_MMU=y +CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000 CONFIG_EXPERIMENTAL=y CONFIG_PROMPT="9260-EK:" CONFIG_LONGHELP=y @@ -17,7 +19,6 @@ CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/at91sam9260ek/env" CONFIG_CMD_EDIT=y CONFIG_CMD_SLEEP=y CONFIG_CMD_SAVEENV=y -CONFIG_CMD_LOADENV=y CONFIG_CMD_EXPORT=y CONFIG_CMD_PRINTENV=y CONFIG_CMD_READLINE=y diff --git a/arch/arm/configs/at91sam9261ek_defconfig b/arch/arm/configs/at91sam9261ek_defconfig index b60407f058..137226f0ec 100644 --- a/arch/arm/configs/at91sam9261ek_defconfig +++ b/arch/arm/configs/at91sam9261ek_defconfig @@ -1,5 +1,11 @@ CONFIG_ARCH_AT91SAM9261=y +CONFIG_AEABI=y +# CONFIG_CMD_ARM_CPUINFO is not set CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y +CONFIG_MMU=y +CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000 +CONFIG_EXPERIMENTAL=y +CONFIG_MALLOC_TLSF=y CONFIG_PROMPT="9261-EK:" CONFIG_LONGHELP=y CONFIG_GLOB=y @@ -7,13 +13,13 @@ CONFIG_HUSH_FANCY_PROMPT=y CONFIG_CMDLINE_EDITING=y CONFIG_AUTO_COMPLETE=y CONFIG_MENU=y -CONFIG_PARTITION=y +# CONFIG_CONSOLE_ACTIVATE_FIRST is not set +CONFIG_CONSOLE_ACTIVATE_ALL=y CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/at91sam9261ek/env" CONFIG_CMD_EDIT=y CONFIG_CMD_SLEEP=y CONFIG_CMD_SAVEENV=y -CONFIG_CMD_LOADENV=y CONFIG_CMD_EXPORT=y CONFIG_CMD_PRINTENV=y CONFIG_CMD_READLINE=y @@ -25,15 +31,17 @@ CONFIG_CMD_LOADB=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MTEST=y CONFIG_CMD_FLASH=y -CONFIG_CMD_BOOTM_ZLIB=y -CONFIG_CMD_BOOTM_BZLIB=y CONFIG_CMD_BOOTM_SHOW_TYPE=y +CONFIG_CMD_BOOTM_INITRD=y +CONFIG_CMD_UIMAGE=y +# CONFIG_CMD_BOOTU is not set CONFIG_CMD_RESET=y CONFIG_CMD_GO=y CONFIG_CMD_TIMEOUT=y CONFIG_CMD_PARTITION=y CONFIG_CMD_GPIO=y -CONFIG_CMD_UNCOMPRESS=y +CONFIG_CMD_LED=y +CONFIG_CMD_LED_TRIGGER=y CONFIG_NET=y CONFIG_NET_DHCP=y CONFIG_NET_NFS=y @@ -44,6 +52,17 @@ CONFIG_NET_RESOLV=y CONFIG_DRIVER_NET_DM9K=y # CONFIG_SPI is not set CONFIG_MTD=y +# CONFIG_MTD_OOB_DEVICE is not set CONFIG_NAND=y +# CONFIG_NAND_ECC_HW is not set +# CONFIG_NAND_ECC_HW_SYNDROME is not set +# CONFIG_NAND_ECC_HW_NONE is not set CONFIG_NAND_ATMEL=y CONFIG_UBI=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DFU=y +CONFIG_USB_GADGET_SERIAL=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_LED_TRIGGERS=y +CONFIG_KEYBOARD_GPIO=y diff --git a/arch/arm/configs/at91sam9263ek_defconfig b/arch/arm/configs/at91sam9263ek_defconfig index 308f0cd5d3..f59eab979c 100644 --- a/arch/arm/configs/at91sam9263ek_defconfig +++ b/arch/arm/configs/at91sam9263ek_defconfig @@ -1,32 +1,43 @@ CONFIG_ARCH_AT91SAM9263=y CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y +CONFIG_MMU=y +CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000 +CONFIG_EXPERIMENTAL=y +CONFIG_MALLOC_TLSF=y CONFIG_PROMPT="9263-EK:" CONFIG_LONGHELP=y CONFIG_GLOB=y CONFIG_HUSH_FANCY_PROMPT=y CONFIG_CMDLINE_EDITING=y CONFIG_AUTO_COMPLETE=y -CONFIG_PARTITION=y +# CONFIG_CONSOLE_ACTIVATE_FIRST is not set +CONFIG_CONSOLE_ACTIVATE_ALL=y CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/at91sam9263ek/env" CONFIG_CMD_EDIT=y CONFIG_CMD_SLEEP=y CONFIG_CMD_SAVEENV=y -CONFIG_CMD_LOADENV=y CONFIG_CMD_EXPORT=y CONFIG_CMD_PRINTENV=y CONFIG_CMD_READLINE=y +CONFIG_CMD_LOADB=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MTEST=y CONFIG_CMD_FLASH=y -CONFIG_CMD_BOOTM_ZLIB=y -CONFIG_CMD_BOOTM_BZLIB=y CONFIG_CMD_BOOTM_SHOW_TYPE=y +CONFIG_CMD_BOOTM_INITRD=y +CONFIG_CMD_BOOTM_OFTREE=y +CONFIG_CMD_BOOTM_OFTREE_UIMAGE=y +CONFIG_CMD_UIMAGE=y +# CONFIG_CMD_BOOTU is not set CONFIG_CMD_RESET=y CONFIG_CMD_GO=y +CONFIG_CMD_OFTREE=y CONFIG_CMD_TIMEOUT=y CONFIG_CMD_PARTITION=y CONFIG_CMD_GPIO=y +CONFIG_CMD_LED=y +CONFIG_CMD_LED_TRIGGER=y CONFIG_NET=y CONFIG_NET_DHCP=y CONFIG_NET_NFS=y @@ -35,13 +46,23 @@ CONFIG_NET_TFTP=y CONFIG_DRIVER_NET_MACB=y # CONFIG_SPI is not set CONFIG_DRIVER_CFI=y -CONFIG_CFI_BUFFER_WRITE=y +# CONFIG_DRIVER_CFI_INTEL is not set CONFIG_MTD=y +# CONFIG_MTD_OOB_DEVICE is not set CONFIG_NAND=y +# CONFIG_NAND_ECC_HW is not set +# CONFIG_NAND_ECC_HW_SYNDROME is not set +# CONFIG_NAND_ECC_HW_NONE is not set CONFIG_NAND_ATMEL=y CONFIG_UBI=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DFU=y +CONFIG_USB_GADGET_SERIAL=y CONFIG_MCI=y CONFIG_MCI_ATMEL=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_LED_TRIGGERS=y CONFIG_FS_FAT=y CONFIG_FS_FAT_WRITE=y CONFIG_FS_FAT_LFN=y diff --git a/arch/arm/configs/at91sam9g10ek_defconfig b/arch/arm/configs/at91sam9g10ek_defconfig index d54e42c38f..dbae4bd0b4 100644 --- a/arch/arm/configs/at91sam9g10ek_defconfig +++ b/arch/arm/configs/at91sam9g10ek_defconfig @@ -1,41 +1,68 @@ CONFIG_ARCH_AT91SAM9G10=y +CONFIG_AEABI=y +# CONFIG_CMD_ARM_CPUINFO is not set CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y +CONFIG_MMU=y +CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000 +CONFIG_EXPERIMENTAL=y +CONFIG_MALLOC_TLSF=y CONFIG_PROMPT="9G10-EK:" CONFIG_LONGHELP=y CONFIG_GLOB=y +CONFIG_HUSH_FANCY_PROMPT=y CONFIG_CMDLINE_EDITING=y CONFIG_AUTO_COMPLETE=y -CONFIG_PARTITION=y +CONFIG_MENU=y +# CONFIG_CONSOLE_ACTIVATE_FIRST is not set +CONFIG_CONSOLE_ACTIVATE_ALL=y CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/at91sam9261ek/env" CONFIG_CMD_EDIT=y CONFIG_CMD_SLEEP=y CONFIG_CMD_SAVEENV=y -CONFIG_CMD_LOADENV=y CONFIG_CMD_EXPORT=y CONFIG_CMD_PRINTENV=y CONFIG_CMD_READLINE=y +CONFIG_CMD_MENU=y +CONFIG_CMD_MENU_MANAGEMENT=y +CONFIG_CMD_PASSWD=y +CONFIG_CMD_ECHO_E=y +CONFIG_CMD_LOADB=y CONFIG_CMD_MEMINFO=y -CONFIG_CMD_CRC=y CONFIG_CMD_MTEST=y CONFIG_CMD_FLASH=y -CONFIG_CMD_BOOTM_ZLIB=y -CONFIG_CMD_BOOTM_BZLIB=y CONFIG_CMD_BOOTM_SHOW_TYPE=y +CONFIG_CMD_BOOTM_INITRD=y +CONFIG_CMD_UIMAGE=y +# CONFIG_CMD_BOOTU is not set CONFIG_CMD_RESET=y CONFIG_CMD_GO=y CONFIG_CMD_TIMEOUT=y CONFIG_CMD_PARTITION=y CONFIG_CMD_GPIO=y -CONFIG_CMD_UNCOMPRESS=y +CONFIG_CMD_LED=y +CONFIG_CMD_LED_TRIGGER=y CONFIG_NET=y CONFIG_NET_DHCP=y CONFIG_NET_NFS=y CONFIG_NET_PING=y CONFIG_NET_TFTP=y +CONFIG_NET_TFTP_PUSH=y +CONFIG_NET_RESOLV=y CONFIG_DRIVER_NET_DM9K=y # CONFIG_SPI is not set CONFIG_MTD=y +# CONFIG_MTD_OOB_DEVICE is not set CONFIG_NAND=y +# CONFIG_NAND_ECC_HW is not set +# CONFIG_NAND_ECC_HW_SYNDROME is not set +# CONFIG_NAND_ECC_HW_NONE is not set CONFIG_NAND_ATMEL=y CONFIG_UBI=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DFU=y +CONFIG_USB_GADGET_SERIAL=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_LED_TRIGGERS=y +CONFIG_KEYBOARD_GPIO=y diff --git a/arch/arm/configs/at91sam9g20ek_defconfig b/arch/arm/configs/at91sam9g20ek_defconfig index 18bd2ae9b3..9473488fc2 100644 --- a/arch/arm/configs/at91sam9g20ek_defconfig +++ b/arch/arm/configs/at91sam9g20ek_defconfig @@ -3,6 +3,8 @@ CONFIG_AT91_HAVE_2MMC=y CONFIG_AEABI=y # CONFIG_CMD_ARM_CPUINFO is not set CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y +CONFIG_MMU=y +CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000 CONFIG_EXPERIMENTAL=y CONFIG_PROMPT="9G20-EK:" CONFIG_LONGHELP=y @@ -18,7 +20,6 @@ CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/at91sam9260ek/env" CONFIG_CMD_EDIT=y CONFIG_CMD_SLEEP=y CONFIG_CMD_SAVEENV=y -CONFIG_CMD_LOADENV=y CONFIG_CMD_EXPORT=y CONFIG_CMD_PRINTENV=y CONFIG_CMD_READLINE=y diff --git a/arch/arm/configs/at91sam9m10g45ek_defconfig b/arch/arm/configs/at91sam9m10g45ek_defconfig index 548fe6ccf2..b72e964d7f 100644 --- a/arch/arm/configs/at91sam9m10g45ek_defconfig +++ b/arch/arm/configs/at91sam9m10g45ek_defconfig @@ -1,22 +1,25 @@ CONFIG_ARCH_AT91SAM9G45=y CONFIG_MACH_AT91SAM9M10G45EK=y +CONFIG_AEABI=y +# CONFIG_CMD_ARM_CPUINFO is not set CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y +CONFIG_MMU=y +CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000 +CONFIG_MALLOC_TLSF=y CONFIG_PROMPT="9M10G45-EK:" CONFIG_LONGHELP=y CONFIG_GLOB=y -CONFIG_PROMPT_HUSH_PS2="y" +CONFIG_PROMPT_HUSH_PS2=">" CONFIG_HUSH_FANCY_PROMPT=y CONFIG_CMDLINE_EDITING=y CONFIG_AUTO_COMPLETE=y CONFIG_MENU=y CONFIG_PASSWD_SUM_SHA1=y -CONFIG_PARTITION=y CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/at91sam9m10g45ek/env" CONFIG_CMD_EDIT=y CONFIG_CMD_SLEEP=y CONFIG_CMD_SAVEENV=y -CONFIG_CMD_LOADENV=y CONFIG_CMD_EXPORT=y CONFIG_CMD_PRINTENV=y CONFIG_CMD_READLINE=y @@ -29,15 +32,23 @@ CONFIG_CMD_MEMINFO=y CONFIG_CMD_MTEST=y CONFIG_CMD_MTEST_ALTERNATIVE=y CONFIG_CMD_FLASH=y -CONFIG_CMD_BOOTM_ZLIB=y -CONFIG_CMD_BOOTM_BZLIB=y CONFIG_CMD_BOOTM_SHOW_TYPE=y +CONFIG_CMD_BOOTM_VERBOSE=y +CONFIG_CMD_BOOTM_INITRD=y +CONFIG_CMD_BOOTM_OFTREE=y +CONFIG_CMD_BOOTM_OFTREE_UIMAGE=y +CONFIG_CMD_UIMAGE=y CONFIG_CMD_RESET=y CONFIG_CMD_GO=y +CONFIG_CMD_OFTREE=y CONFIG_CMD_TIMEOUT=y CONFIG_CMD_PARTITION=y +CONFIG_CMD_MAGICVAR=y +CONFIG_CMD_MAGICVAR_HELP=y CONFIG_CMD_GPIO=y CONFIG_CMD_UNCOMPRESS=y +CONFIG_CMD_LED=y +CONFIG_CMD_LED_TRIGGER=y CONFIG_NET=y CONFIG_NET_DHCP=y CONFIG_NET_NFS=y @@ -48,14 +59,19 @@ CONFIG_NET_NETCONSOLE=y CONFIG_NET_RESOLV=y CONFIG_DRIVER_NET_MACB=y # CONFIG_SPI is not set -CONFIG_DRIVER_CFI=y -CONFIG_CFI_BUFFER_WRITE=y CONFIG_MTD=y CONFIG_NAND=y +# CONFIG_NAND_ECC_HW is not set +# CONFIG_NAND_ECC_HW_SYNDROME is not set +# CONFIG_NAND_ECC_HW_NONE is not set CONFIG_NAND_ATMEL=y CONFIG_UBI=y CONFIG_MCI=y -CONFIG_MCI_WRITE=y +CONFIG_MCI_STARTUP=y CONFIG_MCI_ATMEL=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_LED_TRIGGERS=y CONFIG_FS_FAT=y CONFIG_FS_FAT_WRITE=y +CONFIG_FS_FAT_LFN=y diff --git a/arch/arm/configs/at91sam9x5ek_defconfig b/arch/arm/configs/at91sam9x5ek_defconfig new file mode 100644 index 0000000000..aee21fd9bc --- /dev/null +++ b/arch/arm/configs/at91sam9x5ek_defconfig @@ -0,0 +1,69 @@ +CONFIG_ARCH_AT91SAM9X5=y +CONFIG_AEABI=y +# CONFIG_CMD_ARM_CPUINFO is not set +CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y +CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000 +CONFIG_EXPERIMENTAL=y +CONFIG_MALLOC_TLSF=y +CONFIG_PROMPT="9G20-EK:" +CONFIG_LONGHELP=y +CONFIG_GLOB=y +CONFIG_PROMPT_HUSH_PS2="y" +CONFIG_HUSH_FANCY_PROMPT=y +CONFIG_CMDLINE_EDITING=y +CONFIG_AUTO_COMPLETE=y +# CONFIG_CONSOLE_ACTIVATE_FIRST is not set +CONFIG_CONSOLE_ACTIVATE_ALL=y +CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y +CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/at91sam9x5ek/env" +CONFIG_CMD_EDIT=y +CONFIG_CMD_SLEEP=y +CONFIG_CMD_SAVEENV=y +CONFIG_CMD_EXPORT=y +CONFIG_CMD_PRINTENV=y +CONFIG_CMD_READLINE=y +CONFIG_CMD_ECHO_E=y +CONFIG_CMD_LOADB=y +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_MTEST=y +CONFIG_CMD_MTEST_ALTERNATIVE=y +CONFIG_CMD_FLASH=y +CONFIG_CMD_BOOTM_SHOW_TYPE=y +CONFIG_CMD_BOOTM_INITRD=y +CONFIG_CMD_BOOTM_OFTREE=y +CONFIG_CMD_BOOTM_OFTREE_UIMAGE=y +CONFIG_CMD_UIMAGE=y +# CONFIG_CMD_BOOTU is not set +CONFIG_CMD_RESET=y +CONFIG_CMD_GO=y +CONFIG_CMD_OFTREE=y +CONFIG_CMD_TIMEOUT=y +CONFIG_CMD_PARTITION=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_LED=y +CONFIG_CMD_LED_TRIGGER=y +CONFIG_NET=y +CONFIG_NET_DHCP=y +CONFIG_NET_NFS=y +CONFIG_NET_PING=y +CONFIG_NET_TFTP=y +CONFIG_NET_NETCONSOLE=y +CONFIG_DRIVER_NET_MACB=y +# CONFIG_SPI is not set +CONFIG_MTD=y +CONFIG_NAND=y +# CONFIG_NAND_ECC_HW is not set +# CONFIG_NAND_ECC_HW_SYNDROME is not set +# CONFIG_NAND_ECC_HW_NONE is not set +CONFIG_NAND_ATMEL=y +CONFIG_UBI=y +CONFIG_DISK=y +CONFIG_DISK_WRITE=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_LED_TRIGGERS=y +CONFIG_KEYBOARD_GPIO=y +CONFIG_FS_FAT=y +CONFIG_FS_FAT_WRITE=y +CONFIG_FS_FAT_LFN=y +CONFIG_ZLIB=y diff --git a/arch/arm/configs/cupid_defconfig b/arch/arm/configs/cupid_defconfig index a311e27d93..28d199b8ed 100644 --- a/arch/arm/configs/cupid_defconfig +++ b/arch/arm/configs/cupid_defconfig @@ -18,7 +18,7 @@ CONFIG_CMDLINE_EDITING=y CONFIG_AUTO_COMPLETE=y CONFIG_MENU=y CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y -CONFIG_DEFAULT_ENVIRONMENT_PATH="defaultenv arch/arm/boards/guf-cupid/env" +CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/guf-cupid/env" CONFIG_CMD_EDIT=y CONFIG_CMD_SLEEP=y CONFIG_CMD_SAVEENV=y diff --git a/arch/arm/configs/eukrea_cpuimx51_defconfig b/arch/arm/configs/eukrea_cpuimx51_defconfig index 7a746cc333..76119cf5a5 100644 --- a/arch/arm/configs/eukrea_cpuimx51_defconfig +++ b/arch/arm/configs/eukrea_cpuimx51_defconfig @@ -11,7 +11,7 @@ CONFIG_HUSH_FANCY_PROMPT=y CONFIG_CMDLINE_EDITING=y CONFIG_AUTO_COMPLETE=y CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y -CONFIG_DEFAULT_ENVIRONMENT_PATH="defaultenv arch/arm/boards/eukrea_cpuimx51/env" +CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/eukrea_cpuimx51/env" CONFIG_CMD_EDIT=y CONFIG_CMD_SLEEP=y CONFIG_CMD_SAVEENV=y diff --git a/arch/arm/configs/freescale_mx51_babbage_defconfig b/arch/arm/configs/freescale_mx51_babbage_defconfig index dbdb76d4bf..19e49eff32 100644 --- a/arch/arm/configs/freescale_mx51_babbage_defconfig +++ b/arch/arm/configs/freescale_mx51_babbage_defconfig @@ -16,7 +16,7 @@ CONFIG_HUSH_FANCY_PROMPT=y CONFIG_CMDLINE_EDITING=y CONFIG_AUTO_COMPLETE=y CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y -CONFIG_DEFAULT_ENVIRONMENT_PATH="defaultenv arch/arm/boards/freescale-mx51-pdk/env/" +CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/freescale-mx51-pdk/env/" CONFIG_CMD_EDIT=y CONFIG_CMD_SLEEP=y CONFIG_CMD_SAVEENV=y diff --git a/arch/arm/configs/freescale_mx53_loco_defconfig b/arch/arm/configs/freescale_mx53_loco_defconfig index bd2bdbe5ac..f31d5bf4c9 100644 --- a/arch/arm/configs/freescale_mx53_loco_defconfig +++ b/arch/arm/configs/freescale_mx53_loco_defconfig @@ -16,7 +16,7 @@ CONFIG_HUSH_FANCY_PROMPT=y CONFIG_CMDLINE_EDITING=y CONFIG_AUTO_COMPLETE=y CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y -CONFIG_DEFAULT_ENVIRONMENT_PATH="defaultenv arch/arm/boards/freescale-mx53-loco/env/" +CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/freescale-mx53-loco/env/" CONFIG_DEBUG_INFO=y CONFIG_CMD_EDIT=y CONFIG_CMD_SLEEP=y diff --git a/arch/arm/configs/freescale_mx53_smd_defconfig b/arch/arm/configs/freescale_mx53_smd_defconfig index f37df56912..1ede9ac6c1 100644 --- a/arch/arm/configs/freescale_mx53_smd_defconfig +++ b/arch/arm/configs/freescale_mx53_smd_defconfig @@ -17,7 +17,7 @@ CONFIG_HUSH_FANCY_PROMPT=y CONFIG_CMDLINE_EDITING=y CONFIG_AUTO_COMPLETE=y CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y -CONFIG_DEFAULT_ENVIRONMENT_PATH="defaultenv arch/arm/boards/freescale-mx53-smd/env/" +CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/freescale-mx53-smd/env/" CONFIG_DEBUG_INFO=y CONFIG_CMD_EDIT=y CONFIG_CMD_SLEEP=y diff --git a/arch/arm/configs/imx28evk_defconfig b/arch/arm/configs/imx28evk_defconfig index 1860aef443..1b44cf4ecc 100644 --- a/arch/arm/configs/imx28evk_defconfig +++ b/arch/arm/configs/imx28evk_defconfig @@ -33,6 +33,7 @@ CONFIG_CMD_RESET=y CONFIG_CMD_GO=y CONFIG_CMD_TIMEOUT=y CONFIG_CMD_PARTITION=y +CONFIG_CMD_BMP=y CONFIG_CMD_GPIO=y CONFIG_NET=y CONFIG_NET_DHCP=y @@ -41,6 +42,8 @@ CONFIG_NET_TFTP=y CONFIG_NET_RESOLV=y CONFIG_DRIVER_NET_FEC_IMX=y # CONFIG_SPI is not set +CONFIG_VIDEO=y +CONFIG_DRIVER_VIDEO_STM=y CONFIG_MCI=y CONFIG_MCI_STARTUP=y CONFIG_MCI_MXS=y diff --git a/arch/arm/configs/neso_defconfig b/arch/arm/configs/neso_defconfig index 45ffe30a70..fe5110fa8f 100644 --- a/arch/arm/configs/neso_defconfig +++ b/arch/arm/configs/neso_defconfig @@ -68,7 +68,7 @@ CONFIG_NAND_IMX=y CONFIG_UBI=y CONFIG_USB=y CONFIG_USB_EHCI=y -CONFIG_USB_ISP1504=y +CONFIG_USB_ULPI=y CONFIG_VIDEO=y CONFIG_DRIVER_VIDEO_IMX=y CONFIG_IMXFB_DRIVER_VIDEO_IMX_OVERLAY=y diff --git a/arch/arm/configs/nhk8815_defconfig b/arch/arm/configs/nhk8815_defconfig index 597e9dd442..cec50d50d5 100644 --- a/arch/arm/configs/nhk8815_defconfig +++ b/arch/arm/configs/nhk8815_defconfig @@ -11,7 +11,7 @@ CONFIG_MENU=y CONFIG_PASSWD_SUM_SHA1=y CONFIG_PARTITION=y CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y -CONFIG_DEFAULT_ENVIRONMENT_PATH="defaultenv arch/arm/boards/nhk8815/env" +CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/nhk8815/env" CONFIG_CMD_EDIT=y CONFIG_CMD_SLEEP=y CONFIG_CMD_SAVEENV=y diff --git a/arch/arm/configs/pca100_defconfig b/arch/arm/configs/pca100_defconfig index 2df7e34178..76039e2d72 100644 --- a/arch/arm/configs/pca100_defconfig +++ b/arch/arm/configs/pca100_defconfig @@ -65,6 +65,6 @@ CONFIG_NAND_IMX=y CONFIG_UBI=y CONFIG_USB=y CONFIG_USB_EHCI=y -CONFIG_USB_ISP1504=y +CONFIG_USB_ULPI=y CONFIG_ZLIB=y CONFIG_LZO_DECOMPRESS=y diff --git a/arch/arm/configs/pcm038_defconfig b/arch/arm/configs/pcm038_defconfig index b63337ec83..17a5e14502 100644 --- a/arch/arm/configs/pcm038_defconfig +++ b/arch/arm/configs/pcm038_defconfig @@ -70,7 +70,7 @@ CONFIG_NAND_IMX=y CONFIG_UBI=y CONFIG_USB=y CONFIG_USB_EHCI=y -CONFIG_USB_ISP1504=y +CONFIG_USB_ULPI=y CONFIG_VIDEO=y CONFIG_DRIVER_VIDEO_IMX=y CONFIG_IMXFB_DRIVER_VIDEO_IMX_OVERLAY=y diff --git a/arch/arm/configs/pcm049_xload_defconfig b/arch/arm/configs/pcm049_xload_defconfig index bf309414b0..b6d3a7a376 100644 --- a/arch/arm/configs/pcm049_xload_defconfig +++ b/arch/arm/configs/pcm049_xload_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_OMAP4=y CONFIG_OMAP_BUILD_IFT=y CONFIG_MACH_PCM049=y CONFIG_AEABI=y +CONFIG_THUMB2_BAREBOX=y # CONFIG_CMD_ARM_CPUINFO is not set # CONFIG_ARM_EXCEPTIONS is not set CONFIG_MMU=y diff --git a/arch/arm/configs/phycard_a_l1_defconfig b/arch/arm/configs/phycard_a_l1_defconfig index 64afcc2edb..cf980f7ffb 100644 --- a/arch/arm/configs/phycard_a_l1_defconfig +++ b/arch/arm/configs/phycard_a_l1_defconfig @@ -63,7 +63,7 @@ CONFIG_PARTITION=y CONFIG_PARTITION_DISK=y CONFIG_PARTITION_DISK_DOS=y CONFIG_DEFAULT_ENVIRONMENT=y -CONFIG_DEFAULT_ENVIRONMENT_PATH="defaultenv ./arch/arm/boards/phycard-a-l1/env" +CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/phycard-a-l1/env" CONFIG_COMMAND_SUPPORT=y CONFIG_CMD_EDIT=y CONFIG_CMD_SLEEP=y diff --git a/arch/arm/configs/phycard_a_xl2_defconfig b/arch/arm/configs/phycard_a_xl2_defconfig new file mode 100644 index 0000000000..62ea5e9151 --- /dev/null +++ b/arch/arm/configs/phycard_a_xl2_defconfig @@ -0,0 +1,56 @@ +CONFIG_ARCH_OMAP=y +CONFIG_ARCH_OMAP4=y +CONFIG_MACH_PCAAXL2=y +CONFIG_AEABI=y +CONFIG_ARM_UNWIND=y +CONFIG_MMU=y +CONFIG_TEXT_BASE=0x8f000000 +CONFIG_MALLOC_SIZE=0x2000000 +CONFIG_KALLSYMS=y +CONFIG_PROMPT="barebox> " +CONFIG_LONGHELP=y +CONFIG_GLOB=y +CONFIG_HUSH_FANCY_PROMPT=y +CONFIG_HUSH_GETOPT=y +CONFIG_CMDLINE_EDITING=y +CONFIG_AUTO_COMPLETE=y +# CONFIG_TIMESTAMP is not set +CONFIG_PARTITION=y +CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y +CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/phycard-a-xl2/env/" +CONFIG_CMD_EDIT=y +CONFIG_CMD_SLEEP=y +CONFIG_CMD_SAVEENV=y +CONFIG_CMD_LOADENV=y +CONFIG_CMD_EXPORT=y +CONFIG_CMD_PRINTENV=y +CONFIG_CMD_READLINE=y +CONFIG_CMD_ECHO_E=y +CONFIG_CMD_LOADB=y +CONFIG_CMD_FLASH=y +# CONFIG_CMD_BOOTM is not set +CONFIG_CMD_RESET=y +CONFIG_CMD_GO=y +CONFIG_CMD_TIMEOUT=y +CONFIG_CMD_PARTITION=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_UNLZO=y +CONFIG_NET=y +CONFIG_NET_DHCP=y +CONFIG_NET_NFS=y +CONFIG_NET_PING=y +CONFIG_NET_TFTP=y +CONFIG_NET_TFTP_PUSH=y +CONFIG_DRIVER_SERIAL_NS16550=y +CONFIG_DRIVER_SERIAL_NS16550_OMAP_EXTENSIONS=y +CONFIG_DRIVER_NET_KS8851_MLL=y +# CONFIG_SPI is not set +CONFIG_MTD=y +CONFIG_NAND=y +CONFIG_NAND_OMAP_GPMC=y +CONFIG_UBI=y +CONFIG_MCI=y +CONFIG_MCI_OMAP_HSMMC=y +CONFIG_FS_FAT=y +CONFIG_FS_FAT_WRITE=y +CONFIG_FS_FAT_LFN=y diff --git a/arch/arm/configs/phycard_a_xl2_xload_defconfig b/arch/arm/configs/phycard_a_xl2_xload_defconfig new file mode 100644 index 0000000000..797522065a --- /dev/null +++ b/arch/arm/configs/phycard_a_xl2_xload_defconfig @@ -0,0 +1,41 @@ +CONFIG_ARCH_OMAP=y +CONFIG_ARCH_OMAP4=y +CONFIG_OMAP_BUILD_IFT=y +CONFIG_MACH_PCAAXL2=y +CONFIG_AEABI=y +CONFIG_THUMB2_BAREBOX=y +# CONFIG_CMD_ARM_CPUINFO is not set +# CONFIG_ARM_EXCEPTIONS is not set +CONFIG_MMU=y +CONFIG_TEXT_BASE=0x40300000 +CONFIG_MEMORY_LAYOUT_FIXED=y +CONFIG_STACK_BASE=0x8f000000 +CONFIG_MALLOC_BASE=0x84000000 +CONFIG_MALLOC_SIZE=0x2000000 +CONFIG_MALLOC_DUMMY=y +CONFIG_PROMPT="barebox> " +CONFIG_SHELL_NONE=y +# CONFIG_ERRNO_MESSAGES is not set +# CONFIG_TIMESTAMP is not set +# CONFIG_CONSOLE_FULL is not set +# CONFIG_DEFAULT_ENVIRONMENT is not set +CONFIG_DRIVER_SERIAL_NS16550=y +CONFIG_DRIVER_SERIAL_NS16550_OMAP_EXTENSIONS=y +# CONFIG_SPI is not set +CONFIG_MTD=y +# CONFIG_MTD_WRITE is not set +# CONFIG_MTD_OOB_DEVICE is not set +CONFIG_NAND=y +# CONFIG_NAND_ECC_SOFT is not set +# CONFIG_NAND_ECC_HW_SYNDROME is not set +# CONFIG_NAND_ECC_HW_NONE is not set +# CONFIG_NAND_INFO is not set +# CONFIG_NAND_BBT is not set +CONFIG_NAND_OMAP_GPMC=y +CONFIG_MCI=y +CONFIG_MCI_STARTUP=y +# CONFIG_MCI_WRITE is not set +CONFIG_MCI_OMAP_HSMMC=y +# CONFIG_FS_RAMFS is not set +# CONFIG_FS_DEVFS is not set +CONFIG_FS_FAT=y diff --git a/arch/arm/configs/pm9g45_defconfig b/arch/arm/configs/pm9g45_defconfig index bf9af22cfa..3c9fa69229 100644 --- a/arch/arm/configs/pm9g45_defconfig +++ b/arch/arm/configs/pm9g45_defconfig @@ -1,55 +1,46 @@ CONFIG_ARCH_AT91SAM9G45=y CONFIG_MACH_PM9G45=y -CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y -CONFIG_PROMPT="pm9g45:" +CONFIG_AEABI=y CONFIG_LONGHELP=y -CONFIG_GLOB=y -CONFIG_PROMPT_HUSH_PS2="y" -CONFIG_HUSH_FANCY_PROMPT=y CONFIG_CMDLINE_EDITING=y CONFIG_AUTO_COMPLETE=y -CONFIG_MENU=y -CONFIG_PASSWD_SUM_SHA1=y -CONFIG_PARTITION=y CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/pm9g45/env" +CONFIG_POLLER=y +CONFIG_ENABLE_DEVICE_NOISE=y CONFIG_CMD_EDIT=y -CONFIG_CMD_SLEEP=y CONFIG_CMD_SAVEENV=y -CONFIG_CMD_LOADENV=y CONFIG_CMD_EXPORT=y CONFIG_CMD_PRINTENV=y CONFIG_CMD_READLINE=y -CONFIG_CMD_MENU=y -CONFIG_CMD_MENU_MANAGEMENT=y -CONFIG_CMD_PASSWD=y -CONFIG_CMD_ECHO_E=y -CONFIG_CMD_LOADB=y -CONFIG_CMD_MEMINFO=y -CONFIG_CMD_MTEST=y -CONFIG_CMD_MTEST_ALTERNATIVE=y -CONFIG_CMD_FLASH=y -CONFIG_CMD_BOOTM_ZLIB=y -CONFIG_CMD_BOOTM_BZLIB=y -CONFIG_CMD_BOOTM_SHOW_TYPE=y +CONFIG_CMD_BOOTM_VERBOSE=y +CONFIG_CMD_UIMAGE=y CONFIG_CMD_RESET=y CONFIG_CMD_GO=y CONFIG_CMD_TIMEOUT=y CONFIG_CMD_PARTITION=y -CONFIG_CMD_GPIO=y -CONFIG_CMD_UNCOMPRESS=y CONFIG_NET=y CONFIG_NET_DHCP=y -CONFIG_NET_NFS=y CONFIG_NET_PING=y CONFIG_NET_TFTP=y CONFIG_NET_TFTP_PUSH=y -CONFIG_NET_NETCONSOLE=y CONFIG_NET_RESOLV=y CONFIG_DRIVER_NET_MACB=y -# CONFIG_SPI is not set -CONFIG_DRIVER_CFI=y -CONFIG_CFI_BUFFER_WRITE=y +CONFIG_DRIVER_SPI_ATMEL=y +CONFIG_MTD_M25P80=y +CONFIG_MTD_SST25L=y CONFIG_MTD=y CONFIG_NAND=y +CONFIG_NAND_ATMEL=y CONFIG_UBI=y +CONFIG_DISK_ATA=y +CONFIG_USB=y +CONFIG_USB_OHCI=y +CONFIG_USB_OHCI_AT91=y +CONFIG_USB_STORAGE=y +CONFIG_MCI=y +CONFIG_MCI_ATMEL=y +CONFIG_EEPROM_AT25=y +CONFIG_FS_FAT=y +CONFIG_FS_FAT_WRITE=y +CONFIG_FS_FAT_LFN=y diff --git a/arch/arm/configs/tqma53_defconfig b/arch/arm/configs/tqma53_defconfig index 5d9573d80c..a126f30307 100644 --- a/arch/arm/configs/tqma53_defconfig +++ b/arch/arm/configs/tqma53_defconfig @@ -16,7 +16,7 @@ CONFIG_HUSH_FANCY_PROMPT=y CONFIG_CMDLINE_EDITING=y CONFIG_AUTO_COMPLETE=y CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y -CONFIG_DEFAULT_ENVIRONMENT_PATH="defaultenv arch/arm/boards/tqma53/env/" +CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/tqma53/env/" CONFIG_DEBUG_INFO=y CONFIG_CMD_EDIT=y CONFIG_CMD_SLEEP=y diff --git a/arch/arm/lib/barebox.lds.S b/arch/arm/lib/barebox.lds.S index bc20694945..3fd271b09f 100644 --- a/arch/arm/lib/barebox.lds.S +++ b/arch/arm/lib/barebox.lds.S @@ -105,5 +105,5 @@ SECTIONS .bss : { *(.bss*) } __bss_stop = .; _end = .; - _barebox_image_size = __bss_start - _text; + _barebox_image_size = __bss_start - TEXT_BASE; } diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index d2bb7bc8af..989d3d82e4 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -13,6 +13,7 @@ config BOARDINFO default "Atmel at91sam9g10-ek" if MACH_AT91SAM9G10EK default "Atmel at91sam9g20-ek" if MACH_AT91SAM9G20EK default "Atmel at91sam9m10g45-ek" if MACH_AT91SAM9M10G45EK + default "Atmel at91sam9x5-ek" if MACH_AT91SAM9X5EK default "Bucyrus MMC-CPU" if MACH_MMCCPU default "Calao USB-A9260" if MACH_USB_A9260 default "Calao USB-A9263" if MACH_USB_A9263 @@ -81,6 +82,12 @@ config ARCH_AT91SAM9G45 select HAS_MACB select AT91SAM9G45_RESET +config ARCH_AT91SAM9X5 + bool "AT91SAM9X5" + select CPU_ARM926T + select HAS_MACB + select AT91SAM9G45_RESET + endchoice config ARCH_BAREBOX_MAX_BARE_INIT_SIZE @@ -91,6 +98,7 @@ config ARCH_BAREBOX_MAX_BARE_INIT_SIZE default 0x4000 if ARCH_AT91SAM9G20 default 0x3000 if ARCH_AT91SAM9G10 default 0xF000 if ARCH_AT91SAM9G45 + default 0x6000 if ARCH_AT91SAM9X5 default 0xffffffff config SUPPORT_CALAO_DAB_MMX @@ -294,6 +302,23 @@ endif # ---------------------------------------------------------- +if ARCH_AT91SAM9X5 + +choice + prompt "AT91SAM9x5 Series Board Type" + +config MACH_AT91SAM9X5EK + bool "Atmel AT91SAM9x5 Series Evaluation Kit" + help + Select this if you re using Atmel's AT91SAM9x5-EK Evaluation Kit. + Supported chips are sam9g15, sam9g25, sam9x25, sam9g35 and sam9x35. + +endchoice + +endif + +# ---------------------------------------------------------- + comment "AT91 Board Options" config MTD_NAND_ATMEL_BUSWIDTH_16 diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index 219f75c506..491c45446c 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -15,3 +15,4 @@ obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_d obj-$(CONFIG_ARCH_AT91SAM9G10) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o +obj-$(CONFIG_ARCH_AT91SAM9X5) += at91sam9x5.o at91sam926x_time.o at91sam9x5_devices.o sam9_smc.o diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c index bda73e6048..c380c7d8cf 100644 --- a/arch/arm/mach-at91/at91rm9200_devices.c +++ b/arch/arm/mach-at91/at91rm9200_devices.c @@ -72,7 +72,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {} * -------------------------------------------------------------------- */ #if defined(CONFIG_DRIVER_NET_AT91_ETHER) -void __init at91_add_device_eth(struct at91_ether_platform_data *data) +void __init at91_add_device_eth(int id, struct at91_ether_platform_data *data) { if (!data) return; @@ -104,7 +104,7 @@ void __init at91_add_device_eth(struct at91_ether_platform_data *data) IORESOURCE_MEM, data); } #else -void __init at91_add_device_eth(struct at91_ether_platform_data *data) {} +void __init at91_add_device_eth(int id, struct at91_ether_platform_data *data) {} #endif /* -------------------------------------------------------------------- diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c index 3bdcd4f408..23da8c1bbf 100644 --- a/arch/arm/mach-at91/at91sam9260_devices.c +++ b/arch/arm/mach-at91/at91sam9260_devices.c @@ -67,7 +67,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {} #endif #if defined(CONFIG_DRIVER_NET_MACB) -void at91_add_device_eth(struct at91_ether_platform_data *data) +void at91_add_device_eth(int id, struct at91_ether_platform_data *data) { if (!data) return; @@ -104,7 +104,7 @@ void at91_add_device_eth(struct at91_ether_platform_data *data) IORESOURCE_MEM, data); } #else -void at91_add_device_eth(struct at91_ether_platform_data *data) {} +void at91_add_device_eth(int id, struct at91_ether_platform_data *data) {} #endif #if defined(CONFIG_NAND_ATMEL) diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c index 87a1726d39..12d6a24a24 100644 --- a/arch/arm/mach-at91/at91sam9263_devices.c +++ b/arch/arm/mach-at91/at91sam9263_devices.c @@ -75,7 +75,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {} #endif #if defined(CONFIG_DRIVER_NET_MACB) -void at91_add_device_eth(struct at91_ether_platform_data *data) +void at91_add_device_eth(int id, struct at91_ether_platform_data *data) { if (!data) return; @@ -106,7 +106,7 @@ void at91_add_device_eth(struct at91_ether_platform_data *data) IORESOURCE_MEM, data); } #else -void at91_add_device_eth(struct at91_ether_platform_data *data) {} +void at91_add_device_eth(int id, struct at91_ether_platform_data *data) {} #endif #if defined(CONFIG_NAND_ATMEL) diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c index 6931a3f652..05b197c2c2 100644 --- a/arch/arm/mach-at91/at91sam9g45_devices.c +++ b/arch/arm/mach-at91/at91sam9g45_devices.c @@ -54,7 +54,7 @@ void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data) {} #endif #if defined(CONFIG_DRIVER_NET_MACB) -void at91_add_device_eth(struct at91_ether_platform_data *data) +void at91_add_device_eth(int id, struct at91_ether_platform_data *data) { if (!data) return; @@ -86,7 +86,7 @@ void at91_add_device_eth(struct at91_ether_platform_data *data) IORESOURCE_MEM, data); } #else -void at91_add_device_eth(struct at91_ether_platform_data *data) {} +void at91_add_device_eth(int id, struct at91_ether_platform_data *data) {} #endif #if defined(CONFIG_NAND_ATMEL) diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c new file mode 100644 index 0000000000..c256989780 --- /dev/null +++ b/arch/arm/mach-at91/at91sam9x5.c @@ -0,0 +1,314 @@ +#include <common.h> +#include <gpio.h> +#include <init.h> +#include <asm/hardware.h> +#include <mach/at91_pmc.h> +#include <mach/io.h> +#include <mach/cpu.h> + +#include "generic.h" +#include "clock.h" + +/* -------------------------------------------------------------------- + * Clocks + * -------------------------------------------------------------------- */ + +/* + * The peripheral clocks. + */ +static struct clk pioAB_clk = { + .name = "pioAB_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_PIOAB, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk pioCD_clk = { + .name = "pioCD_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_PIOCD, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk smd_clk = { + .name = "smd_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_SMD, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk usart0_clk = { + .name = "usart0_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_USART0, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk usart1_clk = { + .name = "usart1_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_USART1, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk usart2_clk = { + .name = "usart2_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_USART2, + .type = CLK_TYPE_PERIPHERAL, +}; +/* USART3 clock - Only for sam9g25/sam9x25 */ +static struct clk usart3_clk = { + .name = "usart3_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_USART3, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk twi0_clk = { + .name = "twi0_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_TWI0, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk twi1_clk = { + .name = "twi1_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_TWI1, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk twi2_clk = { + .name = "twi2_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_TWI2, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk mmc0_clk = { + .name = "mci0_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_MCI0, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk spi0_clk = { + .name = "spi0_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_SPI0, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk spi1_clk = { + .name = "spi1_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_SPI1, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk uart0_clk = { + .name = "uart0_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_UART0, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk uart1_clk = { + .name = "uart1_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_UART1, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk tcb0_clk = { + .name = "tcb0_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_TCB, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk pwm_clk = { + .name = "pwm_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_PWM, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk adc_clk = { + .name = "adc_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_ADC, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk dma0_clk = { + .name = "dma0_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_DMA0, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk dma1_clk = { + .name = "dma1_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_DMA1, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk uhphs_clk = { + .name = "uhphs", + .pmc_mask = 1 << AT91SAM9X5_ID_UHPHS, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk udphs_clk = { + .name = "udphs_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_UDPHS, + .type = CLK_TYPE_PERIPHERAL, +}; +/* emac0 clock - Only for sam9g25/sam9x25/sam9g35/sam9x35 */ +static struct clk macb0_clk = { + .name = "macb0_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_EMAC0, + .type = CLK_TYPE_PERIPHERAL, +}; +/* lcd clock - Only for sam9g15/sam9g35/sam9x35 */ +static struct clk lcdc_clk = { + .name = "lcdc_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_LCDC, + .type = CLK_TYPE_PERIPHERAL, +}; +/* isi clock - Only for sam9g25 */ +static struct clk isi_clk = { + .name = "isi_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_ISI, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk mmc1_clk = { + .name = "mci1_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_MCI1, + .type = CLK_TYPE_PERIPHERAL, +}; +/* emac1 clock - Only for sam9x25 */ +static struct clk macb1_clk = { + .name = "macb1_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_EMAC1, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk ssc_clk = { + .name = "ssc_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_SSC, + .type = CLK_TYPE_PERIPHERAL, +}; +/* can0 clock - Only for sam9x35 */ +static struct clk can0_clk = { + .name = "can0_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_CAN0, + .type = CLK_TYPE_PERIPHERAL, +}; +/* can1 clock - Only for sam9x35 */ +static struct clk can1_clk = { + .name = "can1_clk", + .pmc_mask = 1 << AT91SAM9X5_ID_CAN1, + .type = CLK_TYPE_PERIPHERAL, +}; + +static struct clk *periph_clocks[] __initdata = { + &pioAB_clk, + &pioCD_clk, + &smd_clk, + &usart0_clk, + &usart1_clk, + &usart2_clk, + &twi0_clk, + &twi1_clk, + &twi2_clk, + &mmc0_clk, + &spi0_clk, + &spi1_clk, + &uart0_clk, + &uart1_clk, + &tcb0_clk, + &pwm_clk, + &adc_clk, + &dma0_clk, + &dma1_clk, + &uhphs_clk, + &udphs_clk, + &mmc1_clk, + &ssc_clk, + // irq0 +}; + +static struct clk_lookup periph_clocks_lookups[] = { + CLKDEV_CON_DEV_ID("macb_clk", "macb0", &macb0_clk), + CLKDEV_CON_DEV_ID("macb_clk", "macb1", &macb1_clk), + CLKDEV_CON_ID("ohci_clk", &uhphs_clk), +}; + +static struct clk_lookup usart_clocks_lookups[] = { + CLKDEV_CON_DEV_ID("usart", "atmel_usart0", &mck), + CLKDEV_CON_DEV_ID("usart", "atmel_usart1", &usart0_clk), + CLKDEV_CON_DEV_ID("usart", "atmel_usart2", &usart1_clk), + CLKDEV_CON_DEV_ID("usart", "atmel_usart3", &usart2_clk), + CLKDEV_CON_DEV_ID("usart", "atmel_usart4", &usart3_clk), +}; + +/* + * The two programmable clocks. + * You must configure pin multiplexing to bring these signals out. + */ +static struct clk pck0 = { + .name = "pck0", + .pmc_mask = AT91_PMC_PCK0, + .type = CLK_TYPE_PROGRAMMABLE, + .id = 0, +}; +static struct clk pck1 = { + .name = "pck1", + .pmc_mask = AT91_PMC_PCK1, + .type = CLK_TYPE_PROGRAMMABLE, + .id = 1, +}; + +static void __init at91sam9x5_register_clocks(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(periph_clocks); i++) + clk_register(periph_clocks[i]); + + clkdev_add_table(periph_clocks_lookups, + ARRAY_SIZE(periph_clocks_lookups)); + clkdev_add_table(usart_clocks_lookups, + ARRAY_SIZE(usart_clocks_lookups)); + + if (cpu_is_at91sam9g25() + || cpu_is_at91sam9x25()) + clk_register(&usart3_clk); + + if (cpu_is_at91sam9g25() + || cpu_is_at91sam9x25() + || cpu_is_at91sam9g35() + || cpu_is_at91sam9x35()) + clk_register(&macb0_clk); + + if (cpu_is_at91sam9g15() + || cpu_is_at91sam9g35() + || cpu_is_at91sam9x35()) + clk_register(&lcdc_clk); + + if (cpu_is_at91sam9g25()) + clk_register(&isi_clk); + + if (cpu_is_at91sam9x25()) + clk_register(&macb1_clk); + + if (cpu_is_at91sam9x25() + || cpu_is_at91sam9x35()) { + clk_register(&can0_clk); + clk_register(&can1_clk); + } + + clk_register(&pck0); + clk_register(&pck1); +} + +/* -------------------------------------------------------------------- + * GPIO + * -------------------------------------------------------------------- */ + +static struct at91_gpio_bank at91sam9x5_gpio[] = { + { + .regbase = IOMEM(AT91_BASE_PIOA), + .clock = &pioAB_clk, + }, { + .regbase = IOMEM(AT91_BASE_PIOB), + .clock = &pioAB_clk, + }, { + .regbase = IOMEM(AT91_BASE_PIOC), + .clock = &pioCD_clk, + }, { + .regbase = IOMEM(AT91_BASE_PIOD), + .clock = &pioCD_clk, + } +}; + +/* -------------------------------------------------------------------- + * AT91SAM9x5 processor initialization + * -------------------------------------------------------------------- */ + +static int at91sam9x5_initialize(void) +{ + /* Init clock subsystem */ + at91_clock_init(AT91_MAIN_CLOCK); + + /* Register the processor-specific clocks */ + at91sam9x5_register_clocks(); + + /* Register GPIO subsystem */ + at91_gpio_init(at91sam9x5_gpio, 4); + return 0; +} +core_initcall(at91sam9x5_initialize); diff --git a/arch/arm/mach-at91/at91sam9x5_devices.c b/arch/arm/mach-at91/at91sam9x5_devices.c new file mode 100644 index 0000000000..76f67b0c39 --- /dev/null +++ b/arch/arm/mach-at91/at91sam9x5_devices.c @@ -0,0 +1,270 @@ +/* + * On-Chip devices setup code for the AT91SAM9x5 family + * + * Copyright (C) 2010 Atmel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + */ +#include <common.h> +#include <sizes.h> +#include <asm/armlinux.h> +#include <asm/hardware.h> +#include <mach/board.h> +#include <mach/at91_pmc.h> +#include <mach/at91sam9x5_matrix.h> +#include <mach/gpio.h> +#include <mach/io.h> +#include <mach/cpu.h> + +#include "generic.h" + +void at91_add_device_sdram(u32 size) +{ + arm_add_mem_device("ram0", AT91_CHIPSELECT_1, size); + add_mem_device("sram0", AT91SAM9X5_SRAM_BASE, + AT91SAM9X5_SRAM_SIZE, IORESOURCE_MEM_WRITEABLE); +} + +/* -------------------------------------------------------------------- + * USB Host (OHCI) + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_USB_OHCI) +void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data) +{ + int i; + + if (!data) + return; + + /* Enable VBus control for UHP ports */ + for (i = 0; i < data->ports; i++) { + if (data->vbus_pin[i]) + at91_set_gpio_output(data->vbus_pin[i], 0); + } + + add_generic_device("at91_ohci", -1, NULL, AT91SAM9X5_OHCI_BASE, SZ_1M, + IORESOURCE_MEM, data); +} +#else +void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data) {} +#endif + +#if defined(CONFIG_DRIVER_NET_MACB) +void at91_add_device_eth(int id, struct at91_ether_platform_data *data) +{ + resource_size_t start; + + if (!data) + return; + + if (cpu_is_at91sam9g15()) + return; + + if (id && !cpu_is_at91sam9x25()) + return; + + switch (id) { + case 0: + start = AT91SAM9X5_BASE_EMAC0; + /* Pins used for MII and RMII */ + at91_set_A_periph(AT91_PIN_PB4, 0); /* ETXCK_EREFCK */ + at91_set_A_periph(AT91_PIN_PB3, 0); /* ERXDV */ + at91_set_A_periph(AT91_PIN_PB0, 0); /* ERX0 */ + at91_set_A_periph(AT91_PIN_PB1, 0); /* ERX1 */ + at91_set_A_periph(AT91_PIN_PB2, 0); /* ERXER */ + at91_set_A_periph(AT91_PIN_PB7, 0); /* ETXEN */ + at91_set_A_periph(AT91_PIN_PB9, 0); /* ETX0 */ + at91_set_A_periph(AT91_PIN_PB10, 0); /* ETX1 */ + at91_set_A_periph(AT91_PIN_PB5, 0); /* EMDIO */ + at91_set_A_periph(AT91_PIN_PB6, 0); /* EMDC */ + + if (!(data->flags & AT91SAM_ETHER_RMII)) { + at91_set_A_periph(AT91_PIN_PB16, 0); /* ECRS */ + at91_set_A_periph(AT91_PIN_PB17, 0); /* ECOL */ + at91_set_A_periph(AT91_PIN_PB13, 0); /* ERX2 */ + at91_set_A_periph(AT91_PIN_PB14, 0); /* ERX3 */ + at91_set_A_periph(AT91_PIN_PB15, 0); /* ERXCK */ + at91_set_A_periph(AT91_PIN_PB11, 0); /* ETX2 */ + at91_set_A_periph(AT91_PIN_PB12, 0); /* ETX3 */ + at91_set_A_periph(AT91_PIN_PB8, 0); /* ETXER */ + } + break; + case 1: + start = AT91SAM9X5_BASE_EMAC1; + if (!(data->flags & AT91SAM_ETHER_RMII)) + pr_warn("AT91: Only RMII available on interface macb%d.\n", id); + + /* Pins used for RMII */ + at91_set_B_periph(AT91_PIN_PC29, 0); /* ETXCK_EREFCK */ + at91_set_B_periph(AT91_PIN_PC28, 0); /* ECRSDV */ + at91_set_B_periph(AT91_PIN_PC20, 0); /* ERX0 */ + at91_set_B_periph(AT91_PIN_PC21, 0); /* ERX1 */ + at91_set_B_periph(AT91_PIN_PC16, 0); /* ERXER */ + at91_set_B_periph(AT91_PIN_PC27, 0); /* ETXEN */ + at91_set_B_periph(AT91_PIN_PC18, 0); /* ETX0 */ + at91_set_B_periph(AT91_PIN_PC19, 0); /* ETX1 */ + at91_set_B_periph(AT91_PIN_PC31, 0); /* EMDIO */ + at91_set_B_periph(AT91_PIN_PC30, 0); /* EMDC */ + break; + default: + return; + } + + add_generic_device("macb", id, NULL, start, SZ_16K, + IORESOURCE_MEM, data); +} +#else +void at91_add_device_eth(int id, struct at91_ether_platform_data *data) {} +#endif + +/* -------------------------------------------------------------------- + * NAND / SmartMedia + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_NAND_ATMEL) +static struct resource nand_resources[] = { + [0] = { + .start = AT91_CHIPSELECT_3, + .size = SZ_256M, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91_BASE_SYS + AT91_PMECC, + .size = 512, + .flags = IORESOURCE_MEM, + } +}; + +void __init at91_add_device_nand(struct atmel_nand_data *data) +{ + unsigned long csa; + + if (!data) + return; + + csa = at91_sys_read(AT91_MATRIX_EBICSA); + at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_NANDFLASH); + + /* enable pin */ + if (data->enable_pin) + at91_set_gpio_output(data->enable_pin, 1); + + /* ready/busy pin */ + if (data->rdy_pin) + at91_set_gpio_input(data->rdy_pin, 1); + + /* card detect pin */ + if (data->det_pin) + at91_set_gpio_input(data->det_pin, 1); + + add_generic_device_res("atmel_nand", 0, nand_resources, + ARRAY_SIZE(nand_resources), data); +} +#else +void __init at91_add_device_nand(struct atmel_nand_data *data) {} +#endif + +/* -------------------------------------------------------------------- + * UART + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_DRIVER_SERIAL_ATMEL) +static inline void configure_dbgu_pins(void) +{ + at91_set_A_periph(AT91_PIN_PA9, 0); /* DRXD */ + at91_set_A_periph(AT91_PIN_PA10, 1); /* DTXD */ +} + +static inline void configure_usart0_pins(unsigned pins) +{ + at91_set_A_periph(AT91_PIN_PA0, 1); /* TXD0 */ + at91_set_A_periph(AT91_PIN_PA1, 0); /* RXD0 */ + + if (pins & ATMEL_UART_RTS) + at91_set_A_periph(AT91_PIN_PA2, 0); /* RTS0 */ + if (pins & ATMEL_UART_CTS) + at91_set_A_periph(AT91_PIN_PA3, 0); /* CTS0 */ +} + +static inline void configure_usart1_pins(unsigned pins) +{ + at91_set_A_periph(AT91_PIN_PA5, 1); /* TXD1 */ + at91_set_A_periph(AT91_PIN_PA6, 0); /* RXD1 */ + + if (pins & ATMEL_UART_RTS) + at91_set_C_periph(AT91_PIN_PC27, 0); /* RTS1 */ + if (pins & ATMEL_UART_CTS) + at91_set_C_periph(AT91_PIN_PC28, 0); /* CTS1 */ +} + +static inline void configure_usart2_pins(unsigned pins) +{ + at91_set_A_periph(AT91_PIN_PA7, 1); /* TXD2 */ + at91_set_A_periph(AT91_PIN_PA8, 0); /* RXD2 */ + + if (pins & ATMEL_UART_RTS) + at91_set_B_periph(AT91_PIN_PB0, 0); /* RTS2 */ + if (pins & ATMEL_UART_CTS) + at91_set_B_periph(AT91_PIN_PB1, 0); /* CTS2 */ +} + +static inline void configure_usart3_pins(unsigned pins) +{ + at91_set_B_periph(AT91_PIN_PC22, 1); /* TXD3 */ + at91_set_B_periph(AT91_PIN_PC23, 0); /* RXD3 */ + + if (pins & ATMEL_UART_RTS) + at91_set_B_periph(AT91_PIN_PC24, 0); /* RTS3 */ + if (pins & ATMEL_UART_CTS) + at91_set_B_periph(AT91_PIN_PC25, 0); /* CTS3 */ +} + +struct device_d * __init at91_register_uart(unsigned id, unsigned pins) +{ + resource_size_t start; + resource_size_t size = SZ_16K; + + switch (id) { + case 0: /* DBGU */ + configure_dbgu_pins(); + size = 512; + start = AT91_BASE_SYS + AT91_DBGU; + break; + case AT91SAM9X5_ID_USART0: + configure_usart0_pins(pins); + start = AT91SAM9X5_BASE_USART0; + id = 1; + break; + case AT91SAM9X5_ID_USART1: + configure_usart1_pins(pins); + start = AT91SAM9X5_BASE_USART1; + id = 2; + break; + case AT91SAM9X5_ID_USART2: + configure_usart2_pins(pins); + start = AT91SAM9X5_BASE_USART2; + id = 3; + break; + case AT91SAM9X5_ID_USART3: + configure_usart3_pins(pins); + start = AT91SAM9X5_BASE_USART3; + id = 4; + break; + default: + return NULL; + } + + return add_generic_device("atmel_usart", id, NULL, start, size, + IORESOURCE_MEM, NULL); +} +#else +struct device_d * __init at91_register_uart(unsigned id, unsigned pins) +{ + return NULL; +} +#endif diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c index 0406382daf..bda02fd31f 100644 --- a/arch/arm/mach-at91/clock.c +++ b/arch/arm/mach-at91/clock.c @@ -40,26 +40,38 @@ /* * Chips have some kind of clocks : group them by functionality */ -#define cpu_has_utmi() ( cpu_is_at91cap9() \ - || cpu_is_at91sam9rl() \ - || cpu_is_at91sam9g45()) +#define cpu_has_utmi() ( cpu_is_at91sam9rl() \ + || cpu_is_at91sam9g45() \ + || cpu_is_at91sam9x5()) #define cpu_has_800M_plla() ( cpu_is_at91sam9g20() \ - || cpu_is_at91sam9g45()) + || cpu_is_at91sam9g45() \ + || cpu_is_at91sam9x5()) #define cpu_has_300M_plla() (cpu_is_at91sam9g10()) #define cpu_has_pllb() (!(cpu_is_at91sam9rl() \ - || cpu_is_at91sam9g45())) + || cpu_is_at91sam9g45() \ + || cpu_is_at91sam9x5())) -#define cpu_has_upll() (cpu_is_at91sam9g45()) +#define cpu_has_upll() (cpu_is_at91sam9g45() \ + || cpu_is_at91sam9x5()) /* USB host HS & FS */ #define cpu_has_uhp() (!cpu_is_at91sam9rl()) /* USB device FS only */ #define cpu_has_udpfs() (!(cpu_is_at91sam9rl() \ - || cpu_is_at91sam9g45())) + || cpu_is_at91sam9g45() \ + || cpu_is_at91sam9x5())) + +#define cpu_has_plladiv2() (cpu_is_at91sam9g45() \ + || cpu_is_at91sam9x5()) + +#define cpu_has_mdiv3() (cpu_is_at91sam9g45() \ + || cpu_is_at91sam9x5()) + +#define cpu_has_alt_prescaler() (cpu_is_at91sam9x5()) static LIST_HEAD(clocks); @@ -202,11 +214,24 @@ static struct clk *at91_css_to_clk(unsigned long css) return &utmi_clk; else if (cpu_has_pllb()) return &pllb; + break; + /* alternate PMC: can use master clock */ + case AT91_PMC_CSS_MASTER: + return &mck; } return NULL; } +static int pmc_prescaler_divider(u32 reg) +{ + if (cpu_has_alt_prescaler()) { + return 1 << ((reg & AT91_PMC_ALT_PRES) >> PMC_ALT_PRES_OFFSET); + } else { + return 1 << ((reg & AT91_PMC_PRES) >> PMC_PRES_OFFSET); + } +} + static void __clk_enable(struct clk *clk) { if (clk->parent) @@ -295,6 +320,7 @@ int clk_set_rate(struct clk *clk, unsigned long rate) { unsigned long flags; unsigned prescale; + unsigned long prescale_offset, css_mask; unsigned long actual; if (!clk_is_programmable(clk)) @@ -302,14 +328,22 @@ int clk_set_rate(struct clk *clk, unsigned long rate) if (clk->users) return -EBUSY; + if (cpu_has_alt_prescaler()) { + prescale_offset = PMC_ALT_PRES_OFFSET; + css_mask = AT91_PMC_ALT_PCKR_CSS; + } else { + prescale_offset = PMC_PRES_OFFSET; + css_mask = AT91_PMC_CSS; + } + actual = clk->parent->rate_hz; for (prescale = 0; prescale < 7; prescale++) { if (actual && actual <= rate) { u32 pckr; pckr = at91_sys_read(AT91_PMC_PCKR(clk->id)); - pckr &= AT91_PMC_CSS; /* clock selection */ - pckr |= prescale << 2; + pckr &= css_mask; /* keep clock selection */ + pckr |= prescale << prescale_offset; at91_sys_write(AT91_PMC_PCKR(clk->id), pckr); clk->rate_hz = actual; break; @@ -352,11 +386,17 @@ static void init_programmable_clock(struct clk *clk) { struct clk *parent; u32 pckr; + unsigned int css_mask; + + if (cpu_has_alt_prescaler()) + css_mask = AT91_PMC_ALT_PCKR_CSS; + else + css_mask = AT91_PMC_CSS; pckr = at91_sys_read(AT91_PMC_PCKR(clk->id)); - parent = at91_css_to_clk(pckr & AT91_PMC_CSS); + parent = at91_css_to_clk(pckr & css_mask); clk->parent = parent; - clk->rate_hz = parent->rate_hz / (1 << ((pckr & AT91_PMC_PRES) >> 2)); + clk->rate_hz = parent->rate_hz / pmc_prescaler_divider(pckr); } #endif /* CONFIG_AT91_PROGRAMMABLE_CLOCKS */ @@ -502,11 +542,9 @@ static void at91_pllb_usbfs_clock_init(unsigned long main_clock) at91_sys_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP); } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || cpu_is_at91sam9263() || cpu_is_at91sam9g20() || - cpu_is_at91sam9g10() || cpu_is_at572d940hf()) { + cpu_is_at91sam9g10()) { uhpck.pmc_mask = AT91SAM926x_PMC_UHP; udpck.pmc_mask = AT91SAM926x_PMC_UDP; - } else if (cpu_is_at91cap9()) { - uhpck.pmc_mask = AT91CAP9_PMC_UHP; } at91_sys_write(AT91_CKGR_PLLBR, 0); @@ -569,7 +607,7 @@ int at91_clock_init(unsigned long main_clock) pll_overclock = 1; } - if (cpu_is_at91sam9g45()) { + if (cpu_has_plladiv2()) { mckr = at91_sys_read(AT91_PMC_MCKR); plla.rate_hz /= (1 << ((mckr & AT91_PMC_PLLADIV2) >> 12)); /* plla divisor by 2 */ } @@ -590,6 +628,10 @@ int at91_clock_init(unsigned long main_clock) * (obtain the USB High Speed 480 MHz when input is 12 MHz) */ utmi_clk.rate_hz = 40 * utmi_clk.parent->rate_hz; + + /* UTMI bias and PLL are managed at the same time */ + if (cpu_has_upll()) + utmi_clk.pmc_mask |= AT91_PMC_BIASEN; } /* @@ -608,7 +650,7 @@ int at91_clock_init(unsigned long main_clock) mckr = at91_sys_read(AT91_PMC_MCKR); mck.parent = at91_css_to_clk(mckr & AT91_PMC_CSS); freq = mck.parent->rate_hz; - freq /= (1 << ((mckr & AT91_PMC_PRES) >> 2)); /* prescale */ + freq /= pmc_prescaler_divider(mckr); /* prescale */ if (cpu_is_at91rm9200()) { mck.rate_hz = freq / (1 + ((mckr & AT91_PMC_MDIV) >> 8)); /* mdiv */ } else if (cpu_is_at91sam9g20()) { @@ -616,13 +658,19 @@ int at91_clock_init(unsigned long main_clock) freq / ((mckr & AT91_PMC_MDIV) >> 7) : freq; /* mdiv ; (x >> 7) = ((x >> 8) * 2) */ if (mckr & AT91_PMC_PDIV) freq /= 2; /* processor clock division */ - } else if (cpu_is_at91sam9g45()) { + } else if (cpu_has_mdiv3()) { mck.rate_hz = (mckr & AT91_PMC_MDIV) == AT91SAM9_PMC_MDIV_3 ? freq / 3 : freq / (1 << ((mckr & AT91_PMC_MDIV) >> 8)); /* mdiv */ } else { mck.rate_hz = freq / (1 << ((mckr & AT91_PMC_MDIV) >> 8)); /* mdiv */ } + if (cpu_has_alt_prescaler()) { + /* Programmable clocks can use MCK */ + mck.type |= CLK_TYPE_PRIMARY; + mck.id = 4; + } + cpu_freq = freq; /* Register the PMC's standard clocks */ diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c index 06da5af2f8..ef2d20e650 100644 --- a/arch/arm/mach-at91/gpio.c +++ b/arch/arm/mach-at91/gpio.c @@ -26,11 +26,20 @@ #include <errno.h> #include <io.h> #include <mach/gpio.h> +#include <mach/io.h> +#include <mach/cpu.h> #include <gpio.h> static int gpio_banks; +static int cpu_has_pio3; static struct at91_gpio_bank *gpio; +/* + * Functionnality can change with newer chips + */ + + + static inline void __iomem *pin_to_controller(unsigned pin) { pin -= PIN_BASE; @@ -77,7 +86,14 @@ int at91_set_A_periph(unsigned pin, int use_pullup) __raw_writel(mask, pio + PIO_IDR); __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR)); - __raw_writel(mask, pio + PIO_ASR); + if (cpu_has_pio3) { + __raw_writel(__raw_readl(pio + PIO_ABCDSR1) & ~mask, + pio + PIO_ABCDSR1); + __raw_writel(__raw_readl(pio + PIO_ABCDSR2) & ~mask, + pio + PIO_ABCDSR2); + } else { + __raw_writel(mask, pio + PIO_ASR); + } __raw_writel(mask, pio + PIO_PDR); return 0; } @@ -96,13 +112,60 @@ int at91_set_B_periph(unsigned pin, int use_pullup) __raw_writel(mask, pio + PIO_IDR); __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR)); - __raw_writel(mask, pio + PIO_BSR); + if (cpu_has_pio3) { + __raw_writel(__raw_readl(pio + PIO_ABCDSR1) | mask, + pio + PIO_ABCDSR1); + __raw_writel(__raw_readl(pio + PIO_ABCDSR2) & ~mask, + pio + PIO_ABCDSR2); + } else { + __raw_writel(mask, pio + PIO_BSR); + } __raw_writel(mask, pio + PIO_PDR); return 0; } EXPORT_SYMBOL(at91_set_B_periph); /* + * mux the pin to the "C" internal peripheral role. + */ +int at91_set_C_periph(unsigned pin, int use_pullup) +{ + void __iomem *pio = pin_to_controller(pin); + unsigned mask = pin_to_mask(pin); + + if (!pio || !cpu_has_pio3) + return -EINVAL; + + __raw_writel(mask, pio + PIO_IDR); + __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR)); + __raw_writel(__raw_readl(pio + PIO_ABCDSR1) & ~mask, pio + PIO_ABCDSR1); + __raw_writel(__raw_readl(pio + PIO_ABCDSR2) | mask, pio + PIO_ABCDSR2); + __raw_writel(mask, pio + PIO_PDR); + return 0; +} +EXPORT_SYMBOL(at91_set_C_periph); + +/* + * mux the pin to the "C" internal peripheral role. + */ +int at91_set_D_periph(unsigned pin, int use_pullup) +{ + void __iomem *pio = pin_to_controller(pin); + unsigned mask = pin_to_mask(pin); + + if (!pio || !cpu_has_pio3) + return -EINVAL; + + __raw_writel(mask, pio + PIO_IDR); + __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR)); + __raw_writel(__raw_readl(pio + PIO_ABCDSR1) | mask, pio + PIO_ABCDSR1); + __raw_writel(__raw_readl(pio + PIO_ABCDSR2) | mask, pio + PIO_ABCDSR2); + __raw_writel(mask, pio + PIO_PDR); + return 0; +} +EXPORT_SYMBOL(at91_set_D_periph); + +/* * mux the pin to the gpio controller (instead of "A" or "B" peripheral), and * configure it for an input. */ @@ -153,12 +216,37 @@ int at91_set_deglitch(unsigned pin, int is_on) if (!pio) return -EINVAL; + + if (cpu_has_pio3 && is_on) + __raw_writel(mask, pio + PIO_IFSCDR); __raw_writel(mask, pio + (is_on ? PIO_IFER : PIO_IFDR)); return 0; } EXPORT_SYMBOL(at91_set_deglitch); /* + * enable/disable the debounce filter; + */ +int at91_set_debounce(unsigned pin, int is_on, int div) +{ + void __iomem *pio = pin_to_controller(pin); + unsigned mask = pin_to_mask(pin); + + if (!pio || !cpu_has_pio3) + return -EINVAL; + + if (is_on) { + __raw_writel(mask, pio + PIO_IFSCER); + __raw_writel(div & PIO_SCDR_DIV, pio + PIO_SCDR); + __raw_writel(mask, pio + PIO_IFER); + } else { + __raw_writel(mask, pio + PIO_IFDR); + } + return 0; +} +EXPORT_SYMBOL(at91_set_debounce); + +/* * enable/disable the multi-driver; This is only valid for output and * allows the output pin to run as an open collector output. */ @@ -176,6 +264,41 @@ int at91_set_multi_drive(unsigned pin, int is_on) EXPORT_SYMBOL(at91_set_multi_drive); /* + * enable/disable the pull-down. + * If pull-up already enabled while calling the function, we disable it. + */ +int at91_set_pulldown(unsigned pin, int is_on) +{ + void __iomem *pio = pin_to_controller(pin); + unsigned mask = pin_to_mask(pin); + + if (!pio || !cpu_has_pio3) + return -EINVAL; + + /* Disable pull-up anyway */ + __raw_writel(mask, pio + PIO_PUDR); + __raw_writel(mask, pio + (is_on ? PIO_PPDER : PIO_PPDDR)); + return 0; +} +EXPORT_SYMBOL(at91_set_pulldown); + +/* + * disable Schmitt trigger + */ +int at91_disable_schmitt_trig(unsigned pin) +{ + void __iomem *pio = pin_to_controller(pin); + unsigned mask = pin_to_mask(pin); + + if (!pio || !cpu_has_pio3) + return -EINVAL; + + __raw_writel(__raw_readl(pio + PIO_SCHMITT) | mask, pio + PIO_SCHMITT); + return 0; +} +EXPORT_SYMBOL(at91_disable_schmitt_trig); + +/* * assuming the pin is muxed as a gpio output, set its value. */ int at91_set_gpio_value(unsigned pin, int value) @@ -245,5 +368,7 @@ int at91_gpio_init(struct at91_gpio_bank *data, int nr_banks) clk_enable(data->clock); } + cpu_has_pio3 = cpu_is_at91sam9x5(); + return 0; } diff --git a/arch/arm/mach-at91/include/mach/at91_pio.h b/arch/arm/mach-at91/include/mach/at91_pio.h index f6ce1f924e..2d80dfc3c9 100644 --- a/arch/arm/mach-at91/include/mach/at91_pio.h +++ b/arch/arm/mach-at91/include/mach/at91_pio.h @@ -40,10 +40,35 @@ #define PIO_PUER 0x64 /* Pull-up Enable Register */ #define PIO_PUSR 0x68 /* Pull-up Status Register */ #define PIO_ASR 0x70 /* Peripheral A Select Register */ +#define PIO_ABCDSR1 0x70 /* Peripheral ABCD Select Register 1 [some sam9 only] */ #define PIO_BSR 0x74 /* Peripheral B Select Register */ +#define PIO_ABCDSR2 0x74 /* Peripheral ABCD Select Register 2 [some sam9 only] */ #define PIO_ABSR 0x78 /* AB Status Register */ +#define PIO_IFSCDR 0x80 /* Input Filter Slow Clock Disable Register */ +#define PIO_IFSCER 0x84 /* Input Filter Slow Clock Enable Register */ +#define PIO_IFSCSR 0x88 /* Input Filter Slow Clock Status Register */ +#define PIO_SCDR 0x8c /* Slow Clock Divider Debouncing Register */ +#define PIO_SCDR_DIV (0x3fff << 0) /* Slow Clock Divider Mask */ +#define PIO_PPDDR 0x90 /* Pad Pull-down Disable Register */ +#define PIO_PPDER 0x94 /* Pad Pull-down Enable Register */ +#define PIO_PPDSR 0x98 /* Pad Pull-down Status Register */ #define PIO_OWER 0xa0 /* Output Write Enable Register */ #define PIO_OWDR 0xa4 /* Output Write Disable Register */ #define PIO_OWSR 0xa8 /* Output Write Status Register */ +#define PIO_AIMER 0xb0 /* Additional Interrupt Modes Enable Register */ +#define PIO_AIMDR 0xb4 /* Additional Interrupt Modes Disable Register */ +#define PIO_AIMMR 0xb8 /* Additional Interrupt Modes Mask Register */ +#define PIO_ESR 0xc0 /* Edge Select Register */ +#define PIO_LSR 0xc4 /* Level Select Register */ +#define PIO_ELSR 0xc8 /* Edge/Level Status Register */ +#define PIO_FELLSR 0xd0 /* Falling Edge/Low Level Select Register */ +#define PIO_REHLSR 0xd4 /* Rising Edge/ High Level Select Register */ +#define PIO_FRLHSR 0xd8 /* Fall/Rise - Low/High Status Register */ +#define PIO_SCHMITT 0x100 /* Schmitt Trigger Register */ + +#define ABCDSR_PERIPH_A 0x0 +#define ABCDSR_PERIPH_B 0x1 +#define ABCDSR_PERIPH_C 0x2 +#define ABCDSR_PERIPH_D 0x3 #endif diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h index ed40b8bf6a..59037cf946 100644 --- a/arch/arm/mach-at91/include/mach/at91_pmc.h +++ b/arch/arm/mach-at91/include/mach/at91_pmc.h @@ -26,12 +26,12 @@ #define AT91CAP9_PMC_DDR (1 << 2) /* DDR Clock [CAP9 revC & some SAM9 only] */ #define AT91RM9200_PMC_UHP (1 << 4) /* USB Host Port Clock [AT91RM9200 only] */ #define AT91SAM926x_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91SAM926x only] */ -#define AT91CAP9_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91CAP9 only] */ #define AT91SAM926x_PMC_UDP (1 << 7) /* USB Devcice Port Clock [AT91SAM926x only] */ #define AT91_PMC_PCK0 (1 << 8) /* Programmable Clock 0 */ #define AT91_PMC_PCK1 (1 << 9) /* Programmable Clock 1 */ #define AT91_PMC_PCK2 (1 << 10) /* Programmable Clock 2 */ #define AT91_PMC_PCK3 (1 << 11) /* Programmable Clock 3 */ +#define AT91_PMC_PCK4 (1 << 12) /* Programmable Clock 4 [AT572D940HF only] */ #define AT91_PMC_HCK0 (1 << 16) /* AHB Clock (USB host) [AT91SAM9261 only] */ #define AT91_PMC_HCK1 (1 << 17) /* AHB Clock (LCD) [AT91SAM9261 only] */ @@ -46,9 +46,13 @@ #define AT91_PMC_BIASCOUNT (0xf << 28) /* UTMI BIAS Start-up Time */ #define AT91_CKGR_MOR (AT91_PMC + 0x20) /* Main Oscillator Register [not on SAM9RL] */ -#define AT91_PMC_MOSCEN (1 << 0) /* Main Oscillator Enable */ -#define AT91_PMC_OSCBYPASS (1 << 1) /* Oscillator Bypass [SAM9x, CAP9] */ -#define AT91_PMC_OSCOUNT (0xff << 8) /* Main Oscillator Start-up Time */ +#define AT91_PMC_MOSCEN (1 << 0) /* Main Oscillator Enable */ +#define AT91_PMC_OSCBYPASS (1 << 1) /* Oscillator Bypass */ +#define AT91_PMC_MOSCRCEN (1 << 3) /* Main On-Chip RC Oscillator Enable [some SAM9] */ +#define AT91_PMC_OSCOUNT (0xff << 8) /* Main Oscillator Start-up Time */ +#define AT91_PMC_KEY (0x37 << 16) /* MOR Writing Key */ +#define AT91_PMC_MOSCSEL (1 << 24) /* Main Oscillator Selection [some SAM9] */ +#define AT91_PMC_CFDEN (1 << 25) /* Clock Failure Detector Enable [some SAM9] */ #define AT91_CKGR_MCFR (AT91_PMC + 0x24) /* Main Clock Frequency Register */ #define AT91_PMC_MAINF (0xffff << 0) /* Main Clock Frequency */ @@ -74,20 +78,30 @@ #define AT91_PMC_CSS_PLLA (2 << 0) #define AT91_PMC_CSS_PLLB (3 << 0) #define AT91_PMC_CSS_UPLL (3 << 0) /* [some SAM9 only] */ -#define AT91_PMC_PRES (7 << 2) /* Master Clock Prescaler */ -#define AT91_PMC_PRES_1 (0 << 2) -#define AT91_PMC_PRES_2 (1 << 2) -#define AT91_PMC_PRES_4 (2 << 2) -#define AT91_PMC_PRES_8 (3 << 2) -#define AT91_PMC_PRES_16 (4 << 2) -#define AT91_PMC_PRES_32 (5 << 2) -#define AT91_PMC_PRES_64 (6 << 2) +#define PMC_PRES_OFFSET 2 +#define AT91_PMC_PRES (7 << PMC_PRES_OFFSET) /* Master Clock Prescaler */ +#define AT91_PMC_PRES_1 (0 << PMC_PRES_OFFSET) +#define AT91_PMC_PRES_2 (1 << PMC_PRES_OFFSET) +#define AT91_PMC_PRES_4 (2 << PMC_PRES_OFFSET) +#define AT91_PMC_PRES_8 (3 << PMC_PRES_OFFSET) +#define AT91_PMC_PRES_16 (4 << PMC_PRES_OFFSET) +#define AT91_PMC_PRES_32 (5 << PMC_PRES_OFFSET) +#define AT91_PMC_PRES_64 (6 << PMC_PRES_OFFSET) +#define PMC_ALT_PRES_OFFSET 4 +#define AT91_PMC_ALT_PRES (7 << PMC_ALT_PRES_OFFSET) /* Master Clock Prescaler [alternate location] */ +#define AT91_PMC_ALT_PRES_1 (0 << PMC_ALT_PRES_OFFSET) +#define AT91_PMC_ALT_PRES_2 (1 << PMC_ALT_PRES_OFFSET) +#define AT91_PMC_ALT_PRES_4 (2 << PMC_ALT_PRES_OFFSET) +#define AT91_PMC_ALT_PRES_8 (3 << PMC_ALT_PRES_OFFSET) +#define AT91_PMC_ALT_PRES_16 (4 << PMC_ALT_PRES_OFFSET) +#define AT91_PMC_ALT_PRES_32 (5 << PMC_ALT_PRES_OFFSET) +#define AT91_PMC_ALT_PRES_64 (6 << PMC_ALT_PRES_OFFSET) #define AT91_PMC_MDIV (3 << 8) /* Master Clock Division */ #define AT91RM9200_PMC_MDIV_1 (0 << 8) /* [AT91RM9200 only] */ #define AT91RM9200_PMC_MDIV_2 (1 << 8) #define AT91RM9200_PMC_MDIV_3 (2 << 8) #define AT91RM9200_PMC_MDIV_4 (3 << 8) -#define AT91SAM9_PMC_MDIV_1 (0 << 8) /* [SAM9,CAP9 only] */ +#define AT91SAM9_PMC_MDIV_1 (0 << 8) /* [SAM9 only] */ #define AT91SAM9_PMC_MDIV_2 (1 << 8) #define AT91SAM9_PMC_MDIV_4 (2 << 8) #define AT91SAM9_PMC_MDIV_6 (3 << 8) /* [some SAM9 only] */ @@ -105,7 +119,14 @@ #define AT91_PMC_USBS_UPLL (1 << 0) #define AT91_PMC_OHCIUSBDIV (0xF << 8) /* Divider for USB OHCI Clock */ +#define AT91_PMC_SMD (AT91_PMC + 0x3c) /* Soft Modem Clock Register [some SAM9 only] */ +#define AT91_PMC_SMDS (0x1 << 0) /* SMD input clock selection */ +#define AT91_PMC_SMD_DIV (0x1f << 8) /* SMD input clock divider */ +#define AT91_PMC_SMDDIV(n) (((n) << 8) & AT91_PMC_SMD_DIV) + #define AT91_PMC_PCKR(n) (AT91_PMC + 0x40 + ((n) * 4)) /* Programmable Clock 0-N Registers */ +#define AT91_PMC_ALT_PCKR_CSS (0x7 << 0) /* Programmable Clock Source Selection [alternate length] */ +#define AT91_PMC_CSS_MASTER (4 << 0) /* [some SAM9 only] */ #define AT91_PMC_CSSMCK (0x1 << 8) /* CSS or Master Clock Selection */ #define AT91_PMC_CSSMCK_CSS (0 << 8) #define AT91_PMC_CSSMCK_MCK (1 << 8) @@ -117,17 +138,32 @@ #define AT91_PMC_LOCKA (1 << 1) /* PLLA Lock */ #define AT91_PMC_LOCKB (1 << 2) /* PLLB Lock */ #define AT91_PMC_MCKRDY (1 << 3) /* Master Clock */ -#define AT91_PMC_LOCKU (1 << 6) /* UPLL Lock [some SAM9, AT91CAP9 only] */ -#define AT91_PMC_OSCSEL (1 << 7) /* Slow Clock Oscillator [AT91CAP9 revC only] */ +#define AT91_PMC_LOCKU (1 << 6) /* UPLL Lock [some SAM9] */ #define AT91_PMC_PCK0RDY (1 << 8) /* Programmable Clock 0 */ #define AT91_PMC_PCK1RDY (1 << 9) /* Programmable Clock 1 */ #define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */ #define AT91_PMC_PCK3RDY (1 << 11) /* Programmable Clock 3 */ +#define AT91_PMC_MOSCSELS (1 << 16) /* Main Oscillator Selection [some SAM9] */ +#define AT91_PMC_MOSCRCS (1 << 17) /* Main On-Chip RC [some SAM9] */ +#define AT91_PMC_CFDEV (1 << 18) /* Clock Failure Detector Event [some SAM9] */ #define AT91_PMC_IMR (AT91_PMC + 0x6c) /* Interrupt Mask Register */ #define AT91_PMC_PROT (AT91_PMC + 0xe4) /* Protect Register [AT91CAP9 revC only] */ -#define AT91_PMC_PROTKEY 0x504d4301 /* Activation Code */ +#define AT91_PMC_WPEN (0x1 << 0) /* Write Protect Enable */ +#define AT91_PMC_WPKEY (0xffffff << 8) /* Write Protect Key */ +#define AT91_PMC_PROTKEY (0x504d43 << 8) /* Activation Code */ + +#define AT91_PMC_WPSR (AT91_PMC + 0xe8) /* Write Protect Status Register [some SAM9] */ +#define AT91_PMC_WPVS (0x1 << 0) /* Write Protect Violation Status */ +#define AT91_PMC_WPVSRC (0xffff << 8) /* Write Protect Violation Source */ #define AT91_PMC_VER (AT91_PMC + 0xfc) /* PMC Module Version [AT91CAP9 only] */ +#define AT91_PMC_PCR (AT91_PMC + 0x10c) /* Peripheral Control Register [some SAM9] */ +#define AT91_PMC_PCR_PID (0x3f << 0) /* Peripheral ID */ +#define AT91_PMC_PCR_CMD (0x1 << 12) /* Command */ +#define AT91_PMC_PCR_DIV (0x3 << 16) /* Divisor Value */ +#define AT91_PMC_PCRDIV(n) (((n) << 16) & AT91_PMC_PCR_DIV) +#define AT91_PMC_PCR_EN (0x1 << 28) /* Enable */ + #endif diff --git a/arch/arm/mach-at91/include/mach/at91sam9x5.h b/arch/arm/mach-at91/include/mach/at91sam9x5.h new file mode 100644 index 0000000000..7d40f7ca60 --- /dev/null +++ b/arch/arm/mach-at91/include/mach/at91sam9x5.h @@ -0,0 +1,179 @@ +/* + * Chip-specific header file for the AT91SAM9x5 family + * + * Copyright (C) 2009-2010 Atmel Corporation. + * + * Common definitions. + * Based on AT91SAM9x5 preliminary datasheet. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91SAM9X5_H +#define AT91SAM9X5_H + +/* + * Peripheral identifiers/interrupts. + */ +#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ +#define AT91_ID_SYS 1 /* System Controller Interrupt */ +#define AT91SAM9X5_ID_PIOAB 2 /* Parallel I/O Controller A and B */ +#define AT91SAM9X5_ID_PIOCD 3 /* Parallel I/O Controller C and D */ +#define AT91SAM9X5_ID_SMD 4 /* SMD Soft Modem (SMD) */ +#define AT91SAM9X5_ID_USART0 5 /* USART 0 */ +#define AT91SAM9X5_ID_USART1 6 /* USART 1 */ +#define AT91SAM9X5_ID_USART2 7 /* USART 2 */ +#define AT91SAM9X5_ID_USART3 8 /* USART 3 */ +#define AT91SAM9X5_ID_TWI0 9 /* Two-Wire Interface 0 */ +#define AT91SAM9X5_ID_TWI1 10 /* Two-Wire Interface 1 */ +#define AT91SAM9X5_ID_TWI2 11 /* Two-Wire Interface 2 */ +#define AT91SAM9X5_ID_MCI0 12 /* High Speed Multimedia Card Interface 0 */ +#define AT91SAM9X5_ID_SPI0 13 /* Serial Peripheral Interface 0 */ +#define AT91SAM9X5_ID_SPI1 14 /* Serial Peripheral Interface 1 */ +#define AT91SAM9X5_ID_UART0 15 /* UART 0 */ +#define AT91SAM9X5_ID_UART1 16 /* UART 1 */ +#define AT91SAM9X5_ID_TCB 17 /* Timer Counter 0, 1, 2, 3, 4 and 5 */ +#define AT91SAM9X5_ID_PWM 18 /* Pulse Width Modulation Controller */ +#define AT91SAM9X5_ID_ADC 19 /* ADC Controller */ +#define AT91SAM9X5_ID_DMA0 20 /* DMA Controller 0 */ +#define AT91SAM9X5_ID_DMA1 21 /* DMA Controller 1 */ +#define AT91SAM9X5_ID_UHPHS 22 /* USB Host High Speed */ +#define AT91SAM9X5_ID_UDPHS 23 /* USB Device High Speed */ +#define AT91SAM9X5_ID_EMAC0 24 /* Ethernet MAC0 */ +#define AT91SAM9X5_ID_LCDC 25 /* LCD Controller */ +#define AT91SAM9X5_ID_ISI 25 /* Image Sensor Interface */ +#define AT91SAM9X5_ID_MCI1 26 /* High Speed Multimedia Card Interface 1 */ +#define AT91SAM9X5_ID_EMAC1 27 /* Ethernet MAC1 */ +#define AT91SAM9X5_ID_SSC 28 /* Synchronous Serial Controller */ +#define AT91SAM9X5_ID_CAN0 29 /* CAN Controller 0 */ +#define AT91SAM9X5_ID_CAN1 30 /* CAN Controller 1 */ +#define AT91SAM9X5_ID_IRQ0 31 /* Advanced Interrupt Controller */ + +/* + * User Peripheral physical base addresses. + */ +#define AT91SAM9X5_BASE_SPI0 0xf0000000 +#define AT91SAM9X5_BASE_SPI1 0xf0004000 +#define AT91SAM9X5_BASE_MCI0 0xf0008000 +#define AT91SAM9X5_BASE_MCI1 0xf000c000 +#define AT91SAM9X5_BASE_SSC 0xf0010000 +#define AT91SAM9X5_BASE_CAN0 0xf8000000 +#define AT91SAM9X5_BASE_CAN1 0xf8004000 +#define AT91SAM9X5_BASE_TCB0 0xf8008000 +#define AT91SAM9X5_BASE_TC0 0xf8008000 +#define AT91SAM9X5_BASE_TC1 0xf8008040 +#define AT91SAM9X5_BASE_TC2 0xf8008080 +#define AT91SAM9X5_BASE_TCB1 0xf800c000 +#define AT91SAM9X5_BASE_TC3 0xf800c000 +#define AT91SAM9X5_BASE_TC4 0xf800c040 +#define AT91SAM9X5_BASE_TC5 0xf800c080 +#define AT91SAM9X5_BASE_TWI0 0xf8010000 +#define AT91SAM9X5_BASE_TWI1 0xf8014000 +#define AT91SAM9X5_BASE_TWI2 0xf8018000 +#define AT91SAM9X5_BASE_USART0 0xf801c000 +#define AT91SAM9X5_BASE_USART1 0xf8020000 +#define AT91SAM9X5_BASE_USART2 0xf8024000 +#define AT91SAM9X5_BASE_USART3 0xf8028000 +#define AT91SAM9X5_BASE_EMAC0 0xf802c000 +#define AT91SAM9X5_BASE_EMAC1 0xf8030000 +#define AT91SAM9X5_BASE_PWMC 0xf8034000 +#define AT91SAM9X5_BASE_LCDC 0xf8038000 +#define AT91SAM9X5_BASE_UDPHS 0xf803c000 +#define AT91SAM9X5_BASE_UART0 0xf8040000 +#define AT91SAM9X5_BASE_UART1 0xf8044000 +#define AT91SAM9X5_BASE_ISI 0xf8048000 +#define AT91SAM9X5_BASE_ADC 0xf804c000 +#define AT91_BASE_SYS 0xffffc000 + +/* + * System Peripherals (offset from AT91_BASE_SYS) + */ +#define AT91_MATRIX (0xffffde00 - AT91_BASE_SYS) +#define AT91_PMECC (0xffffe000 - AT91_BASE_SYS) +#define AT91_PMERRLOC (0xffffe600 - AT91_BASE_SYS) +#define AT91_DDRSDRC0 (0xffffe800 - AT91_BASE_SYS) +#define AT91_SMC (0xffffea00 - AT91_BASE_SYS) +#define AT91_DMA0 (0xffffec00 - AT91_BASE_SYS) +#define AT91_DMA1 (0xffffee00 - AT91_BASE_SYS) +#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) +#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) +#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) +#define AT91_RSTC (0xfffffe00 - AT91_BASE_SYS) +#define AT91_SHDWC (0xfffffe10 - AT91_BASE_SYS) +#define AT91_PIT (0xfffffe30 - AT91_BASE_SYS) +#define AT91_WDT (0xfffffe40 - AT91_BASE_SYS) +#define AT91_GPBR (0xfffffe60 - AT91_BASE_SYS) +#define AT91_RTC (0xfffffeb0 - AT91_BASE_SYS) + +#define AT91_BASE_PIOA 0xfffff400 +#define AT91_BASE_PIOB 0xfffff600 +#define AT91_BASE_PIOC 0xfffff800 +#define AT91_BASE_PIOD 0xfffffa00 + +#define AT91_USART0 AT91SAM9X5_BASE_US0 +#define AT91_USART1 AT91SAM9X5_BASE_US1 +#define AT91_USART2 AT91SAM9X5_BASE_US2 +#define AT91_USART3 AT91SAM9X5_BASE_US3 + + +/* + * Internal Memory. + */ +#define AT91SAM9X5_SRAM_BASE 0x00300000 /* Internal SRAM base address */ +#define AT91SAM9X5_SRAM_SIZE SZ_32K /* Internal SRAM size (32Kb) */ + +#define AT91SAM9X5_ROM_BASE 0x00400000 /* Internal ROM base address */ +#define AT91SAM9X5_ROM_SIZE SZ_64K /* Internal ROM size (64Kb) */ + +#define AT91SAM9X5_SMD_BASE 0x00400000 /* SMD Controller */ +#define AT91SAM9X5_UDPHS_FIFO 0x00500000 /* USB Device HS controller */ +#define AT91SAM9X5_OHCI_BASE 0x00600000 /* USB Host controller (OHCI) */ +#define AT91SAM9X5_EHCI_BASE 0x00700000 /* USB Host controller (EHCI) */ + +#define CONSISTENT_DMA_SIZE SZ_4M + +/* + * DMA0 peripheral identifiers + * for hardware handshaking interface + */ +#define AT_DMA_ID_MCI0 0 +#define AT_DMA_ID_SPI0_TX 1 +#define AT_DMA_ID_SPI0_RX 2 +#define AT_DMA_ID_USART0_TX 3 +#define AT_DMA_ID_USART0_RX 4 +#define AT_DMA_ID_USART1_TX 5 +#define AT_DMA_ID_USART1_RX 6 +#define AT_DMA_ID_TWI0_TX 7 +#define AT_DMA_ID_TWI0_RX 8 +#define AT_DMA_ID_TWI2_TX 9 +#define AT_DMA_ID_TWI2_RX 10 +#define AT_DMA_ID_UART0_TX 11 +#define AT_DMA_ID_UART0_RX 12 +#define AT_DMA_ID_SSC_TX 13 +#define AT_DMA_ID_SSC_RX 14 + +/* + * DMA1 peripheral identifiers + * for hardware handshaking interface + */ +#define AT_DMA_ID_MCI1 0 +#define AT_DMA_ID_SPI1_TX 1 +#define AT_DMA_ID_SPI1_RX 2 +#define AT_DMA_ID_SMD_TX 3 +#define AT_DMA_ID_SMD_RX 4 +#define AT_DMA_ID_TWI1_TX 5 +#define AT_DMA_ID_TWI1_RX 6 +#define AT_DMA_ID_ADC_RX 7 +#define AT_DMA_ID_DBGU_TX 8 +#define AT_DMA_ID_DBGU_RX 9 +#define AT_DMA_ID_UART1_TX 10 +#define AT_DMA_ID_UART1_RX 11 +#define AT_DMA_ID_USART2_TX 12 +#define AT_DMA_ID_USART2_RX 13 +#define AT_DMA_ID_USART3_TX 14 +#define AT_DMA_ID_USART3_RX 15 + +#endif diff --git a/arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h new file mode 100644 index 0000000000..b070a407e8 --- /dev/null +++ b/arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h @@ -0,0 +1,139 @@ +/* + * Matrix-centric header file for the AT91SAM9x5 family + * + * Copyright (C) 2009-2010 Atmel Corporation. + * + * Memory Controllers (MATRIX, EBI) - System peripherals registers. + * Based on AT91SAM9x5 preliminary datasheet. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91SAM9X5_MATRIX_H +#define AT91SAM9X5_MATRIX_H + +#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */ +#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */ +#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */ +#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */ +#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */ +#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */ +#define AT91_MATRIX_MCFG6 (AT91_MATRIX + 0x18) /* Master Configuration Register 6 */ +#define AT91_MATRIX_MCFG7 (AT91_MATRIX + 0x1C) /* Master Configuration Register 7 */ +#define AT91_MATRIX_MCFG8 (AT91_MATRIX + 0x20) /* Master Configuration Register 8 */ +#define AT91_MATRIX_MCFG9 (AT91_MATRIX + 0x24) /* Master Configuration Register 9 */ +#define AT91_MATRIX_MCFG10 (AT91_MATRIX + 0x28) /* Master Configuration Register 10 */ +#define AT91_MATRIX_MCFG11 (AT91_MATRIX + 0x2C) /* Master Configuration Register 11 */ +#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ +#define AT91_MATRIX_ULBT_INFINITE (0 << 0) +#define AT91_MATRIX_ULBT_SINGLE (1 << 0) +#define AT91_MATRIX_ULBT_FOUR (2 << 0) +#define AT91_MATRIX_ULBT_EIGHT (3 << 0) +#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) +#define AT91_MATRIX_ULBT_THIRTYTWO (5 << 0) +#define AT91_MATRIX_ULBT_SIXTYFOUR (6 << 0) +#define AT91_MATRIX_ULBT_128 (7 << 0) + +#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */ +#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */ +#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */ +#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */ +#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */ +#define AT91_MATRIX_SCFG5 (AT91_MATRIX + 0x54) /* Slave Configuration Register 5 */ +#define AT91_MATRIX_SCFG6 (AT91_MATRIX + 0x58) /* Slave Configuration Register 6 */ +#define AT91_MATRIX_SCFG7 (AT91_MATRIX + 0x5C) /* Slave Configuration Register 7 */ +#define AT91_MATRIX_SCFG8 (AT91_MATRIX + 0x60) /* Slave Configuration Register 8 */ +#define AT91_MATRIX_SLOT_CYCLE (0x1ff << 0) /* Maximum Number of Allowed Cycles for a Burst */ +#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ +#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) +#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) +#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) +#define AT91_MATRIX_FIXED_DEFMSTR (0xf << 18) /* Fixed Index of Default Master */ + +#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */ +#define AT91_MATRIX_PRBS0 (AT91_MATRIX + 0x84) /* Priority Register B for Slave 0 */ +#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */ +#define AT91_MATRIX_PRBS1 (AT91_MATRIX + 0x8C) /* Priority Register B for Slave 1 */ +#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */ +#define AT91_MATRIX_PRBS2 (AT91_MATRIX + 0x94) /* Priority Register B for Slave 2 */ +#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */ +#define AT91_MATRIX_PRBS3 (AT91_MATRIX + 0x9C) /* Priority Register B for Slave 3 */ +#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */ +#define AT91_MATRIX_PRBS4 (AT91_MATRIX + 0xA4) /* Priority Register B for Slave 4 */ +#define AT91_MATRIX_PRAS5 (AT91_MATRIX + 0xA8) /* Priority Register A for Slave 5 */ +#define AT91_MATRIX_PRBS5 (AT91_MATRIX + 0xAC) /* Priority Register B for Slave 5 */ +#define AT91_MATRIX_PRAS6 (AT91_MATRIX + 0xB0) /* Priority Register A for Slave 6 */ +#define AT91_MATRIX_PRBS6 (AT91_MATRIX + 0xB4) /* Priority Register B for Slave 6 */ +#define AT91_MATRIX_PRAS7 (AT91_MATRIX + 0xB8) /* Priority Register A for Slave 7 */ +#define AT91_MATRIX_PRBS7 (AT91_MATRIX + 0xBC) /* Priority Register B for Slave 7 */ +#define AT91_MATRIX_PRAS8 (AT91_MATRIX + 0xC0) /* Priority Register A for Slave 8 */ +#define AT91_MATRIX_PRBS8 (AT91_MATRIX + 0xC4) /* Priority Register B for Slave 8 */ +#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ +#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ +#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ +#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */ +#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */ +#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */ +#define AT91_MATRIX_M6PR (3 << 24) /* Master 6 Priority */ +#define AT91_MATRIX_M7PR (3 << 28) /* Master 7 Priority */ +#define AT91_MATRIX_M8PR (3 << 0) /* Master 8 Priority (in Register B) */ +#define AT91_MATRIX_M9PR (3 << 4) /* Master 9 Priority (in Register B) */ +#define AT91_MATRIX_M10PR (3 << 8) /* Master 10 Priority (in Register B) */ +#define AT91_MATRIX_M11PR (3 << 12) /* Master 11 Priority (in Register B) */ + +#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */ +#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ +#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ +#define AT91_MATRIX_RCB2 (1 << 2) +#define AT91_MATRIX_RCB3 (1 << 3) +#define AT91_MATRIX_RCB4 (1 << 4) +#define AT91_MATRIX_RCB5 (1 << 5) +#define AT91_MATRIX_RCB6 (1 << 6) +#define AT91_MATRIX_RCB7 (1 << 7) +#define AT91_MATRIX_RCB8 (1 << 8) +#define AT91_MATRIX_RCB9 (1 << 9) +#define AT91_MATRIX_RCB10 (1 << 10) +#define AT91_MATRIX_RCB11 (1 << 11) + +#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x120) /* EBI Chip Select Assignment Register */ +#define AT91_MATRIX_EBI_CS1A (1 << 1) /* Chip Select 1 Assignment */ +#define AT91_MATRIX_EBI_CS1A_SMC (0 << 1) +#define AT91_MATRIX_EBI_CS1A_SDRAMC (1 << 1) +#define AT91_MATRIX_EBI_CS3A (1 << 3) /* Chip Select 3 Assignment */ +#define AT91_MATRIX_EBI_CS3A_SMC (0 << 3) +#define AT91_MATRIX_EBI_CS3A_SMC_NANDFLASH (1 << 3) +#define AT91_MATRIX_EBI_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ +#define AT91_MATRIX_EBI_DBPU_ON (0 << 8) +#define AT91_MATRIX_EBI_DBPU_OFF (1 << 8) +#define AT91_MATRIX_EBI_VDDIOMSEL (1 << 16) /* Memory voltage selection */ +#define AT91_MATRIX_EBI_VDDIOMSEL_1_8V (0 << 16) +#define AT91_MATRIX_EBI_VDDIOMSEL_3_3V (1 << 16) +#define AT91_MATRIX_EBI_EBI_IOSR (1 << 17) /* EBI I/O slew rate selection */ +#define AT91_MATRIX_EBI_EBI_IOSR_REDUCED (0 << 17) +#define AT91_MATRIX_EBI_EBI_IOSR_NORMAL (1 << 17) +#define AT91_MATRIX_EBI_DDR_IOSR (1 << 18) /* DDR2 dedicated port I/O slew rate selection */ +#define AT91_MATRIX_EBI_DDR_IOSR_REDUCED (0 << 18) +#define AT91_MATRIX_EBI_DDR_IOSR_NORMAL (1 << 18) +#define AT91_MATRIX_NFD0_SELECT (1 << 24) /* NAND Flash Data Bus Selection */ +#define AT91_MATRIX_NFD0_ON_D0 (0 << 24) +#define AT91_MATRIX_NFD0_ON_D16 (1 << 24) +#define AT91_MATRIX_DDR_MP_EN (1 << 25) /* DDR Multi-port Enable */ +#define AT91_MATRIX_MP_OFF (0 << 25) +#define AT91_MATRIX_MP_ON (1 << 25) + +#define AT91_MATRIX_WPMR (AT91_MATRIX + 0x1E4) /* Write Protect Mode Register */ +#define AT91_MATRIX_WPMR_WPEN (1 << 0) /* Write Protect ENable */ +#define AT91_MATRIX_WPMR_WP_WPDIS (0 << 0) +#define AT91_MATRIX_WPMR_WP_WPEN (1 << 0) +#define AT91_MATRIX_WPMR_WPKEY (0xFFFFFF << 8) /* Write Protect KEY */ + +#define AT91_MATRIX_WPSR (AT91_MATRIX + 0x1E8) /* Write Protect Status Register */ +#define AT91_MATRIX_WPSR_WPVS (1 << 0) /* Write Protect Violation Status */ +#define AT91_MATRIX_WPSR_NO_WPV (0 << 0) +#define AT91_MATRIX_WPSR_WPV (1 << 0) +#define AT91_MATRIX_WPSR_WPVSRC (0xFFFF << 8) /* Write Protect Violation Source */ + +#endif diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h index 9f1abc1348..f45bad6047 100644 --- a/arch/arm/mach-at91/include/mach/board.h +++ b/arch/arm/mach-at91/include/mach/board.h @@ -70,7 +70,7 @@ struct at91_ether_platform_data { int (*get_ethaddr)(struct eth_device*, unsigned char *adr); }; -void at91_add_device_eth(struct at91_ether_platform_data *data); +void at91_add_device_eth(int id, struct at91_ether_platform_data *data); /* SDRAM */ void at91_add_device_sdram(u32 size); diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h index 3bef931d0b..0700f21253 100644 --- a/arch/arm/mach-at91/include/mach/cpu.h +++ b/arch/arm/mach-at91/include/mach/cpu.h @@ -27,6 +27,7 @@ #define ARCH_ID_AT91SAM9G45 0x819b05a0 #define ARCH_ID_AT91SAM9G45MRL 0x819b05a2 /* aka 9G45-ES2 & non ES lots */ #define ARCH_ID_AT91SAM9G45ES 0x819b05a1 /* 9G45-ES (Engineering Sample) */ +#define ARCH_ID_AT91SAM9X5 0x819a05a0 #define ARCH_ID_AT91CAP9 0x039A03A0 #define ARCH_ID_AT91SAM9XE128 0x329973a0 @@ -55,6 +56,12 @@ static inline unsigned long at91_cpu_fully_identify(void) #define ARCH_EXID_AT91SAM9G46 0x00000003 #define ARCH_EXID_AT91SAM9G45 0x00000004 +#define ARCH_EXID_AT91SAM9G15 0x00000000 +#define ARCH_EXID_AT91SAM9G35 0x00000001 +#define ARCH_EXID_AT91SAM9X35 0x00000002 +#define ARCH_EXID_AT91SAM9G25 0x00000003 +#define ARCH_EXID_AT91SAM9X25 0x00000004 + static inline unsigned long at91_exid_identify(void) { return at91_sys_read(AT91_DBGU_EXID); @@ -143,6 +150,27 @@ static inline unsigned long at91cap9_rev_identify(void) #define cpu_is_at91sam9m11() (0) #endif +#ifdef CONFIG_ARCH_AT91SAM9X5 +#define cpu_is_at91sam9x5() (at91_cpu_identify() == ARCH_ID_AT91SAM9X5) +#define cpu_is_at91sam9g15() (cpu_is_at91sam9x5() && \ + (at91_exid_identify() == ARCH_EXID_AT91SAM9G15)) +#define cpu_is_at91sam9g35() (cpu_is_at91sam9x5() && \ + (at91_exid_identify() == ARCH_EXID_AT91SAM9G35)) +#define cpu_is_at91sam9x35() (cpu_is_at91sam9x5() && \ + (at91_exid_identify() == ARCH_EXID_AT91SAM9X35)) +#define cpu_is_at91sam9g25() (cpu_is_at91sam9x5() && \ + (at91_exid_identify() == ARCH_EXID_AT91SAM9G25)) +#define cpu_is_at91sam9x25() (cpu_is_at91sam9x5() && \ + (at91_exid_identify() == ARCH_EXID_AT91SAM9X25)) +#else +#define cpu_is_at91sam9x5() (0) +#define cpu_is_at91sam9g15() (0) +#define cpu_is_at91sam9g35() (0) +#define cpu_is_at91sam9x35() (0) +#define cpu_is_at91sam9g25() (0) +#define cpu_is_at91sam9x25() (0) +#endif + #ifdef CONFIG_ARCH_AT91CAP9 #define cpu_is_at91cap9() (at91_cpu_identify() == ARCH_ID_AT91CAP9) #define cpu_is_at91cap9_revB() (at91cap9_rev_identify() == ARCH_REVISION_CAP9_B) diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h index 95a4bd479b..0f93f8de05 100644 --- a/arch/arm/mach-at91/include/mach/gpio.h +++ b/arch/arm/mach-at91/include/mach/gpio.h @@ -230,6 +230,12 @@ int at91_set_multi_drive(unsigned pin, int is_on); */ int at91_set_gpio_value(unsigned pin, int value); +extern int at91_set_C_periph(unsigned pin, int use_pullup); +extern int at91_set_D_periph(unsigned pin, int use_pullup); +extern int at91_set_debounce(unsigned pin, int is_on, int div); +extern int at91_set_pulldown(unsigned pin, int is_on); +extern int at91_disable_schmitt_trig(unsigned pin); + /* * read the pin's value (works even if it's not muxed as a gpio). */ diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h index fcb1bd4e67..7af88038a7 100644 --- a/arch/arm/mach-at91/include/mach/hardware.h +++ b/arch/arm/mach-at91/include/mach/hardware.h @@ -26,6 +26,8 @@ #include <mach/at91sam9rl.h> #elif defined(CONFIG_ARCH_AT91SAM9G45) #include <mach/at91sam9g45.h> +#elif defined(CONFIG_ARCH_AT91SAM9X5) +#include <mach/at91sam9x5.h> #elif defined(CONFIG_ARCH_AT91CAP9) #include <mach/at91cap9.h> #elif defined(CONFIG_ARCH_AT91X40) diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 853757be86..75e87fe544 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -307,7 +307,7 @@ choice config MACH_PCM037 bool "phyCORE-i.MX31" select MACH_HAS_LOWLEVEL_INIT - select USB_ISP1504 if USB + select USB_ULPI if USB select ARCH_HAS_L2X0 help Say Y here if you are using Phytec's phyCORE-i.MX31 (pcm037) equipped diff --git a/arch/arm/mach-imx/boot.c b/arch/arm/mach-imx/boot.c index 8b82655d4f..9f2def6b2b 100644 --- a/arch/arm/mach-imx/boot.c +++ b/arch/arm/mach-imx/boot.c @@ -86,9 +86,34 @@ static int imx_25_35_boot_save_loc(void) return 0; } - coredevice_initcall(imx_25_35_boot_save_loc); BAREBOX_MAGICVAR(barebox_loc, "The source barebox has been booted from"); +#endif + +#if defined(CONFIG_ARCH_IMX27) +static int imx_27_boot_save_loc(void) +{ + switch ((GPCR & GPCR_BOOT_MASK) >> GPCR_BOOT_SHIFT) { + case GPCR_BOOT_UART_USB: + setenv("barebox_loc", "serial"); + break; + case GPCR_BOOT_8BIT_NAND_2k: + case GPCR_BOOT_16BIT_NAND_2k: + case GPCR_BOOT_16BIT_NAND_512: + case GPCR_BOOT_8BIT_NAND_512: + setenv("barebox_loc", "nand"); + break; + default: + setenv("barebox_loc", "nor"); + break; + } + export("barebox_loc"); + + return 0; +} +coredevice_initcall(imx_27_boot_save_loc); + +BAREBOX_MAGICVAR(barebox_loc, "The source barebox has been booted from"); #endif diff --git a/arch/arm/mach-imx/imx51.c b/arch/arm/mach-imx/imx51.c index 2431e61115..02704c1188 100644 --- a/arch/arm/mach-imx/imx51.c +++ b/arch/arm/mach-imx/imx51.c @@ -27,10 +27,10 @@ #include "gpio.h" void *imx_gpio_base[] = { - (void *)0x73f84000, - (void *)0x73f88000, - (void *)0x73f8c000, - (void *)0x73f90000, + (void *)MX51_GPIO1_BASE_ADDR, + (void *)MX51_GPIO2_BASE_ADDR, + (void *)MX51_GPIO3_BASE_ADDR, + (void *)MX51_GPIO4_BASE_ADDR, }; int imx_gpio_count = ARRAY_SIZE(imx_gpio_base) * 32; @@ -179,12 +179,12 @@ static int imx51_boot_save_loc(void) coredevice_initcall(imx51_boot_save_loc); -#define setup_pll_1000(base) imx5_setup_pll((base), 1000, ((10 << 4) + ((1 - 1) << 0)), (12 - 1), 5) -#define setup_pll_800(base) imx5_setup_pll((base), 800, ((8 << 4) + ((1 - 1) << 0)), (3 - 1), 1) -#define setup_pll_665(base) imx5_setup_pll((base), 665, ((6 << 4) + ((1 - 1) << 0)), (96 - 1), 89) -#define setup_pll_400(base) imx5_setup_pll((base), 400, ((8 << 4) + ((2 - 1) << 0)), (3 - 1), 1) -#define setup_pll_455(base) imx5_setup_pll((base), 455, ((9 << 4) + ((2 - 1) << 0)), (48 - 1), 23) -#define setup_pll_216(base) imx5_setup_pll((base), 216, ((6 << 4) + ((3 - 1) << 0)), (4 - 1), 3) +#define setup_pll_800(base) imx5_setup_pll((base), 800, (( 8 << 4) + ((1 - 1) << 0)), ( 3 - 1), 1) +#define setup_pll_665(base) imx5_setup_pll((base), 665, (( 6 << 4) + ((1 - 1) << 0)), (96 - 1), 89) +#define setup_pll_600(base) imx5_setup_pll((base), 600, (( 6 << 4) + ((1 - 1) << 0)), ( 4 - 1), 1) +#define setup_pll_400(base) imx5_setup_pll((base), 400, (( 8 << 4) + ((2 - 1) << 0)), ( 3 - 1), 1) +#define setup_pll_455(base) imx5_setup_pll((base), 455, (( 9 << 4) + ((2 - 1) << 0)), (48 - 1), 23) +#define setup_pll_216(base) imx5_setup_pll((base), 216, (( 6 << 4) + ((3 - 1) << 0)), ( 4 - 1), 3) void imx51_init_lowlevel(void) { @@ -238,11 +238,8 @@ void imx51_init_lowlevel(void) /* Set the platform clock dividers */ writel(0x00000124, MX51_ARM_BASE_ADDR + 0x14); - /* Run TO 3.0 at Full speed, for other TO's wait till we increase VDDGP */ - if (imx_silicon_revision() == MX51_CHIP_REV_3_0) - writel(0x0, ccm + MX5_CCM_CACRR); - else - writel(0x1, ccm + MX5_CCM_CACRR); + /* Run at Full speed */ + writel(0x0, ccm + MX5_CCM_CACRR); /* Switch ARM back to PLL 1 */ writel(0x0, ccm + MX5_CCM_CCSR); @@ -270,14 +267,4 @@ void imx51_init_lowlevel(void) while (readl(ccm + MX5_CCM_CDHIPR)); writel(0x0, ccm + MX5_CCM_CCDR); - - writel(0x1, 0x73fa8074); - - r = readl(0x73f88000); - r |= 0x40; - writel(r, 0x73f88000); - - r = readl(0x73f88004); - r |= 0x40; - writel(r, 0x73f88004); } diff --git a/arch/arm/mach-imx/include/mach/clock-imx51_53.h b/arch/arm/mach-imx/include/mach/clock-imx51_53.h index 2525ccdf1e..6004a6d36c 100644 --- a/arch/arm/mach-imx/include/mach/clock-imx51_53.h +++ b/arch/arm/mach-imx/include/mach/clock-imx51_53.h @@ -584,45 +584,6 @@ #define MX5_SRPGC_EMI_PUPSCR (MX5_SRPGC_EMI_BASE + 0x4) #define MX5_SRPGC_EMI_PDNSCR (MX5_SRPGC_EMI_BASE + 0x8) - -/* Assuming 24MHz input clock with doubler ON */ -/* MFI PDF */ -#define MX5_PLL_DP_OP_1000 ((10 << 4) + ((1 - 1) << 0)) -#define MX5_PLL_DP_MFD_1000 (12 - 1) -#define MX5_PLL_DP_MFN_1000 5 - -#define MX5_PLL_DP_OP_850 ((8 << 4) + ((1 - 1) << 0)) -#define MX5_PLL_DP_MFD_850 (48 - 1) -#define MX5_PLL_DP_MFN_850 41 - -#define MX5_PLL_DP_OP_800 ((8 << 4) + ((1 - 1) << 0)) -#define MX5_PLL_DP_MFD_800 (3 - 1) -#define MX5_PLL_DP_MFN_800 1 - -#define MX5_PLL_DP_OP_700 ((7 << 4) + ((1 - 1) << 0)) -#define MX5_PLL_DP_MFD_700 (24 - 1) -#define MX5_PLL_DP_MFN_700 7 - -#define MX5_PLL_DP_OP_665 ((6 << 4) + ((1 - 1) << 0)) -#define MX5_PLL_DP_MFD_665 (96 - 1) -#define MX5_PLL_DP_MFN_665 89 - -#define MX5_PLL_DP_OP_600 ((6 << 4) + ((1 - 1) << 0)) -#define MX5_PLL_DP_MFD_600 (4 - 1) -#define MX5_PLL_DP_MFN_600 1 - -#define MX5_PLL_DP_OP_532 ((5 << 4) + ((1 - 1) << 0)) -#define MX5_PLL_DP_MFD_532 (24 - 1) -#define MX5_PLL_DP_MFN_532 13 - -#define MX5_PLL_DP_OP_400 ((8 << 4) + ((2 - 1) << 0)) -#define MX5_PLL_DP_MFD_400 (3 - 1) -#define MX5_PLL_DP_MFN_400 1 - -#define MX5_PLL_DP_OP_216 ((6 << 4) + ((3 - 1) << 0)) -#define MX5_PLL_DP_MFD_216 (4 - 1) -#define MX5_PLL_DP_MFN_216 3 - #endif /* __ARCH_ARM_MACH_MX51_CRM_REGS_H__ */ diff --git a/arch/arm/mach-imx/include/mach/devices-imx27.h b/arch/arm/mach-imx/include/mach/devices-imx27.h index 3141d96b33..6a3a2341b2 100644 --- a/arch/arm/mach-imx/include/mach/devices-imx27.h +++ b/arch/arm/mach-imx/include/mach/devices-imx27.h @@ -48,7 +48,7 @@ static inline struct device_d *imx27_add_nand(struct imx_nand_platform_data *pda static inline struct device_d *imx27_add_fb(struct imx_fb_platform_data *pdata) { - return imx_add_fb((void *)0x10021000, pdata); + return imx_add_fb((void *)IMX_FB_BASE, pdata); } static inline struct device_d *imx27_add_fec(struct fec_platform_data *pdata) @@ -58,7 +58,15 @@ static inline struct device_d *imx27_add_fec(struct fec_platform_data *pdata) static inline struct device_d *imx27_add_mmc0(void *pdata) { - return imx_add_mmc((void *)0x10014000, 0, pdata); + return imx_add_mmc((void *)IMX_SDHC1_BASE, 0, pdata); } +static inline struct device_d *imx27_add_mmc1(void *pdata) +{ + return imx_add_mmc((void *)IMX_SDHC2_BASE, 1, pdata); +} +static inline struct device_d *imx27_add_mmc2(void *pdata) +{ + return imx_add_mmc((void *)IMX_SDHC3_BASE, 2, pdata); +} diff --git a/arch/arm/mach-imx/include/mach/devices-imx51.h b/arch/arm/mach-imx/include/mach/devices-imx51.h index d9bed8c886..27fcaa2c43 100644 --- a/arch/arm/mach-imx/include/mach/devices-imx51.h +++ b/arch/arm/mach-imx/include/mach/devices-imx51.h @@ -37,6 +37,11 @@ static inline struct device_d *imx51_add_uart1(void) return imx_add_uart((void *)MX51_UART2_BASE_ADDR, 1); } +static inline struct device_d *imx51_add_uart2(void) +{ + return imx_add_uart((void *)MX51_UART3_BASE_ADDR, 2); +} + static inline struct device_d *imx51_add_fec(struct fec_platform_data *pdata) { return imx_add_fec((void *)MX51_MXC_FEC_BASE_ADDR, pdata); diff --git a/arch/arm/mach-imx/include/mach/imx-flash-header.h b/arch/arm/mach-imx/include/mach/imx-flash-header.h index 874426252a..ca2fe9f3d3 100644 --- a/arch/arm/mach-imx/include/mach/imx-flash-header.h +++ b/arch/arm/mach-imx/include/mach/imx-flash-header.h @@ -1,6 +1,8 @@ #ifndef __MACH_FLASH_HEADER_H #define __MACH_FLASH_HEADER_H +#include <asm-generic/sections.h> + #define __flash_header_start __section(.flash_header_start) #if defined(CONFIG_ARCH_IMX_INTERNAL_BOOT_NOR) @@ -87,6 +89,14 @@ struct imx_flash_header { #define DCD_COMMAND_WRITE_TAG 0xcc #define DCD_COMMAND_WRITE_PARAM 0x04 +/* + * At least on i.MX5 the ROM copies only full blocks. Unfortunately + * it does not round up to the next full block, we have to do it + * ourselves. Use 4095 which should be enough for the largest NAND + * pages. + */ +#define DCD_BAREBOX_SIZE (barebox_image_size + 4095) + struct imx_ivt_header { uint8_t tag; __be16 length; diff --git a/arch/arm/mach-imx/include/mach/imx27-regs.h b/arch/arm/mach-imx/include/mach/imx27-regs.h index 3a4325e3da..25ea04a556 100644 --- a/arch/arm/mach-imx/include/mach/imx27-regs.h +++ b/arch/arm/mach-imx/include/mach/imx27-regs.h @@ -19,12 +19,15 @@ #define IMX_SPI1_BASE (0x0e000 + IMX_IO_BASE) #define IMX_SPI2_BASE (0x0f000 + IMX_IO_BASE) #define IMX_I2C1_BASE (0x12000 + IMX_IO_BASE) +#define IMX_SDHC1_BASE (0x13000 + IMX_IO_BASE) +#define IMX_SDHC2_BASE (0x14000 + IMX_IO_BASE) #define IMX_GPIO_BASE (0x15000 + IMX_IO_BASE) #define IMX_TIM4_BASE (0x19000 + IMX_IO_BASE) #define IMX_TIM5_BASE (0x1a000 + IMX_IO_BASE) #define IMX_UART5_BASE (0x1b000 + IMX_IO_BASE) #define IMX_UART6_BASE (0x1c000 + IMX_IO_BASE) #define IMX_I2C2_BASE (0x1d000 + IMX_IO_BASE) +#define IMX_SDHC3_BASE (0x1e000 + IMX_IO_BASE) #define IMX_TIM6_BASE (0x1f000 + IMX_IO_BASE) #define IMX_AIPI2_BASE (0x20000 + IMX_IO_BASE) #define IMX_FB_BASE (0x21000 + IMX_IO_BASE) @@ -63,24 +66,9 @@ #define GPCR_BOOT_8BIT_NAND_512 7 /* Chip Select Registers */ -#define CS0U __REG(IMX_WEIM_BASE + 0x00) /* Chip Select 0 Upper Register */ -#define CS0L __REG(IMX_WEIM_BASE + 0x04) /* Chip Select 0 Lower Register */ -#define CS0A __REG(IMX_WEIM_BASE + 0x08) /* Chip Select 0 Addition Register */ -#define CS1U __REG(IMX_WEIM_BASE + 0x10) /* Chip Select 1 Upper Register */ -#define CS1L __REG(IMX_WEIM_BASE + 0x14) /* Chip Select 1 Lower Register */ -#define CS1A __REG(IMX_WEIM_BASE + 0x18) /* Chip Select 1 Addition Register */ -#define CS2U __REG(IMX_WEIM_BASE + 0x20) /* Chip Select 2 Upper Register */ -#define CS2L __REG(IMX_WEIM_BASE + 0x24) /* Chip Select 2 Lower Register */ -#define CS2A __REG(IMX_WEIM_BASE + 0x28) /* Chip Select 2 Addition Register */ -#define CS3U __REG(IMX_WEIM_BASE + 0x30) /* Chip Select 3 Upper Register */ -#define CS3L __REG(IMX_WEIM_BASE + 0x34) /* Chip Select 3 Lower Register */ -#define CS3A __REG(IMX_WEIM_BASE + 0x38) /* Chip Select 3 Addition Register */ -#define CS4U __REG(IMX_WEIM_BASE + 0x40) /* Chip Select 4 Upper Register */ -#define CS4L __REG(IMX_WEIM_BASE + 0x44) /* Chip Select 4 Lower Register */ -#define CS4A __REG(IMX_WEIM_BASE + 0x48) /* Chip Select 4 Addition Register */ -#define CS5U __REG(IMX_WEIM_BASE + 0x50) /* Chip Select 5 Upper Register */ -#define CS5L __REG(IMX_WEIM_BASE + 0x54) /* Chip Select 5 Lower Register */ -#define CS5A __REG(IMX_WEIM_BASE + 0x58) /* Chip Select 5 Addition Register */ +#define CSxU(x) __REG(IMX_WEIM_BASE + (cs * 0x10) + 0x00) /* Chip Select x Upper Register */ +#define CSxL(x) __REG(IMX_WEIM_BASE + (cs * 0x10) + 0x04) /* Chip Select x Lower Register */ +#define CSxA(x) __REG(IMX_WEIM_BASE + (cs * 0x10) + 0x08) /* Chip Select x Addition Register */ #define EIM __REG(IMX_WEIM_BASE + 0x60) /* WEIM Configuration Register */ #include "esdctl.h" @@ -252,4 +240,11 @@ #define IMX_CS4_BASE 0xD4000000 #define IMX_CS5_BASE 0xD6000000 +static inline void imx27_setup_weimcs(size_t cs, unsigned upper, unsigned lower, unsigned addional) +{ + CSxU(cs) = upper; + CSxL(cs) = lower; + CSxA(cs) = addional; +} + #endif /* _IMX27_REGS_H */ diff --git a/arch/arm/mach-imx/include/mach/imx51-regs.h b/arch/arm/mach-imx/include/mach/imx51-regs.h index c6d14cdc6b..90e81cb6ff 100644 --- a/arch/arm/mach-imx/include/mach/imx51-regs.h +++ b/arch/arm/mach-imx/include/mach/imx51-regs.h @@ -94,7 +94,7 @@ #define MX51_MIPI_HSC_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000DC000) #define MX51_ATA_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000E0000) #define MX51_SIM_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000E4000) -#define MX51_SSI3BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000E8000) +#define MX51_SSI3_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000E8000) #define MX51_MXC_FEC_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000EC000) #define MX51_TVE_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000F0000) #define MX51_VPU_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000F4000) diff --git a/arch/arm/mach-imx/include/mach/iomux-mx51.h b/arch/arm/mach-imx/include/mach/iomux-mx51.h index 908d1b2f96..872072edd5 100644 --- a/arch/arm/mach-imx/include/mach/iomux-mx51.h +++ b/arch/arm/mach-imx/include/mach/iomux-mx51.h @@ -151,7 +151,7 @@ #define MX51_PAD_NANDF_CS7__NANDF_CS7 IOMUX_PAD(0x534, 0x14C, 0, 0x0, 0, NO_PAD_CTRL) #define MX51_PAD_NANDF_CS7__FEC_TX_EN IOMUX_PAD(0x534, 0x14C, 1, 0x0, 0, MX51_FEC_PAD_CTRL) -#define MX51_PAD_NANDF_RDY_INT__NANDF_RDY_INT IOMUX_PAD(0x538, 0x150, 0, 0x0, 0, NO_PAD_CTRL) +#define MX51_PAD_NANDF_RDY_INT__NANDF_RDY_INT IOMUX_PAD(0x538, 0x150, 0, 0x938, 0, NO_PAD_CTRL) #define MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK IOMUX_PAD(0x538, 0x150, 1, 0x974, 0, MX51_FEC_PAD_CTRL) #define MX51_PAD_NANDF_D15__NANDF_D15 IOMUX_PAD(0x53C, 0x154, 0, 0x0, 0, NO_PAD_CTRL) diff --git a/arch/arm/mach-imx/speed-imx51.c b/arch/arm/mach-imx/speed-imx51.c index 643ad8f39b..84f4892740 100644 --- a/arch/arm/mach-imx/speed-imx51.c +++ b/arch/arm/mach-imx/speed-imx51.c @@ -115,7 +115,15 @@ unsigned long imx_get_uartclk(void) u32 reg, prediv, podf; unsigned long parent_rate; - parent_rate = pll2_sw_get_rate(); + reg = ccm_readl(MX5_CCM_CSCMR1); + reg &= MX5_CCM_CSCMR1_UART_CLK_SEL_MASK; + reg >>= MX5_CCM_CSCMR1_UART_CLK_SEL_OFFSET; + + parent_rate = get_rate_select(reg, + pll1_main_get_rate, + pll2_sw_get_rate, + pll3_sw_get_rate, + NULL); reg = ccm_readl(MX5_CCM_CSCDR1); prediv = ((reg & MX5_CCM_CSCDR1_UART_CLK_PRED_MASK) >> diff --git a/arch/arm/mach-mxs/include/mach/iomux-imx28.h b/arch/arm/mach-mxs/include/mach/iomux-imx28.h index 1557126592..ea1c3d8038 100644 --- a/arch/arm/mach-mxs/include/mach/iomux-imx28.h +++ b/arch/arm/mach-mxs/include/mach/iomux-imx28.h @@ -145,20 +145,22 @@ #define GPMI_D0_GPIO (FUNC(3) | PORTF(0, 0) | SE | VE | PE) /* Bank 1, GPIO pins 32 ... 63 */ - #define LCD_ENABLE (FUNC(0) | PORTF(1, 31) | SE | VE | BK) #define LCD_ENABLE_GPIO (FUNC(3) | PORTF(1, 31) | SE | VE | BK) - #define LCD_DOTCLK (FUNC(0) | PORTF(1, 30) | SE | VE | BK) - +#define LCD_DOTCLK_SAIF1_MCLK (FUNC(1) | PORTF(1, 30) | SE | VE | BK) +#define LCD_DOTCLK_ETM_TCLK (FUNC(2) | PORTF(1, 30) | SE | VE | BK) +#define LCD_DOTCLK_GPIO (FUNC(3) | PORTF(1, 30) | SE | VE | BK) #define LCD_HSYNC (FUNC(0) | PORTF(1, 29) | SE | VE | BK) - +#define LCD_HSYNC_SAIF1_SDATA1 (FUNC(1) | PORTF(1, 29) | SE | VE | BK) +#define LCD_HSYNC_ETM_TCTL (FUNC(2) | PORTF(1, 29) | SE | VE | BK) +#define LCD_HSYNC_GPIO (FUNC(3) | PORTF(1, 29) | SE | VE | BK) #define LCD_VSYNC (FUNC(0) | PORTF(1, 28) | SE | VE | BK) - +#define LCD_VSYNC_SAIF1_SDATA0 (FUNC(1) | PORTF(1, 28) | SE | VE | BK) +#define LCD_VSYNC_GPIO (FUNC(3) | PORTF(1, 28) | SE | VE | BK) #define LCD_CS (FUNC(0) | PORTF(1, 27) | SE | VE | BK) #define LCD_CS_LCD_ENABLE (FUNC(1) | PORTF(1, 27) | SE | VE | BK) #define LCD_CS_GPIO (FUNC(3) | PORTF(1, 27) | SE | VE | BK) - #define LCD_RS (FUNC(0) | PORTF(1, 26) | SE | VE | BK) #define LCD_RS_LCD_DOTCLK (FUNC(1) | PORTF(1, 26) | SE | VE | BK) #define LCD_RS_GPIO (FUNC(3) | PORTF(1, 26) | SE | VE | BK) @@ -170,23 +172,34 @@ #define LCD_RD_E_LCD_VSYNC (FUNC(1) | PORTF(1, 24) | SE | VE | BK) #define LCD_RD_E_ETM_TCTL (FUNC(2) | PORTF(1, 24) | SE | VE | BK) #define LCD_RD_E_GPIO (FUNC(3) | PORTF(1, 24) | SE | VE | BK) - #define LCD_D23 (FUNC(0) | PORTF(1, 23) | SE | VE | BK) - +#define LCD_D23_ENET1_1588_EVENT3_IN (FUNC(1) | PORTF(1, 23) | SE | VE | BK) +#define LCD_D23_ETM_DA0 (FUNC(2) | PORTF(1, 23) | SE | VE | BK) +#define LCD_D23_GPIO (FUNC(3) | PORTF(1, 23) | SE | VE | BK) #define LCD_D22 (FUNC(0) | PORTF(1, 22) | SE | VE | BK) - +#define LCD_D22_ENET1_1588_EVENT3_OUT (FUNC(1) | PORTF(1, 22) | SE | VE | BK) +#define LCD_D22_ETM_DA1 (FUNC(2) | PORTF(1, 22) | SE | VE | BK) +#define LCD_D22_GPIO (FUNC(3) | PORTF(1, 22) | SE | VE | BK) #define LCD_D21 (FUNC(0) | PORTF(1, 21) | SE | VE | BK) - +#define LCD_D21_ENET1_1588_EVENT2_IN (FUNC(1) | PORTF(1, 21) | SE | VE | BK) +#define LCD_D21_ETM_DA2 (FUNC(2) | PORTF(1, 21) | SE | VE | BK) +#define LCD_D21_GPIO (FUNC(3) | PORTF(1, 21) | SE | VE | BK) #define LCD_D20 (FUNC(0) | PORTF(1, 20) | SE | VE | BK) - +#define LCD_D20_ENET1_1588_EVENT2_OUT (FUNC(1) | PORTF(1, 20) | SE | VE | BK) +#define LCD_D20_ETM_DA3 (FUNC(2) | PORTF(1, 20) | SE | VE | BK) +#define LCD_D20_GPIO (FUNC(3) | PORTF(1, 20) | SE | VE | BK) #define LCD_D19 (FUNC(0) | PORTF(1, 19) | SE | VE | BK) - +#define LCD_D19_ETM_DA4 (FUNC(2) | PORTF(1, 19) | SE | VE | BK) +#define LCD_D19_GPIO (FUNC(3) | PORTF(1, 19) | SE | VE | BK) #define LCD_D18 (FUNC(0) | PORTF(1, 18) | SE | VE | BK) - +#define LCD_D18_ETM_DA5 (FUNC(2) | PORTF(1, 18) | SE | VE | BK) +#define LCD_D18_GPIO (FUNC(3) | PORTF(1, 18) | SE | VE | BK) #define LCD_D17 (FUNC(0) | PORTF(1, 17) | SE | VE | BK) - +#define LCD_D17_ETM_DA6 (FUNC(2) | PORTF(1, 17) | SE | VE | BK) +#define LCD_D17_GPIO (FUNC(3) | PORTF(1, 17) | SE | VE | BK) #define LCD_D16 (FUNC(0) | PORTF(1, 16) | SE | VE | BK) - +#define LCD_D16_ETM_DA7 (FUNC(2) | PORTF(1, 16) | SE | VE | BK) +#define LCD_D16_GPIO (FUNC(3) | PORTF(1, 16) | SE | VE | BK) #define LCD_D15 (FUNC(0) | PORTF(1, 15) | SE | VE | BK) #define LCD_D15_ETM_DA15 (FUNC(2) | PORTF(1, 15) | SE | VE | BK) #define LCD_D15_GPIO (FUNC(3) | PORTF(1, 15) | SE | VE | BK) @@ -240,12 +253,47 @@ #define LCD_D0_ETM_DA0 (FUNC(2) | PORTF(1, 0) | SE | VE | BK) #define LCD_D0_GPIO (FUNC(3) | PORTF(1, 0) | SE | VE | BK) -/* TODO */ - /* Bank 2, GPIO pins 64 ... 95 */ - -/* TODO */ - +#define SSP3_D3 (FUNC(0) | PORTF(2, 27) | SE | VE | PE) +#define SSP3_D3_AUART4_CTS (FUNC(1) | PORTF(2, 27) | SE | VE | PE) +#define SSP3_D3_ENET1_1588_EVENT1_IN (FUNC(2) | PORTF(2, 27) | SE | VE | PE) +#define SSP3_D3_GPIO (FUNC(3) | PORTF(2, 27) | SE | VE | PE) +#define SSP3_D0 (FUNC(0) | PORTF(2, 26) | SE | VE | PE) +#define SSP3_D0_AUART4_RTS (FUNC(1) | PORTF(2, 26) | SE | VE | PE) +#define SSP3_D0_ENET1_1588_EVENT1_OUT (FUNC(2) | PORTF(2, 26) | SE | VE | PE) +#define SSP3_D0_GPIO (FUNC(3) | PORTF(2, 26) | SE | VE | PE) +#define SSP3_CMD (FUNC(0) | PORTF(2, 25) | SE | VE | PE) +#define SSP3_CMD_AUART4_RX (FUNC(1) | PORTF(2, 25) | SE | VE | PE) +#define SSP3_CMD_ENET1_1588_EVENT0_IN (FUNC(2) | PORTF(2, 25) | SE | VE | PE) +#define SSP3_CMD_GPIO (FUNC(3) | PORTF(2, 25) | SE | VE | PE) +#define SSP3_SCK (FUNC(0) | PORTF(2, 24) | SE | VE | PE) +#define SSP3_SCK_AUART4_TX (FUNC(1) | PORTF(2, 24) | SE | VE | PE) +#define SSP3_SCK_ENET1_1588_EVENT0_OUT (FUNC(2) | PORTF(2, 24) | SE | VE | PE) +#define SSP3_SCK_GPIO (FUNC(3) | PORTF(2, 24) | SE | VE | PE) +#define SSP2_D5 (FUNC(0) | PORTF(2, 21) | SE | VE | PE) +#define SSP2_D5_SSP2_D2 (FUNC(1) | PORTF(2, 21) | SE | VE | PE) +#define SSP2_D5_USB0_OC (FUNC(2) | PORTF(2, 21) | SE | VE | PE) +#define SSP2_D5_GPIO (FUNC(3) | PORTF(2, 21) | SE | VE | PE) +#define SSP2_D4 (FUNC(0) | PORTF(2, 20) | SE | VE | PE) +#define SSP2_D4_SSP2_D1 (FUNC(1) | PORTF(2, 20) | SE | VE | PE) +#define SSP2_D4_USB1_OC (FUNC(2) | PORTF(2, 20) | SE | VE | PE) +#define SSP2_D4_GPIO (FUNC(3) | PORTF(2, 20) | SE | VE | PE) +#define SSP2_D3 (FUNC(0) | PORTF(2, 19) | SE | VE | PE) +#define SSP2_D3_AUART3_TX (FUNC(1) | PORTF(2, 19) | SE | VE | PE) +#define SSP2_D3_SAIF1_SDATA2 (FUNC(2) | PORTF(2, 19) | SE | VE | PE) +#define SSP2_D3_GPIO (FUNC(3) | PORTF(2, 19) | SE | VE | PE) +#define SSP2_D0 (FUNC(0) | PORTF(2, 18) | SE | VE | PE) +#define SSP2_D0_AUART3_RX (FUNC(1) | PORTF(2, 18) | SE | VE | PE) +#define SSP2_D0_SAIF1_SDATA1 (FUNC(2) | PORTF(2, 18) | SE | VE | PE) +#define SSP2_D0_GPIO (FUNC(3) | PORTF(2, 18) | SE | VE | PE) +#define SSP2_CMD (FUNC(0) | PORTF(2, 17) | SE | VE | PE) +#define SSP2_CMD_AUART2_TX (FUNC(1) | PORTF(2, 17) | SE | VE | PE) +#define SSP2_CMD_SAIF0_SDATA2 (FUNC(2) | PORTF(2, 17) | SE | VE | PE) +#define SSP2_CMD_GPIO (FUNC(3) | PORTF(2, 17) | SE | VE | PE) +#define SSP2_SCK (FUNC(0) | PORTF(2, 16) | SE | VE | PE) +#define SSP2_SCK_AUART2_RX (FUNC(1) | PORTF(2, 16) | SE | VE | PE) +#define SSP2_SCK_SAIF0_SDATA1 (FUNC(2) | PORTF(2, 16) | SE | VE | PE) +#define SSP2_SCK_GPIO (FUNC(3) | PORTF(2, 16) | SE | VE | PE) #define SSP1_D3 (FUNC(0) | PORTF(2, 15) | SE | VE | PE) #define SSP1_D3_SSP2_D7 (FUNC(1) | PORTF(2, 15) | SE | VE | PE) #define SSP1_D3_ENET_1588_EVENT3_IN (FUNC(2) | PORTF(4, 15) | SE | VE | PE) @@ -290,20 +338,52 @@ #define SSP0_D0_GPIO (FUNC(3) | PORTF(2, 0) | SE | VE | PE) /* Bank 3, GPIO pins 96 ... 127 */ - #define LCD_RESET (FUNC(0) | PORTF(3, 30)) #define LCD_RESET_LCD_VSYNC (FUNC(1) | PORTF(3, 30)) #define LCD_RESET_GPIO (FUNC(3) | PORTF(3, 30)) #define PWM4 (FUNC(0) | PORTF(3, 29)) #define PWM4_GPIO (FUNC(3) | PORTF(3, 29)) -#define PWM3 (FUNC(0) | PORTF(3 28)) +#define PWM3 (FUNC(0) | PORTF(3, 28)) #define PWM3_GPIO (FUNC(3) | PORTF(3, 28)) - +#define SPDIF_TX (FUNC(0) | PORTF(3, 27) | SE | VE | BK) +#define SPDIF_TX_ENET1_RX_ER (FUNC(2) | PORTF(3, 27) | SE | VE | BK) +#define SPDIF_TX_GPIO (FUNC(3) | PORTF(3, 27) | SE | VE | BK) +#define SAIF1_SDATA0 (FUNC(0) | PORTF(3, 26) | SE | VE | BK) +#define SAIF1_SDATA0_PWM7 (FUNC(1) | PORTF(3, 26) | SE | VE | BK) +#define SAIF1_SDATA0_SAIF0_SDATA1 (FUNC(2) | PORTF(3, 26) | SE | VE | BK) +#define SAIF1_SDATA0_GPIO (FUNC(3) | PORTF(3, 26) | SE | VE | BK) +#define I2C0_SDA (FUNC(0) | PORTF(3, 25) | SE | VE | BK) +#define I2C0_SDA_TIMROT_ROTARYB (FUNC(1) | PORTF(3, 25) | SE | VE | BK) +#define I2C0_SDA_DUART_TX (FUNC(2) | PORTF(3, 25) | SE | VE | BK) +#define I2C0_SDA_GPIO (FUNC(3) | PORTF(3, 25) | SE | VE | BK) +#define I2C0_SCL (FUNC(0) | PORTF(3, 24) | SE | VE | BK) +#define I2C0_SCL_TIMROT_ROTARYA (FUNC(1) | PORTF(3, 24) | SE | VE | BK) +#define I2C0_SCL_DUART_RX (FUNC(2) | PORTF(3, 24) | SE | VE | BK) +#define I2C0_SCL_GPIO (FUNC(3) | PORTF(3, 24) | SE | VE | BK) +#define SAIF0_SDATA0 (FUNC(0) | PORTF(3, 23) | SE | VE | BK) +#define SAIF0_SDATA0_PWM6 (FUNC(1) | PORTF(3, 23) | SE | VE | BK) +#define SAIF0_SDATA0_AUART4_TX (FUNC(2) | PORTF(3, 23) | SE | VE | BK) +#define SAIF0_SDATA0_GPIO (FUNC(3) | PORTF(3, 23) | SE | VE | BK) +#define SAIF0_BITCLK (FUNC(0) | PORTF(3, 22) | SE | VE | BK) +#define SAIF0_BITCLK_PWM5 (FUNC(1) | PORTF(3, 22) | SE | VE | BK) +#define SAIF0_BITCLK_AUART4_RX (FUNC(2) | PORTF(3, 22) | SE | VE | BK) +#define SAIF0_BITCLK_GPIO (FUNC(3) | PORTF(3, 22) | SE | VE | BK) +#define SAIF0_LRCLK (FUNC(0) | PORTF(3, 21) | SE | VE | BK) +#define SAIF0_LRCLK_PWM4 (FUNC(1) | PORTF(3, 21) | SE | VE | BK) +#define SAIF0_LRCLK_AUART4_RTS (FUNC(2) | PORTF(3, 21) | SE | VE | BK) +#define SAIF0_LRCLK_GPIO (FUNC(3) | PORTF(3, 21) | SE | VE | BK) +#define SAIF0_MCLK (FUNC(0) | PORTF(3, 20) | SE | VE | BK) +#define SAIF0_MCLK_PWM3 (FUNC(1) | PORTF(3, 20) | SE | VE | BK) +#define SAIF0_MCLK_AUART4_CTS (FUNC(2) | PORTF(3, 20) | SE | VE | BK) +#define SAIF0_MCLK_GPIO (FUNC(3) | PORTF(3, 20) | SE | VE | BK) #define PWM2 (FUNC(0) | PORTF(3, 18)) - +#define PWM2_USB0_ID (FUNC(1) | PORTF(3, 18)) +#define PWM2_USB1_OC (FUNC(2) | PORTF(3, 18)) +#define PWM2_GPIO (FUNC(3) | PORTF(3, 18)) #define PWM1 (FUNC(0) | PORTF(3, 17)) +#define PWM1_I2C1_SDA (FUNC(1) | PORTF(3, 17)) #define PWM1_DUART_TX (FUNC(2) | PORTF(3, 17)) - +#define PWM1_GPIO (FUNC(3) | PORTF(3, 17)) #define PWM0 (FUNC(0) | PORTF(3, 16)) #define PWM0_I2C1_SCL (FUNC(1) | PORTF(3, 16)) #define PWM0_DUART_RX (FUNC(2) | PORTF(3, 16)) @@ -374,16 +454,18 @@ #define AUART0_RX_GPIO (FUNC(3) | PORTF(3, 0) | SE | VE | BK) /* Bank 4, GPIO pins 128 ... 159 */ - #define JTAG_RTCK (FUNC(0) | PORTF(4, 20) | SE | VE | BK) #define JTAG_RTCK_GPIO (FUNC(3) | PORTF(4, 20) | SE | VE | BK) #define ENET_CLK (FUNC(0) | PORTF(4, 16) | SE | VE | BK) #define ENET_CLK_GPIO (FUNC(3) | PORTF(4, 16) | SE | VE | BK) - #define ENET0_CRS (FUNC(0) | PORTF(4, 15) | SE | VE | BK) - +#define ENET0_CRS_ENET1_RX_EN (FUNC(1) | PORTF(4, 15) | SE | VE | BK) +#define ENET0_CRS_ENET0_1588_EVENT3_IN (FUNC(2) | PORTF(4, 15) | SE | VE | BK) +#define ENET0_CRS_GPIO (FUNC(3) | PORTF(4, 15) | SE | VE | BK) #define ENET0_COL (FUNC(0) | PORTF(4, 14) | SE | VE | BK) - +#define ENET0_COL_ENET1_TX_EN (FUNC(1) | PORTF(4, 14) | SE | VE | BK) +#define ENET0_COL_1588_EVENT3_OUT (FUNC(2) | PORTF(4, 14) | SE | VE | BK) +#define ENET0_COL_GPIO (FUNC(3) | PORTF(4, 14) | SE | VE | BK) #define ENET0_RX_CLK (FUNC(0) | PORTF(4, 13) | SE | VE | BK) #define ENET0_RX_CLK_RX_ER (FUNC(1) | PORTF(4, 13) | SE | VE | BK) #define ENET0_RX_ENET0_1588_EVENT2_IN (FUNC(2) | PORTF(4, 13) | SE | VE | BK) @@ -392,36 +474,31 @@ #define ENET0_TXD3_ENET1_TXD1 (FUNC(1) | PORTF(4, 12) | SE | VE | BK) #define ENET0_TXD3_ENET0_1588_EVENT1_IN (FUNC(2) | PORTF(4, 12) | SE | VE | BK) #define ENET0_TXD3_GPIO (FUNC(3) | PORTF(4, 12) | SE | VE | BK) - #define ENET0_TXD2 (FUNC(0) | PORTF(4, 11) | SE | VE | BK) - +#define ENET0_TXD2_ENET1_TXD0 (FUNC(1) | PORTF(4, 11) | SE | VE | BK) +#define ENET0_TXD2_ENET0_1588_EVENT1_OUT (FUNC(2) | PORTF(4, 11) | SE | VE | BK) #define ENET0_TXD2_GPIO (FUNC(3) | PORTF(4, 11) | SE | VE | BK) - #define ENET0_RXD3 (FUNC(0) | PORTF(4, 10) | SE | VE | BK) #define ENET0_RXD3_ENET1_RXD1 (FUNC(1) | PORTF(4, 10) | SE | VE | BK) #define ENET0_RXD3_ENET0_1588_EVENT0_IN (FUNC(2) | PORTF(4, 10) | SE | VE | BK) #define ENET0_RXD3_GPIO (FUNC(3) | PORTF(4, 10) | SE | VE | BK) - #define ENET0_RXD2 (FUNC(0) | PORTF(4, 9) | SE | VE | BK) - +#define ENET0_RXD2_ENET1_RXD0 (FUNC(1) | PORTF(4, 9) | SE | VE | BK) +#define ENET0_RXD2_ENET0_1588_EVENT0_OUT (FUNC(2) | PORTF(4, 9) | SE | VE | BK) #define ENET0_RXD2_GPIO (FUNC(3) | PORTF(4, 9) | SE | VE | BK) - #define ENET0_TXD1 (FUNC(0) | PORTF(4, 8) | SE | VE | PE) - +#define ENET0_TXD1_GPMI_READY7 (FUNC(1) | PORTF(4, 8) | SE | VE | PE) #define ENET0_TXD1_GPIO (FUNC(3) | PORTF(4, 8) | SE | VE | PE) - #define ENET0_TXD0 (FUNC(0) | PORTF(4, 7) | SE | VE | PE) - +#define ENET0_TXD0_GPMI_READY6 (FUNC(1) | PORTF(4, 7) | SE | VE | PE) #define ENET0_TXD0_GPIO (FUNC(3) | PORTF(4, 7) | SE | VE | PE) - #define ENET0_TX_EN (FUNC(0) | PORTF(4, 6) | SE | VE | PE) - +#define ENET0_TX_EN_GPMI_READY5 (FUNC(1) | PORTF(4, 6) | SE | VE | PE) #define ENET0_TX_EN_GPIO (FUNC(3) | PORTF(4, 6) | SE | VE | PE) - #define ENET0_TX_CLK (FUNC(0) | PORTF(4, 5) | SE | VE | BK) - +#define ENET0_TX_CLK_HSADC_TRIGGER (FUNC(1) | PORTF(4, 5) | SE | VE | BK) +#define ENET0_TX_CLK_ENET0_1588_EVENT2_OUT (FUNC(2) | PORTF(4, 5) | SE | VE | BK) #define ENET0_TX_CLK_GPIO (FUNC(3) | PORTF(4, 5) | SE | VE | BK) - #define ENET0_RXD1 (FUNC(0) | PORTF(4, 4) | SE | VE | PE) #define ENET0_RXD1_GPMI_READY4 (FUNC(1) | PORTF(4, 4) | SE | VE | PE) #define ENET0_RXD1_GPIO (FUNC(3) | PORTF(4, 4) | SE | VE | PE) diff --git a/arch/arm/mach-mxs/iomux-imx.c b/arch/arm/mach-mxs/iomux-imx.c index 3161a5d3cc..6bcde035be 100644 --- a/arch/arm/mach-mxs/iomux-imx.c +++ b/arch/arm/mach-mxs/iomux-imx.c @@ -128,6 +128,12 @@ void imx_gpio_mode(uint32_t m) (GET_PULLUP(m) == 1 ? BIT_SET : BIT_CLR)); } + if (BK_PRESENT(m)) { + reg_offset = calc_pullup_reg(gpio_pin); + writel(0x1 << (gpio_pin % 32), IMX_IOMUXC_BASE + reg_offset + + (GET_BITKEEPER(m) == 1 ? BIT_SET : BIT_CLR)); + } + if (GET_FUNC(m) == IS_GPIO) { if (GET_GPIODIR(m) == 1) { /* first set the output value */ diff --git a/arch/arm/mach-omap/Kconfig b/arch/arm/mach-omap/Kconfig index f3db8f66ea..386c4845f1 100644 --- a/arch/arm/mach-omap/Kconfig +++ b/arch/arm/mach-omap/Kconfig @@ -103,6 +103,8 @@ config BOARDINFO default "Texas Instrument's Panda" if MACH_PANDA default "Phytec phyCORE pcm049" if MACH_PCM049 default "Phytec phyCARD-A-L1" if MACH_PCAAL1 + default "Phytec phyCARD-A-XL2" if MACH_PCAAXL2 + choice prompt "Select OMAP board" @@ -153,6 +155,14 @@ config MACH_PCAAL1 help Say Y here if you are using a phyCARD-A-L1 PCA-A-L1 +config MACH_PCAAXL2 + bool "Phytec phyCARD XL2" + select HAVE_NOSHELL + select MACH_HAS_LOWLEVEL_INIT + depends on ARCH_OMAP4 + help + Say Y here if you are using a phyCARD-A-XL1 PCA-A-XL1 + endchoice if MACH_OMAP3EVM diff --git a/arch/arm/mach-omap/devices-gpmc-nand.c b/arch/arm/mach-omap/devices-gpmc-nand.c index 197d4be418..54625ca9ab 100644 --- a/arch/arm/mach-omap/devices-gpmc-nand.c +++ b/arch/arm/mach-omap/devices-gpmc-nand.c @@ -4,7 +4,6 @@ * * FileName: arch/arm/boards/omap/devices-gpmc-nand.c * - * GPMC NAND Devices such as those from Micron, Samsung are listed here */ /* * (C) Copyright 2006-2008 @@ -39,35 +38,12 @@ #define GPMC_CONF1_VALx8 0x00000800 #define GPMC_CONF1_VALx16 0x00001800 -/* Set up the generic params */ - -/** GPMC timing for our nand device */ -static struct gpmc_config nand_cfg = { - .cfg = { - 0, /*CONF1 */ - 0x00141400, /*CONF2 */ - 0x00141400, /*CONF3 */ - 0x0F010F01, /*CONF4 */ - 0x010C1414, /*CONF5 */ -#ifdef CONFIG_ARCH_OMAP3 - /* Additional bits in OMAP3 */ - 0x1F040000 | -#endif - 0x00000A80, /*CONF6 */ - }, - - /* Nand: dont care about base address */ - .base = 0x28000000, - /* GPMC address map as small as possible */ - .size = GPMC_SIZE_16M, -}; /** NAND platform specific settings settings */ static struct gpmc_nand_platform_data nand_plat = { .cs = 0, .max_timeout = MSECOND, .wait_mon_pin = 0, - .priv = (void *)&nand_cfg, }; /** @@ -76,20 +52,21 @@ static struct gpmc_nand_platform_data nand_plat = { * @return success/fail based on device funtion */ int gpmc_generic_nand_devices_init(int cs, int width, - enum gpmc_ecc_mode eccmode) + enum gpmc_ecc_mode eccmode, struct gpmc_config *nand_cfg) { nand_plat.cs = cs; if (width == 16) - nand_cfg.cfg[0] = GPMC_CONF1_VALx16; + nand_cfg->cfg[0] = GPMC_CONF1_VALx16; else - nand_cfg.cfg[0] = GPMC_CONF1_VALx8; + nand_cfg->cfg[0] = GPMC_CONF1_VALx8; nand_plat.device_width = width; nand_plat.ecc_mode = eccmode; + nand_plat.priv = nand_cfg; /* Configure GPMC CS before register */ - gpmc_cs_config(nand_plat.cs, &nand_cfg); + gpmc_cs_config(nand_plat.cs, nand_cfg); add_generic_device("gpmc_nand", -1, NULL, OMAP_GPMC_BASE, 1024 * 4, IORESOURCE_MEM, &nand_plat); diff --git a/arch/arm/mach-omap/include/mach/gpmc_nand.h b/arch/arm/mach-omap/include/mach/gpmc_nand.h index 1bc52ffe00..b9c659d1a9 100644 --- a/arch/arm/mach-omap/include/mach/gpmc_nand.h +++ b/arch/arm/mach-omap/include/mach/gpmc_nand.h @@ -78,6 +78,10 @@ struct gpmc_nand_platform_data { #define NAND_WAITPOL_HIGH (1 << 0) #define NAND_WAITPOL_MASK (1 << 0) -int gpmc_generic_nand_devices_init(int cs, int width, enum gpmc_ecc_mode); +int gpmc_generic_nand_devices_init(int cs, int width, + enum gpmc_ecc_mode, struct gpmc_config *nand_cfg); + +extern struct gpmc_config omap3_nand_cfg; +extern struct gpmc_config omap4_nand_cfg; #endif /* __ASM_OMAP_NAND_GPMC_H */ diff --git a/arch/arm/mach-omap/include/mach/omap4-mux.h b/arch/arm/mach-omap/include/mach/omap4-mux.h index 019574b09f..d06beaa0f1 100644 --- a/arch/arm/mach-omap/include/mach/omap4-mux.h +++ b/arch/arm/mach-omap/include/mach/omap4-mux.h @@ -341,4 +341,6 @@ struct pad_conf_entry { #define CONTROL_SPARE_R 0x0618 #define CONTROL_SPARE_R_C0 0x061C +void omap4_do_set_mux(u32 base, struct pad_conf_entry const *array, int size); + #endif /* _MUX_OMAP4_H_ */ diff --git a/arch/arm/mach-omap/include/mach/omap4-silicon.h b/arch/arm/mach-omap/include/mach/omap4-silicon.h index db0dfdff3a..f8d3396f42 100644 --- a/arch/arm/mach-omap/include/mach/omap4-silicon.h +++ b/arch/arm/mach-omap/include/mach/omap4-silicon.h @@ -175,5 +175,6 @@ struct dpll_param; void omap4_ddr_init(const struct ddr_regs *, const struct dpll_param *); void omap4_power_i2c_send(u32); unsigned int omap4_revision(void); +noinline int omap4_scale_vcores(void); #endif diff --git a/arch/arm/mach-omap/omap3_generic.c b/arch/arm/mach-omap/omap3_generic.c index fe7363a59b..4ab265a9ba 100644 --- a/arch/arm/mach-omap/omap3_generic.c +++ b/arch/arm/mach-omap/omap3_generic.c @@ -499,3 +499,19 @@ enum omap_boot_src omap3_bootsrc(void) return OMAP_BOOTSRC_MMC1; return OMAP_BOOTSRC_UNKNOWN; } + +/* GPMC timing for OMAP3 nand device */ +const struct gpmc_config omap3_nand_cfg = { + .cfg = { + 0x00000000, /* CONF1 */ + 0x00141400, /* CONF2 */ + 0x00141400, /* CONF3 */ + 0x0F010F01, /* CONF4 */ + 0x010C1414, /* CONF5 */ + 0x1F040000 | + 0x00000A80, /* CONF6 */ + }, + /* GPMC address map as small as possible */ + .base = 0x28000000, + .size = GPMC_SIZE_16M, +}; diff --git a/arch/arm/mach-omap/omap4_generic.c b/arch/arm/mach-omap/omap4_generic.c index c6e46e6a36..db26a594ab 100644 --- a/arch/arm/mach-omap/omap4_generic.c +++ b/arch/arm/mach-omap/omap4_generic.c @@ -3,9 +3,11 @@ #include <mach/silicon.h> #include <io.h> #include <mach/omap4-silicon.h> +#include <mach/omap4-mux.h> #include <mach/omap4-clock.h> #include <mach/syslib.h> #include <mach/xload.h> +#include <mach/gpmc.h> void __noreturn reset_cpu(unsigned long addr) { @@ -419,3 +421,58 @@ enum omap_boot_src omap4_bootsrc(void) return OMAP_BOOTSRC_NAND; return OMAP_BOOTSRC_UNKNOWN; } + +#define I2C_SLAVE 0x12 + +noinline int omap4_scale_vcores(void) +{ + unsigned int rev = omap4_revision(); + + /* For VC bypass only VCOREx_CGF_FORCE is necessary and + * VCOREx_CFG_VOLTAGE changes can be discarded + */ + writel(0, OMAP44XX_PRM_VC_CFG_I2C_MODE); + writel(0x6026, OMAP44XX_PRM_VC_CFG_I2C_CLK); + + /* set VCORE1 force VSEL */ + omap4_power_i2c_send((0x3A55 << 8) | I2C_SLAVE); + + /* FIXME: set VCORE2 force VSEL, Check the reset value */ + omap4_power_i2c_send((0x295B << 8) | I2C_SLAVE); + + /* set VCORE3 force VSEL */ + switch (rev) { + case OMAP4430_ES2_0: + omap4_power_i2c_send((0x2961 << 8) | I2C_SLAVE); + break; + case OMAP4430_ES2_1: + omap4_power_i2c_send((0x2A61 << 8) | I2C_SLAVE); + break; + } + + return 0; +} + +void omap4_do_set_mux(u32 base, struct pad_conf_entry const *array, int size) +{ + int i; + struct pad_conf_entry *pad = (struct pad_conf_entry *) array; + + for (i = 0; i < size; i++, pad++) + writew(pad->val, base + pad->offset); +} + +/* GPMC timing for OMAP4 nand device */ +const struct gpmc_config omap4_nand_cfg = { + .cfg = { + 0x00000800, /* CONF1 */ + 0x00050500, /* CONF2 */ + 0x00040400, /* CONF3 */ + 0x03000300, /* CONF4 */ + 0x00050808, /* CONF5 */ + 0x00000000, /* CONF6 */ + }, + /* GPMC address map as small as possible */ + .base = 0x28000000, + .size = GPMC_SIZE_16M, +}; diff --git a/arch/openrisc/boards/generic/env/config b/arch/openrisc/boards/generic/env/config index 9dee8d98b4..4027f2775f 100644 --- a/arch/openrisc/boards/generic/env/config +++ b/arch/openrisc/boards/generic/env/config @@ -5,7 +5,6 @@ kernel=flash root=flash kernel_loc=nor -kernelimage_type=uimage # use 'dhcp' todo dhcp in barebox and in kernel ip=none diff --git a/commands/Kconfig b/commands/Kconfig index e332a85f1f..7a8811e92f 100644 --- a/commands/Kconfig +++ b/commands/Kconfig @@ -181,6 +181,16 @@ config CMD_NANDTEST select PARTITION_NEED_MTD prompt "nandtest" +config CMD_AUTOMOUNT + tristate + select FS_AUTOMOUNT + prompt "automount" + help + automount allows it to automatically execute a script when a certain + directory is accessed for the first time. The script should then make + this directory available (discover USB devices, bring network interface + up and finally mount the filesystem). + endmenu menu "console " diff --git a/commands/Makefile b/commands/Makefile index 31442b5ad4..f02b5cac3a 100644 --- a/commands/Makefile +++ b/commands/Makefile @@ -64,3 +64,4 @@ obj-$(CONFIG_CMD_OFTREE) += oftree.o obj-$(CONFIG_CMD_MAGICVAR) += magicvar.o obj-$(CONFIG_CMD_IOMEM) += iomem.o obj-$(CONFIG_CMD_LINUX_EXEC) += linux_exec.o +obj-$(CONFIG_CMD_AUTOMOUNT) += automount.o diff --git a/commands/automount.c b/commands/automount.c new file mode 100644 index 0000000000..5fc68f3cb4 --- /dev/null +++ b/commands/automount.c @@ -0,0 +1,66 @@ +/* + * automount.c - automount devices + * + * Copyright (c) 2012 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation. + */ +#include <common.h> +#include <command.h> +#include <fs.h> +#include <errno.h> +#include <getopt.h> + +static int do_automount(int argc, char *argv[]) +{ + int opt, ret; + + while ((opt = getopt(argc, argv, "lr:")) > 0) { + switch (opt) { + case 'l': + automount_print(); + return 0; + case 'r': + automount_remove(optarg); + return 0; + } + } + + if (argc != 3) + return COMMAND_ERROR_USAGE; + + ret = automount_add(argv[1], argv[2]); + if (ret) + printf("adding automountpoint failed: %s\n", + strerror(-ret)); + + return ret ? 1 : 0; +} + +BAREBOX_CMD_HELP_START(automount) +BAREBOX_CMD_HELP_USAGE("automount [OPTIONS] <PATH> <cmd>\n") +BAREBOX_CMD_HELP_SHORT("execute <cmd> when <PATH> is first accessed\n") +BAREBOX_CMD_HELP_OPT("-l", "List currently registered automountpoints\n") +BAREBOX_CMD_HELP_OPT("-r <PATH>", "remove an automountpoint\n") +BAREBOX_CMD_HELP_END + +BAREBOX_CMD_START(automount) + .cmd = do_automount, + .usage = "automount [OPTIONS] <PATH> <cmd>\n", + BAREBOX_CMD_HELP(cmd_automount_help) +BAREBOX_CMD_END + diff --git a/commands/mount.c b/commands/mount.c index dd1ae6305d..b32faef709 100644 --- a/commands/mount.c +++ b/commands/mount.c @@ -33,14 +33,14 @@ static int do_mount(int argc, char *argv[]) { int ret = 0; - struct mtab_entry *entry; + struct fs_device_d *fsdev; if (argc == 1) { - for_each_mtab_entry(entry) { + for_each_fs_device(fsdev) { printf("%s on %s type %s\n", - entry->parent_device ? dev_name(entry->parent_device) : "none", - entry->path, - entry->dev->name); + fsdev->parent_device ? dev_name(fsdev->parent_device) : "none", + fsdev->path, + fsdev->dev.name); } return 0; } diff --git a/commands/partition.c b/commands/partition.c index acd1609304..17e367847c 100644 --- a/commands/partition.c +++ b/commands/partition.c @@ -40,16 +40,19 @@ #include <fs.h> #include <linux/stat.h> #include <libgen.h> +#include <getopt.h> #define SIZE_REMAINING ((ulong)-1) +#define PART_ADD_DEVNAME (1 << 0) + static int mtd_part_do_parse_one(char *devname, const char *partstr, char **endp, unsigned long *offset, - off_t devsize, size_t *retsize) + off_t devsize, size_t *retsize, unsigned int pflags) { ulong size; char *end; - char buf[PATH_MAX]; + char buf[PATH_MAX] = {}; unsigned long flags = 0; int ret; @@ -78,7 +81,8 @@ static int mtd_part_do_parse_one(char *devname, const char *partstr, return -EINVAL; } - sprintf(buf, "%s.", devname); + if (pflags & PART_ADD_DEVNAME) + sprintf(buf, "%s.", devname); memcpy(buf + strlen(buf), partstr, end - partstr); end++; @@ -114,24 +118,35 @@ static int do_addpart(int argc, char *argv[]) unsigned long offset = 0; off_t devsize; struct stat s; + int opt; + unsigned int flags = PART_ADD_DEVNAME; + + while ((opt = getopt(argc, argv, "n")) > 0) { + switch (opt) { + case 'n': + flags &= ~PART_ADD_DEVNAME; + break; + } + } - if (argc != 3) + if (argc != optind + 2) return COMMAND_ERROR_USAGE; - if (stat(argv[1], &s)) { + if (stat(argv[optind], &s)) { perror("addpart"); return 1; } devsize = s.st_size; - devname = basename(argv[1]); + devname = basename(argv[optind]); - endp = argv[2]; + endp = argv[optind + 1]; while (1) { size_t size = 0; - if (mtd_part_do_parse_one(devname, endp, &endp, &offset, devsize, &size)) + if (mtd_part_do_parse_one(devname, endp, &endp, &offset, + devsize, &size, flags)) return 1; offset += size; @@ -152,6 +167,8 @@ static int do_addpart(int argc, char *argv[]) BAREBOX_CMD_HELP_START(addpart) BAREBOX_CMD_HELP_USAGE("addpart <device> <part_desc>\n") BAREBOX_CMD_HELP_SHORT("Add a partition description to a device.\n") +BAREBOX_CMD_HELP_OPT ("-n", "no prefix. Do not prepend the device name as prefix before the partition name\n") +BAREBOX_CMD_HELP_OPT ("<device>", "device being worked on\n") BAREBOX_CMD_HELP_OPT ("<device>", "device being worked on\n") BAREBOX_CMD_HELP_OPT ("<part_desc>", "size1[@offset1](name1)[ro],size2[@offset2](name2)[ro],...\n") BAREBOX_CMD_HELP_END diff --git a/commands/usb.c b/commands/usb.c index 6605e031a7..e28afd051b 100644 --- a/commands/usb.c +++ b/commands/usb.c @@ -22,17 +22,35 @@ #include <common.h> #include <command.h> #include <usb/usb.h> +#include <getopt.h> + +static int scanned; static int do_usb(int argc, char *argv[]) { - usb_rescan(); + int opt; + + while ((opt = getopt(argc, argv, "f")) > 0) { + switch (opt) { + case 'f': + scanned = 0; + break; + } + } + + if (!scanned) { + usb_rescan(); + scanned = 1; + } return 0; } -static const __maybe_unused char cmd_usb_help[] = -"Usage: usb\n" -"(re-)detect USB devices\n"; +BAREBOX_CMD_HELP_START(usb) +BAREBOX_CMD_HELP_USAGE("usb [-f]\n") +BAREBOX_CMD_HELP_SHORT("Scan for USB devices.\n") +BAREBOX_CMD_HELP_OPT("-f", "force. Rescan if if if have scanned once\n") +BAREBOX_CMD_HELP_END BAREBOX_CMD_START(usb) .cmd = do_usb, diff --git a/common/hush.c b/common/hush.c index 1dae0e82cc..053d9a583e 100644 --- a/common/hush.c +++ b/common/hush.c @@ -1678,10 +1678,25 @@ BAREBOX_CMD_END static int do_source(int argc, char *argv[]) { + char *path; + int ret; + if (argc < 2) return COMMAND_ERROR_USAGE; - return source_script(argv[1], argc - 1, argv + 1); + if (strchr(argv[1], '/')) { + path = xstrdup(argv[1]); + } else { + path = find_execable(argv[1]); + if (!path) + return 1; + } + + ret = source_script(path, argc - 1, argv + 1); + + free(path); + + return ret; } static const char *source_aliases[] = { ".", NULL}; diff --git a/defaultenv/bin/_boot_help b/defaultenv/bin/_boot_help index e7f7f16f1f..7c964441b8 100644 --- a/defaultenv/bin/_boot_help +++ b/defaultenv/bin/_boot_help @@ -5,7 +5,7 @@ echo "" echo "options" echo " - kernel nand, nor, nfs, tftp, disk" echo " - rootfs nand, nor, net, disk" -echo " - ip dhcp, none, empty" +echo " - ip dhcp, dhcp-barebox none, empty" echo "" echo "mode option" echo " mode kernel rootfs" @@ -15,4 +15,10 @@ echo " nfs nfs net" echo " tftp fttp net" echo " disk disk disk" echo "" +echo "ip option" +echo " dhcp barebox and kernel will use DHCP" +echo " dhcp-barebox barebox will use DHCP and pass the result to the kernel" +echo " none do not pass ip parameter to the kernel and set it to none" +echo " empty pass ip parameter to the kernel" +echo "" echo "default mode are used from the /env/config" diff --git a/defaultenv/bin/boot b/defaultenv/bin/boot index d37eca86a5..ba04373049 100644 --- a/defaultenv/bin/boot +++ b/defaultenv/bin/boot @@ -39,7 +39,19 @@ elif [ x$mode = xdisk ]; then kernel_loc=disk fi -if [ x$ip = xdhcp ]; then +if [ x$ip = xdhcp -o x$ip = "xdhcp-barebox" ]; then + if [ x$kernel_loc = xnfs -o x$kernel_loc = xtftp ]; then + dhcp + if [ x$rootpath != x ]; then + nfsroot=$rootpath + fi + if [ x$bootfile != x ]; then + kernelimage=$bootfile + fi + fi +fi + +if [ x$ip = xdhcp -o ]; then bootargs="$bootargs ip=dhcp" elif [ x$ip = xnone ]; then bootargs="$bootargs ip=none" @@ -89,9 +101,6 @@ if [ -n $mtdparts ]; then fi if [ x$kernel_loc = xnfs -o x$kernel_loc = xtftp ]; then - if [ x$ip = xdhcp ]; then - dhcp - fi kdev=/image $kernel_loc $kernelimage $kdev || exit 1 elif [ x$kernel_loc = xnor ]; then diff --git a/defaultenv/config b/defaultenv/config index 98662735e1..63fc059639 100644 --- a/defaultenv/config +++ b/defaultenv/config @@ -9,6 +9,7 @@ machine=FIXME # use 'dhcp' to do dhcp in barebox and in kernel # use 'none' if you want to skip kernel ip autoconfiguration ip=dhcp +dhcp_vendor_id=barebox # or set your networking parameters here #eth0.ipaddr=a.b.c.d diff --git a/drivers/base/resource.c b/drivers/base/resource.c index d2f7a07763..b31c7d7e1a 100644 --- a/drivers/base/resource.c +++ b/drivers/base/resource.c @@ -121,3 +121,36 @@ struct device_d *add_usb_ehci_device(int id, resource_size_t hccr, } EXPORT_SYMBOL(add_usb_ehci_device); #endif + +#ifdef CONFIG_DRIVER_NET_KS8851_MLL +struct device_d *add_ks8851_device(int id, resource_size_t addr, + resource_size_t addr_cmd, int flags, void *pdata) +{ + struct resource *res; + resource_size_t size; + + switch (flags) { + case IORESOURCE_MEM_16BIT: + size = 2; + break; + case IORESOURCE_MEM_8BIT: + size = 1; + break; + default: + printf("ks8851: memory width flag missing\n"); + return NULL; + } + + res = xzalloc(sizeof(struct resource) * 2); + + res[0].start = addr; + res[0].size = size; + res[0].flags = IORESOURCE_MEM | flags; + res[1].start = addr_cmd; + res[1].size = size; + res[1].flags = IORESOURCE_MEM | flags; + + return add_generic_device_res("ks8851_mll", id, res, 2, pdata); +} +EXPORT_SYMBOL(add_ks8851_device); +#endif diff --git a/drivers/mci/imx-esdhc.c b/drivers/mci/imx-esdhc.c index c6f2d5c489..6d0883c68b 100644 --- a/drivers/mci/imx-esdhc.c +++ b/drivers/mci/imx-esdhc.c @@ -548,8 +548,6 @@ static int fsl_esdhc_probe(struct device_d *dev) host->mci.init = esdhc_init; host->mci.hw_dev = dev; - host->mci.voltages = MMC_VDD_32_33 | MMC_VDD_33_34; - host->mci.f_min = imx_get_mmcclk() >> 12; if (host->mci.f_min < 200000) host->mci.f_min = 200000; diff --git a/drivers/mfd/mc13892.c b/drivers/mfd/mc13892.c index b2cc91133c..cfc78c2df4 100644 --- a/drivers/mfd/mc13892.c +++ b/drivers/mfd/mc13892.c @@ -237,7 +237,7 @@ static int mc13893_query_revision(struct mc13892 *mc13892) char *revstr; int rev, i; - mc13892_reg_read(mc13892, 7, &rev_id); + mc13892_reg_read(mc13892, MC13892_REG_IDENTIFICATION, &rev_id); for (i = 0; i < ARRAY_SIZE(mc13892_revisions); i++) if ((rev_id & 0x1f) == mc13892_revisions[i].rev_id) diff --git a/drivers/mtd/devices/docg3.c b/drivers/mtd/devices/docg3.c index 88d707c828..7a40908828 100644 --- a/drivers/mtd/devices/docg3.c +++ b/drivers/mtd/devices/docg3.c @@ -21,6 +21,7 @@ #include <driver.h> #include <errno.h> #include <malloc.h> +#include <clock.h> #include <io.h> #include <linux/kernel.h> #include <linux/mtd/mtd.h> @@ -780,9 +781,9 @@ static int doc_get_op_status(struct docg3 *docg3) static int doc_write_erase_wait_status(struct docg3 *docg3) { int status, ret = 0; + uint64_t start = get_time_ns(); - if (!doc_is_ready(docg3)) - mdelay(3000); + while (!is_timeout(start, 3000 * MSECOND) && !doc_is_ready(docg3)); if (!doc_is_ready(docg3)) { doc_dbg("Timeout reached and the chip is still not ready\n"); ret = -EAGAIN; diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c index 0533759235..96624a1c98 100644 --- a/drivers/mtd/nand/atmel_nand.c +++ b/drivers/mtd/nand/atmel_nand.c @@ -407,6 +407,12 @@ static int __init atmel_nand_probe(struct device_d *dev) } } + if (host->board->on_flash_bbt) { + printk(KERN_INFO "atmel_nand: Use On Flash BBT\n"); + nand_chip->options |= NAND_USE_FLASH_BBT; + } + + /* first scan to find the device and get the page size */ if (nand_scan_ident(mtd, 1)) { res = -ENXIO; diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index b236d17e2e..172cc39080 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -59,6 +59,7 @@ config DRIVER_NET_NETX config DRIVER_NET_AT91_ETHER bool "at91 ethernet driver" depends on HAS_AT91_ETHER + select MIIDEV config DRIVER_NET_MPC5200 bool "MPC5200 Ethernet driver" @@ -100,6 +101,13 @@ config TSE_USE_DEDICATED_DESC_MEM reserved with a malloc but directly mapped to the memory address (defined in config.h) +config DRIVER_NET_KS8851_MLL + bool "ks8851 mll ethernet driver" + select MIIDEV + help + This option enables support for the Micrel KS8851 MLL + ethernet chip. + source "drivers/net/usb/Kconfig" endmenu diff --git a/drivers/net/Makefile b/drivers/net/Makefile index a84d3dc8d5..34dbee9e13 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -12,3 +12,4 @@ obj-$(CONFIG_DRIVER_NET_TAP) += tap.o obj-$(CONFIG_MIIDEV) += miidev.o obj-$(CONFIG_NET_USB) += usb/ obj-$(CONFIG_DRIVER_NET_TSE) += altera_tse.o +obj-$(CONFIG_DRIVER_NET_KS8851_MLL) += ks8851_mll.o diff --git a/drivers/net/at91_ether.c b/drivers/net/at91_ether.c index 8d0b43b9e5..3592141fc6 100644 --- a/drivers/net/at91_ether.c +++ b/drivers/net/at91_ether.c @@ -1,4 +1,6 @@ /* + * Copyright (C) 2009-2012 Jean-Christophe PLAGNIOL-VILLARD <plagnio@jcrosoft.com> + * * (C) Copyright 2003 * Author : Hamid Ikdoumi (Atmel) * @@ -21,325 +23,354 @@ * MA 02111-1307 USA */ -#include <at91rm9200_net.h> -#include <init.h> +#include <common.h> #include <net.h> -#include <miidev.h> +#include <clock.h> #include <malloc.h> #include <driver.h> +#include <xfuncs.h> +#include <init.h> +#include <miidev.h> +#include <asm/io.h> +#include <mach/hardware.h> +#include <mach/at91rm9200_emac.h> +#include <mach/board.h> +#include <generated/mach-types.h> +#include <linux/clk.h> +#include <linux/mii.h> +#include <errno.h> +#include <asm/mmu.h> + +#include "at91_ether.h" + +#define SPEED_100 1 +#define DUPLEX_FULL 1 + +struct ether_device { + struct eth_device netdev; + struct mii_device miidev; + struct rbf_t *rbfp; + struct rbf_t *rbfdt; + unsigned char *rbf_framebuf; +}; +#define to_ether(_nd) container_of(_nd, struct ether_device, netdev) -/* ----- Ethernet Buffer definitions ----- */ - -typedef struct { - unsigned long addr, size; -} rbf_t; - -#define RBF_ADDR 0xfffffffc -#define RBF_OWNER (1<<0) -#define RBF_WRAP (1<<1) -#define RBF_BROADCAST (1<<31) -#define RBF_MULTICAST (1<<30) -#define RBF_UNICAST (1<<29) -#define RBF_EXTERNAL (1<<28) -#define RBF_UNKOWN (1<<27) -#define RBF_SIZE 0x07ff -#define RBF_LOCAL4 (1<<26) -#define RBF_LOCAL3 (1<<25) -#define RBF_LOCAL2 (1<<24) -#define RBF_LOCAL1 (1<<23) - -#define RBF_FRAMEMAX 64 -#define RBF_FRAMELEN 0x600 - -/* alignment as per Errata #11 (64 bytes) is insufficient! */ -rbf_t rbfdt[RBF_FRAMEMAX] __attribute((aligned(512))); -rbf_t *rbfp; - -unsigned char rbf_framebuf[RBF_FRAMEMAX][RBF_FRAMELEN] __attribute((aligned(4))); - -/* structure to interface the PHY */ -AT91S_PhyOps PhyOps; - -AT91PS_EMAC p_mac; - -/*********** EMAC Phy layer Management functions *************************/ /* - * Name: - * at91rm9200_EmacEnableMDIO - * Description: - * Enables the MDIO bit in MAC control register - * Arguments: - * p_mac - pointer to struct AT91S_EMAC - * Return value: - * none + * Enable the MDIO bit in MAC control register + * When not called from an interrupt-handler, access to the PHY must be + * protected by a spinlock. */ -void at91rm9200_EmacEnableMDIO (AT91PS_EMAC p_mac) +static void enable_mdi(void) { - /* Mac CTRL reg set for MDIO enable */ - p_mac->EMAC_CTL |= AT91C_EMAC_MPE; /* Management port enable */ + unsigned long ctl; + + ctl = at91_emac_read(AT91_EMAC_CTL); + at91_emac_write(AT91_EMAC_CTL, ctl | AT91_EMAC_MPE); /* enable management port */ } /* - * Name: - * at91rm9200_EmacDisableMDIO - * Description: - * Disables the MDIO bit in MAC control register - * Arguments: - * p_mac - pointer to struct AT91S_EMAC - * Return value: - * none + * Disable the MDIO bit in the MAC control register */ -void at91rm9200_EmacDisableMDIO (AT91PS_EMAC p_mac) +static void disable_mdi(void) { - /* Mac CTRL reg set for MDIO disable */ - p_mac->EMAC_CTL &= ~AT91C_EMAC_MPE; /* Management port disable */ -} + unsigned long ctl; + ctl = at91_emac_read(AT91_EMAC_CTL); + at91_emac_write(AT91_EMAC_CTL, ctl & ~AT91_EMAC_MPE); /* disable management port */ +} /* - * Name: - * at91rm9200_EmacReadPhy - * Description: - * Reads data from the PHY register - * Arguments: - * dev - pointer to struct net_device - * RegisterAddress - unsigned char - * pInput - pointer to value read from register - * Return value: - * TRUE - if data read successfully + * Wait until the PHY operation is complete. */ -UCHAR at91rm9200_EmacReadPhy (AT91PS_EMAC p_mac, - unsigned char RegisterAddress, - unsigned short *pInput) +static inline int at91_phy_wait(void) { - p_mac->EMAC_MAN = (AT91C_EMAC_HIGH & ~AT91C_EMAC_LOW) | - (AT91C_EMAC_RW_R) | - (RegisterAddress << 18) | - (AT91C_EMAC_CODE_802_3); + uint64_t start; - udelay (10000); + start = get_time_ns(); - *pInput = (unsigned short) p_mac->EMAC_MAN; + do { + if (is_timeout(start, 2 * MSECOND)) { + puts("at91_ether: MIO timeout\n"); + return -1; + } + } while (!(at91_emac_read(AT91_EMAC_SR) & AT91_EMAC_SR_IDLE)); - return TRUE; + return 0; } - -/* - * Name: - * at91rm9200_EmacWritePhy - * Description: - * Writes data to the PHY register - * Arguments: - * dev - pointer to struct net_device - * RegisterAddress - unsigned char - * pOutput - pointer to value to be written in the register - * Return value: - * TRUE - if data read successfully - */ -UCHAR at91rm9200_EmacWritePhy (AT91PS_EMAC p_mac, - unsigned char RegisterAddress, - unsigned short *pOutput) +static int at91_ether_mii_read(struct mii_device *dev, int addr, int reg) { - p_mac->EMAC_MAN = (AT91C_EMAC_HIGH & ~AT91C_EMAC_LOW) | - AT91C_EMAC_CODE_802_3 | AT91C_EMAC_RW_W | - (RegisterAddress << 18) | *pOutput; + int value; + + enable_mdi(); + + at91_emac_write(AT91_EMAC_MAN, AT91_EMAC_MAN_802_3 | AT91_EMAC_RW_R + | ((addr & 0x1f) << 23) | (reg << 18)); + + /* Wait until IDLE bit in Network Status register is cleared */ + value = at91_phy_wait(); + if (value < 0) + goto out; + + value = at91_emac_read(AT91_EMAC_MAN) & AT91_EMAC_DATA; - udelay (10000); +out: + disable_mdi(); - return TRUE; + return value; } -static int at91rm9200_eth_open (struct eth_device *edev) +static int at91_ether_mii_write(struct mii_device *dev, int addr, int reg, int val) { int ret; - at91rm9200_GetPhyInterface (& PhyOps); + enable_mdi(); + at91_emac_write(AT91_EMAC_MAN, AT91_EMAC_MAN_802_3 | AT91_EMAC_RW_W + | ((addr & 0x1f) << 23) | (reg << 18) | (val & AT91_EMAC_DATA)); - if (!PhyOps.IsPhyConnected (p_mac)) - printf ("PHY not connected!!\n\r"); + /* Wait until IDLE bit in Network Status register is cleared */ + ret = at91_phy_wait(); - /* MII management start from here */ - if (!(p_mac->EMAC_SR & AT91C_EMAC_LINK)) { - if (!(ret = PhyOps.Init (p_mac))) { - printf ("MAC: error during MII initialization\n"); - return 0; - } + disable_mdi(); + + return ret; +} + +static void update_linkspeed(struct mii_device *dev, int speed, int duplex) +{ + unsigned int mac_cfg; + + /* Update the MAC */ + mac_cfg = at91_emac_read(AT91_EMAC_CFG) & ~(AT91_EMAC_SPD | AT91_EMAC_FD); + if (speed == SPEED_100) { + if (duplex == DUPLEX_FULL) /* 100 Full Duplex */ + mac_cfg |= AT91_EMAC_SPD | AT91_EMAC_FD; + else /* 100 Half Duplex */ + mac_cfg |= AT91_EMAC_SPD; } else { - printf ("No link\n\r"); - return 0; + if (duplex == DUPLEX_FULL) /* 10 Full Duplex */ + mac_cfg |= AT91_EMAC_FD; + else {} /* 10 Half Duplex */ + } + at91_emac_write(AT91_EMAC_CFG, mac_cfg); +} + +static int at91_ether_open(struct eth_device *edev) +{ + int i; + unsigned long ctl; + struct ether_device *etdev = to_ether(edev); + unsigned char *rbf_framebuf = etdev->rbf_framebuf; + + miidev_wait_aneg(&etdev->miidev); + miidev_print_status(&etdev->miidev); + + update_linkspeed(&etdev->miidev, SPEED_100, DUPLEX_FULL); + + /* Clear internal statistics */ + ctl = at91_emac_read(AT91_EMAC_CTL); + at91_emac_write(AT91_EMAC_CTL, ctl | AT91_EMAC_CSR); + + /* Init Ethernet buffers */ + etdev->rbfp = etdev->rbfdt; + for (i = 0; i < MAX_RX_DESCR; i++) { + etdev->rbfp[i].addr = (unsigned long)rbf_framebuf; + etdev->rbfp[i].size = 0; + rbf_framebuf += MAX_RBUFF_SZ; } + etdev->rbfp[i - 1].addr |= RBF_WRAP; + + /* Program address of descriptor list in Rx Buffer Queue register */ + at91_emac_write(AT91_EMAC_RBQP, (unsigned long) etdev->rbfdt); + + ctl = at91_emac_read(AT91_EMAC_RSR); + ctl &= ~(AT91_EMAC_RSR_OVR | AT91_EMAC_RSR_REC | AT91_EMAC_RSR_BNA); + at91_emac_write(AT91_EMAC_RSR, ctl); + + ctl = at91_emac_read(AT91_EMAC_CFG); + ctl |= AT91_EMAC_CAF | AT91_EMAC_NBC; + at91_emac_write(AT91_EMAC_CFG, ctl); + + /* Enable Receive and Transmit */ + ctl = at91_emac_read(AT91_EMAC_CTL); + ctl |= AT91_EMAC_RE | AT91_EMAC_TE; + at91_emac_write(AT91_EMAC_CTL, ctl); + return 0; } -static int at91rm9200_eth_send (struct eth_device *edev, volatile void *packet, int length) +static int at91_ether_send(struct eth_device *edev, void *packet, int length) { - while (!(p_mac->EMAC_TSR & AT91C_EMAC_BNQ)); - p_mac->EMAC_TAR = (long) packet; - p_mac->EMAC_TCR = length; - while (p_mac->EMAC_TCR & 0x7ff); - p_mac->EMAC_TSR |= AT91C_EMAC_COMP; + while (!(at91_emac_read(AT91_EMAC_TSR) & AT91_EMAC_TSR_BNQ)); + + dma_flush_range((ulong) packet, (ulong)packet + length); + /* Set address of the data in the Transmit Address register */ + at91_emac_write(AT91_EMAC_TAR, (unsigned long) packet); + /* Set length of the packet in the Transmit Control register */ + at91_emac_write(AT91_EMAC_TCR, length); + + while (at91_emac_read(AT91_EMAC_TCR) & 0x7ff); + + at91_emac_write(AT91_EMAC_TSR, + at91_emac_read(AT91_EMAC_TSR) | AT91_EMAC_TSR_COMP); + return 0; } -static int at91rm9200_eth_rx (struct eth_device *edev) +static int at91_ether_rx(struct eth_device *edev) { + struct ether_device *etdev = to_ether(edev); int size; + struct rbf_t *rbfp = etdev->rbfp; if (!(rbfp->addr & RBF_OWNER)) return 0; size = rbfp->size & RBF_SIZE; - net_receive((volatile uchar *) (rbfp->addr & RBF_ADDR), size); + + net_receive((unsigned char *)(rbfp->addr & RBF_ADDR), size); rbfp->addr &= ~RBF_OWNER; if (rbfp->addr & RBF_WRAP) - rbfp = &rbfdt[0]; + etdev->rbfp = etdev->rbfdt; else - rbfp++; + etdev->rbfp++; - p_mac->EMAC_RSR |= AT91C_EMAC_REC; + at91_emac_write(AT91_EMAC_RSR, + at91_emac_read(AT91_EMAC_RSR) | AT91_EMAC_RSR_REC); return size; } -static void at91rm9200_eth_halt (struct eth_device *edev) +static void at91_ether_halt (struct eth_device *edev) { -}; + unsigned long ctl; -#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII) -int at91rm9200_miidev_read(char *devname, unsigned char addr, - unsigned char reg, unsigned short * value) -{ - at91rm9200_EmacEnableMDIO (p_mac); - at91rm9200_EmacReadPhy (p_mac, reg, value); - at91rm9200_EmacDisableMDIO (p_mac); - return 0; -} - -int at91rm9200_miidev_write(char *devname, unsigned char addr, - unsigned char reg, unsigned short value) -{ - at91rm9200_EmacEnableMDIO (p_mac); - at91rm9200_EmacWritePhy (p_mac, reg, &value); - at91rm9200_EmacDisableMDIO (p_mac); - return 0; + /* Disable Receiver and Transmitter */ + ctl = at91_emac_read(AT91_EMAC_CTL); + ctl &= ~(AT91_EMAC_TE | AT91_EMAC_RE); + at91_emac_write(AT91_EMAC_CTL, ctl); } -#endif /* defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII) */ - -int at91rm9200_miidev_initialize(void) -{ -#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII) - mii_register("at91rm9200phy", at91rm9200_miidev_read, at91rm9200_miidev_write); -#endif - return 0; -} - -static int at91rm9200_get_ethaddr(struct eth_device *eth, unsigned char *adr) +static int at91_ether_get_ethaddr(struct eth_device *eth, unsigned char *adr) { /* We have no eeprom */ return -1; } -static int at91rm9200_set_ethaddr(struct eth_device *eth, unsigned char *adr) +static int at91_ether_set_ethaddr(struct eth_device *eth, unsigned char *adr) { int i; - p_mac->EMAC_SA2L = (adr[3] << 24) | (adr[2] << 16) - | (adr[1] << 8) | (adr[0]); - p_mac->EMAC_SA2H = (adr[5] << 8) | (adr[4]); + /* The CSB337 originally used a version of the MicroMonitor bootloader + * which saved Ethernet addresses in the "wrong" order. Operating + * systems (like Linux) know this, and apply a workaround. Replicate + * that MicroMonitor behavior so we avoid needing to make such OS code + * care about which bootloader was used. + */ + if (machine_is_csb337()) { + at91_emac_write(AT91_EMAC_SA2H, + (adr[0] << 8) | (adr[1])); + at91_emac_write(AT91_EMAC_SA2L, + (adr[2] << 24) | (adr[3] << 16) + | (adr[4] << 8) | (adr[5])); + } else { + at91_emac_write(AT91_EMAC_SA2L, + (adr[3] << 24) | (adr[2] << 16) + | (adr[1] << 8) | (adr[0])); + at91_emac_write(AT91_EMAC_SA2H, + (adr[5] << 8) | (adr[4])); + } -#if 1 for (i = 0; i < 5; i++) - printf ("%02x:", adr[i]); - printf ("%02x\n", adr[5]); -#endif - return -0; + debug ("%02x:", adr[i]); + debug ("%02x\n", adr[5]); + + return 0; } -static int at91rm9200_eth_init (struct device_d *dev) +static int at91_ether_init(struct eth_device *edev) { - struct eth_device *edev; - int i; + return 0; +} - edev = xmalloc(sizeof(struct eth_device)); - dev->priv = edev; - - edev->open = at91rm9200_eth_open; - edev->send = at91rm9200_eth_send; - edev->recv = at91rm9200_eth_rx; - edev->halt = at91rm9200_eth_halt; - edev->get_ethaddr = at91rm9200_get_ethaddr; - edev->set_ethaddr = at91rm9200_set_ethaddr; - edev->parent = dev; - - p_mac = AT91C_BASE_EMAC; - - /* PIO Disable Register */ - *AT91C_PIOA_PDR = AT91C_PA16_EMDIO | AT91C_PA15_EMDC | AT91C_PA14_ERXER | - AT91C_PA13_ERX1 | AT91C_PA12_ERX0 | AT91C_PA11_ECRS_ECRSDV | - AT91C_PA10_ETX1 | AT91C_PA9_ETX0 | AT91C_PA8_ETXEN | - AT91C_PA7_ETXCK_EREFCK; - -#ifdef CONFIG_AT91C_USE_RMII - *AT91C_PIOB_PDR = AT91C_PB19_ERXCK; - *AT91C_PIOB_BSR = AT91C_PB19_ERXCK; -#else - *AT91C_PIOB_PDR = AT91C_PB19_ERXCK | AT91C_PB18_ECOL | AT91C_PB17_ERXDV | - AT91C_PB16_ERX3 | AT91C_PB15_ERX2 | AT91C_PB14_ETXER | - AT91C_PB13_ETX3 | AT91C_PB12_ETX2; - - /* Select B Register */ - *AT91C_PIOB_BSR = AT91C_PB19_ERXCK | AT91C_PB18_ECOL | - AT91C_PB17_ERXDV | AT91C_PB16_ERX3 | AT91C_PB15_ERX2 | - AT91C_PB14_ETXER | AT91C_PB13_ETX3 | AT91C_PB12_ETX2; -#endif - - *AT91C_PMC_PCER = 1 << AT91C_ID_EMAC; /* Peripheral Clock Enable Register */ - - p_mac->EMAC_CFG |= AT91C_EMAC_CSR; /* Clear statistics */ - - /* Init Ehternet buffers */ - for (i = 0; i < RBF_FRAMEMAX; i++) { - rbfdt[i].addr = (unsigned long)rbf_framebuf[i]; - rbfdt[i].size = 0; +static int at91_ether_probe(struct device_d *dev) +{ + unsigned int mac_cfg; + struct ether_device *ether_dev; + struct eth_device *edev; + struct mii_device *miidev; + unsigned long ether_hz; + struct clk *pclk; + struct at91_ether_platform_data *pdata; + + if (!dev->platform_data) { + printf("at91_ether: no platform_data\n"); + return -ENODEV; } - rbfdt[RBF_FRAMEMAX - 1].addr |= RBF_WRAP; - rbfp = &rbfdt[0]; - - p_mac->EMAC_RBQP = (long) (&rbfdt[0]); - p_mac->EMAC_RSR &= ~(AT91C_EMAC_RSR_OVR | AT91C_EMAC_REC | AT91C_EMAC_BNA); - p_mac->EMAC_CFG = (p_mac->EMAC_CFG | AT91C_EMAC_CAF | AT91C_EMAC_NBC) - & ~AT91C_EMAC_CLK; + pdata = dev->platform_data; + + ether_dev = xzalloc(sizeof(struct ether_device)); + + edev = ðer_dev->netdev; + miidev = ðer_dev->miidev; + edev->priv = ether_dev; + + edev->init = at91_ether_init; + edev->open = at91_ether_open; + edev->send = at91_ether_send; + edev->recv = at91_ether_rx; + edev->halt = at91_ether_halt; + edev->get_ethaddr = at91_ether_get_ethaddr; + edev->set_ethaddr = at91_ether_set_ethaddr; + ether_dev->rbf_framebuf = dma_alloc_coherent(MAX_RX_DESCR * MAX_RBUFF_SZ); + ether_dev->rbfdt = dma_alloc_coherent(sizeof(struct rbf_t) * MAX_RX_DESCR); + + miidev->address = pdata->phy_addr; + miidev->read = at91_ether_mii_read; + miidev->write = at91_ether_mii_write; + miidev->edev = edev; + + /* Sanitize the clocks */ + mac_cfg = at91_emac_read(AT91_EMAC_CFG); + + pclk = clk_get(dev, "ether_clk"); + clk_enable(pclk); + ether_hz = clk_get_rate(pclk); + if (ether_hz > 40000000) { + /* MDIO clock must not exceed 2.5 MHz, so enable MCK divider */ + mac_cfg |= AT91_EMAC_CLK_DIV64; + } else { + mac_cfg &= ~AT91_EMAC_CLK; + } -#ifdef CONFIG_AT91C_USE_RMII - p_mac->EMAC_CFG |= AT91C_EMAC_RMII; -#endif + mac_cfg |= AT91_EMAC_CLK_DIV32 | AT91_EMAC_BIG; -#if (AT91C_MASTER_CLOCK > 40000000) - /* MDIO clock must not exceed 2.5 MHz, so enable MCK divider */ - p_mac->EMAC_CFG |= AT91C_EMAC_CLK_HCLK_64; -#endif + if (pdata->flags & AT91SAM_ETHER_RMII) + mac_cfg |= AT91_EMAC_RMII; - p_mac->EMAC_CTL |= AT91C_EMAC_TE | AT91C_EMAC_RE; + at91_emac_write(AT91_EMAC_CFG, mac_cfg); + mii_register(miidev); eth_register(edev); return 0; } -static struct driver_d at91_eth_driver = { - .name = "at91_eth", - .probe = at91rm9200_eth_init, -}; - -static int at91_eth_init(void) +static void at91_ether_remove(struct device_d *dev) { - register_driver(&at91_eth_driver); - return 0; } -device_initcall(at91_eth_init); +static struct driver_d at91_ether_driver = { + .name = "at91_ether", + .probe = at91_ether_probe, + .remove = at91_ether_remove, +}; +static int at91_ether_driver_init(void) +{ + register_driver(&at91_ether_driver); + return 0; +} +device_initcall(at91_ether_driver_init); diff --git a/drivers/net/at91_ether.h b/drivers/net/at91_ether.h new file mode 100644 index 0000000000..b97619ecb3 --- /dev/null +++ b/drivers/net/at91_ether.h @@ -0,0 +1,50 @@ +/* + * Ethernet driver for the Atmel AT91RM9200 (Thunder) + * + * Copyright (C) SAN People (Pty) Ltd + * + * Based on an earlier Atmel EMAC macrocell driver by Atmel and Lineo Inc. + * Initial version by Rick Bronson. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#ifndef AT91_ETHERNET +#define AT91_ETHERNET + +/* ........................................................................ */ + +#define MAX_RBUFF_SZ 0x600 /* 1518 rounded up */ +#define MAX_RX_DESCR 64 /* max number of receive buffers */ + +/* ----- Ethernet Buffer definitions ----- */ +#define RBF_ADDR 0xfffffffc +#define RBF_OWNER (1<<0) +#define RBF_WRAP (1<<1) +#define RBF_SIZE 0x07ff + +struct rbf_t +{ + unsigned int addr; + unsigned long size; +}; + +/* + * Read from a EMAC register. + */ +static inline unsigned long at91_emac_read(unsigned int reg) +{ + return __raw_readl(AT91_VA_BASE_EMAC + reg); +} + +/* + * Write to a EMAC register. + */ +static inline void at91_emac_write(unsigned int reg, unsigned long value) +{ + __raw_writel(value, AT91_VA_BASE_EMAC + reg); +} +#endif diff --git a/drivers/net/ks8851_mll.c b/drivers/net/ks8851_mll.c new file mode 100644 index 0000000000..71391cc763 --- /dev/null +++ b/drivers/net/ks8851_mll.c @@ -0,0 +1,891 @@ +/** + * Copyright (c) 2012 Jan Weitzel <j.weitzel@phytec.de> + * based on kernel driver drivers/net/ks8851_mll.c + * Copyright (c) 2009 Micrel Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +/** + * Supports: + * KS8851 16bit MLL chip from Micrel Inc. + */ +#include <common.h> +#include <driver.h> + +#include <command.h> +#include <net.h> +#include <miidev.h> +#include <malloc.h> +#include <init.h> +#include <xfuncs.h> +#include <errno.h> +#include <clock.h> +#include <io.h> + +#define MAX_RECV_FRAMES 32 +#define MAX_BUF_SIZE 2048 +#define TX_BUF_SIZE 2000 +#define RX_BUF_SIZE 2000 + +#define KS_CCR 0x08 +#define CCR_EEPROM (1 << 9) +#define CCR_SPI (1 << 8) +#define CCR_8BIT (1 << 7) +#define CCR_16BIT (1 << 6) +#define CCR_32BIT (1 << 5) +#define CCR_SHARED (1 << 4) +#define CCR_32PIN (1 << 0) + +/* MAC address registers */ +#define KS_MARL 0x10 +#define KS_MARM 0x12 +#define KS_MARH 0x14 + +#define KS_OBCR 0x20 +#define OBCR_ODS_16MA (1 << 6) + +#define KS_EEPCR 0x22 +#define EEPCR_EESA (1 << 4) +#define EEPCR_EESB (1 << 3) +#define EEPCR_EEDO (1 << 2) +#define EEPCR_EESCK (1 << 1) +#define EEPCR_EECS (1 << 0) + +#define KS_MBIR 0x24 +#define MBIR_TXMBF (1 << 12) +#define MBIR_TXMBFA (1 << 11) +#define MBIR_RXMBF (1 << 4) +#define MBIR_RXMBFA (1 << 3) + +#define KS_GRR 0x26 +#define GRR_QMU (1 << 1) +#define GRR_GSR (1 << 0) + +#define KS_WFCR 0x2A +#define WFCR_MPRXE (1 << 7) +#define WFCR_WF3E (1 << 3) +#define WFCR_WF2E (1 << 2) +#define WFCR_WF1E (1 << 1) +#define WFCR_WF0E (1 << 0) + +#define KS_WF0CRC0 0x30 +#define KS_WF0CRC1 0x32 +#define KS_WF0BM0 0x34 +#define KS_WF0BM1 0x36 +#define KS_WF0BM2 0x38 +#define KS_WF0BM3 0x3A + +#define KS_WF1CRC0 0x40 +#define KS_WF1CRC1 0x42 +#define KS_WF1BM0 0x44 +#define KS_WF1BM1 0x46 +#define KS_WF1BM2 0x48 +#define KS_WF1BM3 0x4A + +#define KS_WF2CRC0 0x50 +#define KS_WF2CRC1 0x52 +#define KS_WF2BM0 0x54 +#define KS_WF2BM1 0x56 +#define KS_WF2BM2 0x58 +#define KS_WF2BM3 0x5A + +#define KS_WF3CRC0 0x60 +#define KS_WF3CRC1 0x62 +#define KS_WF3BM0 0x64 +#define KS_WF3BM1 0x66 +#define KS_WF3BM2 0x68 +#define KS_WF3BM3 0x6A + +#define KS_TXCR 0x70 +#define TXCR_TCGICMP (1 << 8) +#define TXCR_TCGUDP (1 << 7) +#define TXCR_TCGTCP (1 << 6) +#define TXCR_TCGIP (1 << 5) +#define TXCR_FTXQ (1 << 4) +#define TXCR_TXFCE (1 << 3) +#define TXCR_TXPE (1 << 2) +#define TXCR_TXCRC (1 << 1) +#define TXCR_TXE (1 << 0) + +#define KS_TXSR 0x72 +#define TXSR_TXLC (1 << 13) +#define TXSR_TXMC (1 << 12) +#define TXSR_TXFID_MASK (0x3f << 0) +#define TXSR_TXFID_SHIFT (0) +#define TXSR_TXFID_GET(_v) (((_v) >> 0) & 0x3f) + + +#define KS_RXCR1 0x74 +#define RXCR1_FRXQ (1 << 15) +#define RXCR1_RXUDPFCC (1 << 14) +#define RXCR1_RXTCPFCC (1 << 13) +#define RXCR1_RXIPFCC (1 << 12) +#define RXCR1_RXPAFMA (1 << 11) +#define RXCR1_RXFCE (1 << 10) +#define RXCR1_RXEFE (1 << 9) +#define RXCR1_RXMAFMA (1 << 8) +#define RXCR1_RXBE (1 << 7) +#define RXCR1_RXME (1 << 6) +#define RXCR1_RXUE (1 << 5) +#define RXCR1_RXAE (1 << 4) +#define RXCR1_RXINVF (1 << 1) +#define RXCR1_RXE (1 << 0) +#define RXCR1_FILTER_MASK (RXCR1_RXINVF | RXCR1_RXAE | \ + RXCR1_RXMAFMA | RXCR1_RXPAFMA) + +#define KS_RXCR2 0x76 +#define RXCR2_SRDBL_MASK (0x7 << 5) +#define RXCR2_SRDBL_SHIFT (5) +#define RXCR2_SRDBL_4B (0x0 << 5) +#define RXCR2_SRDBL_8B (0x1 << 5) +#define RXCR2_SRDBL_16B (0x2 << 5) +#define RXCR2_SRDBL_32B (0x3 << 5) +/* #define RXCR2_SRDBL_FRAME (0x4 << 5) */ +#define RXCR2_IUFFP (1 << 4) +#define RXCR2_RXIUFCEZ (1 << 3) +#define RXCR2_UDPLFE (1 << 2) +#define RXCR2_RXICMPFCC (1 << 1) +#define RXCR2_RXSAF (1 << 0) + +#define KS_TXMIR 0x78 + +#define KS_RXFHSR 0x7C +#define RXFSHR_RXFV (1 << 15) +#define RXFSHR_RXICMPFCS (1 << 13) +#define RXFSHR_RXIPFCS (1 << 12) +#define RXFSHR_RXTCPFCS (1 << 11) +#define RXFSHR_RXUDPFCS (1 << 10) +#define RXFSHR_RXBF (1 << 7) +#define RXFSHR_RXMF (1 << 6) +#define RXFSHR_RXUF (1 << 5) +#define RXFSHR_RXMR (1 << 4) +#define RXFSHR_RXFT (1 << 3) +#define RXFSHR_RXFTL (1 << 2) +#define RXFSHR_RXRF (1 << 1) +#define RXFSHR_RXCE (1 << 0) +#define RXFSHR_ERR (RXFSHR_RXCE | RXFSHR_RXRF |\ + RXFSHR_RXFTL | RXFSHR_RXMR |\ + RXFSHR_RXICMPFCS | RXFSHR_RXIPFCS |\ + RXFSHR_RXTCPFCS) +#define KS_RXFHBCR 0x7E +#define RXFHBCR_CNT_MASK 0x0FFF + +#define KS_TXQCR 0x80 +#define TXQCR_AETFE (1 << 2) +#define TXQCR_TXQMAM (1 << 1) +#define TXQCR_METFE (1 << 0) + +#define KS_RXQCR 0x82 +#define RXQCR_RXDTTS (1 << 12) +#define RXQCR_RXDBCTS (1 << 11) +#define RXQCR_RXFCTS (1 << 10) +#define RXQCR_RXIPHTOE (1 << 9) +#define RXQCR_RXDTTE (1 << 7) +#define RXQCR_RXDBCTE (1 << 6) +#define RXQCR_RXFCTE (1 << 5) +#define RXQCR_ADRFE (1 << 4) +#define RXQCR_SDA (1 << 3) +#define RXQCR_RRXEF (1 << 0) +#define RXQCR_CMD_CNTL (RXQCR_RXFCTE|RXQCR_ADRFE) + +#define KS_TXFDPR 0x84 +#define TXFDPR_TXFPAI (1 << 14) +#define TXFDPR_TXFP_MASK (0x7ff << 0) +#define TXFDPR_TXFP_SHIFT (0) + +#define KS_RXFDPR 0x86 +#define RXFDPR_RXFPAI (1 << 14) + +#define KS_RXDTTR 0x8C +#define KS_RXDBCTR 0x8E + +#define KS_IER 0x90 +#define KS_ISR 0x92 +#define IRQ_LCI (1 << 15) +#define IRQ_TXI (1 << 14) +#define IRQ_RXI (1 << 13) +#define IRQ_RXOI (1 << 11) +#define IRQ_TXPSI (1 << 9) +#define IRQ_RXPSI (1 << 8) +#define IRQ_TXSAI (1 << 6) +#define IRQ_RXWFDI (1 << 5) +#define IRQ_RXMPDI (1 << 4) +#define IRQ_LDI (1 << 3) +#define IRQ_EDI (1 << 2) +#define IRQ_SPIBEI (1 << 1) +#define IRQ_DEDI (1 << 0) + +#define KS_RXFCTR 0x9C +#define RXFCTR_THRESHOLD_MASK 0x00FF + +#define KS_RXFC 0x9D +#define RXFCTR_RXFC_MASK (0xff << 8) +#define RXFCTR_RXFC_SHIFT (8) +#define RXFCTR_RXFC_GET(_v) (((_v) >> 8) & 0xff) +#define RXFCTR_RXFCT_MASK (0xff << 0) +#define RXFCTR_RXFCT_SHIFT (0) + +#define KS_TXNTFSR 0x9E + +#define KS_MAHTR0 0xA0 +#define KS_MAHTR1 0xA2 +#define KS_MAHTR2 0xA4 +#define KS_MAHTR3 0xA6 + +#define KS_FCLWR 0xB0 +#define KS_FCHWR 0xB2 +#define KS_FCOWR 0xB4 + +#define KS_CIDER 0xC0 +#define CIDER_ID 0x8870 +#define CIDER_REV_MASK (0x7 << 1) +#define CIDER_REV_SHIFT (1) +#define CIDER_REV_GET(_v) (((_v) >> 1) & 0x7) + +#define KS_CGCR 0xC6 +#define KS_IACR 0xC8 +#define IACR_RDEN (1 << 12) +#define IACR_TSEL_MASK (0x3 << 10) +#define IACR_TSEL_SHIFT (10) +#define IACR_TSEL_MIB (0x3 << 10) +#define IACR_ADDR_MASK (0x1f << 0) +#define IACR_ADDR_SHIFT (0) + +#define KS_IADLR 0xD0 +#define KS_IADHR 0xD2 + +#define KS_PMECR 0xD4 +#define PMECR_PME_DELAY (1 << 14) +#define PMECR_PME_POL (1 << 12) +#define PMECR_WOL_WAKEUP (1 << 11) +#define PMECR_WOL_MAGICPKT (1 << 10) +#define PMECR_WOL_LINKUP (1 << 9) +#define PMECR_WOL_ENERGY (1 << 8) +#define PMECR_AUTO_WAKE_EN (1 << 7) +#define PMECR_WAKEUP_NORMAL (1 << 6) +#define PMECR_WKEVT_MASK (0xf << 2) +#define PMECR_WKEVT_SHIFT (2) +#define PMECR_WKEVT_GET(_v) (((_v) >> 2) & 0xf) +#define PMECR_WKEVT_ENERGY (0x1 << 2) +#define PMECR_WKEVT_LINK (0x2 << 2) +#define PMECR_WKEVT_MAGICPKT (0x4 << 2) +#define PMECR_WKEVT_FRAME (0x8 << 2) +#define PMECR_PM_MASK (0x3 << 0) +#define PMECR_PM_SHIFT (0) +#define PMECR_PM_NORMAL (0x0 << 0) +#define PMECR_PM_ENERGY (0x1 << 0) +#define PMECR_PM_SOFTDOWN (0x2 << 0) +#define PMECR_PM_POWERSAVE (0x3 << 0) + +/* Standard MII PHY data */ +#define KS_P1MBCR 0xE4 +#define P1MBCR_FORCE_FDX (1 << 8) + +#define KS_P1MBSR 0xE6 +#define P1MBSR_AN_COMPLETE (1 << 5) +#define P1MBSR_AN_CAPABLE (1 << 3) +#define P1MBSR_LINK_UP (1 << 2) + +#define KS_PHY1ILR 0xE8 +#define KS_PHY1IHR 0xEA +#define KS_P1ANAR 0xEC +#define KS_P1ANLPR 0xEE + +#define KS_P1SCLMD 0xF4 +#define P1SCLMD_LEDOFF (1 << 15) +#define P1SCLMD_TXIDS (1 << 14) +#define P1SCLMD_RESTARTAN (1 << 13) +#define P1SCLMD_DISAUTOMDIX (1 << 10) +#define P1SCLMD_FORCEMDIX (1 << 9) +#define P1SCLMD_AUTONEGEN (1 << 7) +#define P1SCLMD_FORCE100 (1 << 6) +#define P1SCLMD_FORCEFDX (1 << 5) +#define P1SCLMD_ADV_FLOW (1 << 4) +#define P1SCLMD_ADV_100BT_FDX (1 << 3) +#define P1SCLMD_ADV_100BT_HDX (1 << 2) +#define P1SCLMD_ADV_10BT_FDX (1 << 1) +#define P1SCLMD_ADV_10BT_HDX (1 << 0) + +#define KS_P1CR 0xF6 +#define P1CR_HP_MDIX (1 << 15) +#define P1CR_REV_POL (1 << 13) +#define P1CR_OP_100M (1 << 10) +#define P1CR_OP_FDX (1 << 9) +#define P1CR_OP_MDI (1 << 7) +#define P1CR_AN_DONE (1 << 6) +#define P1CR_LINK_GOOD (1 << 5) +#define P1CR_PNTR_FLOW (1 << 4) +#define P1CR_PNTR_100BT_FDX (1 << 3) +#define P1CR_PNTR_100BT_HDX (1 << 2) +#define P1CR_PNTR_10BT_FDX (1 << 1) +#define P1CR_PNTR_10BT_HDX (1 << 0) + +/* TX Frame control */ + +#define TXFR_TXIC (1 << 15) +#define TXFR_TXFID_MASK (0x3f << 0) +#define TXFR_TXFID_SHIFT (0) + +#define KS_P1SR 0xF8 +#define P1SR_HP_MDIX (1 << 15) +#define P1SR_REV_POL (1 << 13) +#define P1SR_OP_100M (1 << 10) +#define P1SR_OP_FDX (1 << 9) +#define P1SR_OP_MDI (1 << 7) +#define P1SR_AN_DONE (1 << 6) +#define P1SR_LINK_GOOD (1 << 5) +#define P1SR_PNTR_FLOW (1 << 4) +#define P1SR_PNTR_100BT_FDX (1 << 3) +#define P1SR_PNTR_100BT_HDX (1 << 2) +#define P1SR_PNTR_10BT_FDX (1 << 1) +#define P1SR_PNTR_10BT_HDX (1 << 0) + +#define ENUM_BUS_NONE 0 +#define ENUM_BUS_8BIT 1 +#define ENUM_BUS_16BIT 2 +#define ENUM_BUS_32BIT 3 + +#define MAX_MCAST_LST 32 +#define HW_MCAST_SIZE 8 + +/** + * struct ks_net - KS8851 driver private data + * @hw_addr : start address of data register. + * @hw_addr_cmd : start address of command register. + * @pdev : Pointer to platform device. + * @bus_width : i/o bus width. + * @extra_byte : number of extra byte prepended rx pkt. + * + */ + +struct ks_net { + struct eth_device edev; + struct mii_device miidev; + void __iomem *hw_addr; + void __iomem *hw_addr_cmd; + struct platform_device *pdev; + int bus_width; +}; + +#define BE3 0x8000 /* Byte Enable 3 */ +#define BE2 0x4000 /* Byte Enable 2 */ +#define BE1 0x2000 /* Byte Enable 1 */ +#define BE0 0x1000 /* Byte Enable 0 */ + +/** + * ks_rdreg16 - read 16 bit register from device + * @ks : The chip information + * @offset: The register address + * + * Read a 16bit register from the chip, returning the result + */ + +static u16 ks_rdreg16(struct ks_net *ks, int offset) +{ + u16 value; + u16 cmd_reg_cache = (u16)offset | ((BE1 | BE0) << (offset & 0x02)); + + writew(cmd_reg_cache, ks->hw_addr_cmd); + value = readw(ks->hw_addr); + + return value; +} + +/** + * ks_wrreg16 - write 16bit register value to chip + * @ks: The chip information + * @offset: The register address + * @value: The value to write + * + */ + +static void ks_wrreg16(struct ks_net *ks, int offset, u16 value) +{ + u16 cmd_reg_cache = (u16)offset | ((BE1 | BE0) << (offset & 0x02)); + writew(cmd_reg_cache, ks->hw_addr_cmd); + writew(value, ks->hw_addr); +} + +/** + * ks_inblk - read a block of data from QMU. + * @ks: The chip state + * @wptr: buffer address to save data + * @len: length in byte to read + * + */ +static inline void ks_inblk(struct ks_net *ks, u16 *wptr, u32 len) +{ + len >>= 1; + while (len--) + *wptr++ = (u16)readw(ks->hw_addr); +} + +/** + * ks_outblk - write data to QMU. + * @ks: The chip information + * @wptr: buffer address + * @len: length in byte to write + * + */ +static inline void ks_outblk(struct ks_net *ks, u16 *wptr, u32 len) +{ + len >>= 1; + while (len--) + writew(*wptr++, ks->hw_addr); +} + +void ks_enable_qmu(struct ks_net *ks) +{ + u16 w; + + w = ks_rdreg16(ks, KS_TXCR); + /* Enables QMU Transmit (TXCR). */ + ks_wrreg16(ks, KS_TXCR, w | TXCR_TXE); + + /* + * RX Frame Count Threshold Enable and Auto-Dequeue RXQ Frame + * Enable + */ + + w = ks_rdreg16(ks, KS_RXQCR); + ks_wrreg16(ks, KS_RXQCR, w | RXQCR_RXFCTE); + + /* Enables QMU Receive (RXCR1). */ + w = ks_rdreg16(ks, KS_RXCR1); + ks_wrreg16(ks, KS_RXCR1, w | RXCR1_RXE); +} /* ks_enable_qmu */ + +static void ks_disable_qmu(struct ks_net *ks) +{ + u16 w; + + w = ks_rdreg16(ks, KS_TXCR); + + /* Disables QMU Transmit (TXCR). */ + w &= ~TXCR_TXE; + ks_wrreg16(ks, KS_TXCR, w); + + /* Disables QMU Receive (RXCR1). */ + w = ks_rdreg16(ks, KS_RXCR1); + w &= ~RXCR1_RXE ; + ks_wrreg16(ks, KS_RXCR1, w); + +} /* ks_disable_qmu */ + +/* MII interface controls */ + +/** + * ks_phy_reg - convert MII register into a KS8851 register + * @reg: MII register number. + * + * Return the KS8851 register number for the corresponding MII PHY register + * if possible. Return zero if the MII register has no direct mapping to the + * KS8851 register set. + */ +static int ks_phy_reg(int reg) +{ + int retval; + + switch (reg) { + case MII_BMCR: + retval = KS_P1MBCR; + break; + case MII_BMSR: + retval = KS_P1MBSR; + break; + case MII_PHYSID1: + retval = KS_PHY1ILR; + break; + case MII_PHYSID2: + retval = KS_PHY1IHR; + break; + case MII_ADVERTISE: + retval = KS_P1ANAR; + break; + case MII_LPA: + retval = KS_P1ANLPR; + break; + default: + retval = 0x0; + } + + return retval; +} + +/** + * ks_phy_read - MII interface PHY register read. + * + * This call reads data from the PHY register specified in @reg. Since the + * device does not support all the MII registers, the non-existent values + * are always returned as zero. + * + * We return zero for unsupported registers as the MII code does not check + * the value returned for any error status, and simply returns it to the + * caller. The mii-tool that the driver was tested with takes any -ve error + * as real PHY capabilities, thus displaying incorrect data to the user. + */ +static int ks_phy_read(struct mii_device *mdev, int addr, int reg) +{ + struct eth_device *edev = mdev->edev; + struct ks_net *priv = (struct ks_net *)edev->priv; + int ksreg; + int result; + + ksreg = ks_phy_reg(reg); + if (!ksreg) + return 0x0; /* no error return allowed, so use zero */ + + result = ks_rdreg16(priv, ksreg); + + return result; +} + +static int ks_phy_write(struct mii_device *mdev, int addr, int reg, int val) +{ + struct eth_device *edev = mdev->edev; + struct ks_net *priv = (struct ks_net *)edev->priv; + int ksreg; + + ksreg = ks_phy_reg(reg); + if (ksreg) + ks_wrreg16(priv, ksreg, val); + + return 0; +} + +static int ks8851_get_ethaddr(struct eth_device *edev, unsigned char *adr) +{ + struct ks_net *priv = (struct ks_net *)edev->priv; + + ((u16 *) adr)[0] = be16_to_cpu(ks_rdreg16(priv, KS_MARH)); + ((u16 *) adr)[1] = be16_to_cpu(ks_rdreg16(priv, KS_MARM)); + ((u16 *) adr)[2] = be16_to_cpu(ks_rdreg16(priv, KS_MARL)); + + return 0; +} + +static int ks8851_set_ethaddr(struct eth_device *edev, unsigned char *adr) +{ + struct ks_net *priv = (struct ks_net *)edev->priv; + + ks_wrreg16(priv, KS_MARH, cpu_to_be16(((u16 *) adr)[0])); + ks_wrreg16(priv, KS_MARM, cpu_to_be16(((u16 *) adr)[1])); + ks_wrreg16(priv, KS_MARL, cpu_to_be16(((u16 *) adr)[2])); + + return 0; +} + +static void ks_soft_reset(struct ks_net *ks, unsigned op) +{ + /* Disable interrupt first */ + ks_wrreg16(ks, KS_IER, 0x0000); + ks_wrreg16(ks, KS_GRR, op); + mdelay(10); /* wait a short time to effect reset */ + ks_wrreg16(ks, KS_GRR, 0); + mdelay(1); /* wait for condition to clear */ +} + +/** + * ks_read_selftest - read the selftest memory info. + * @ks: The device state + * + * Read and check the TX/RX memory selftest information. + */ +static int ks_read_selftest(struct ks_net *ks) +{ + struct device_d *dev = &ks->edev.dev; + unsigned both_done = MBIR_TXMBF | MBIR_RXMBF; + int ret = 0; + unsigned rd; + + rd = ks_rdreg16(ks, KS_MBIR); + + if ((rd & both_done) != both_done) { + dev_err(dev, "Memory selftest not finished\n"); + return 0; + } + + if (rd & MBIR_TXMBFA) { + dev_err(dev, "TX memory selftest fails\n"); + ret |= 1; + } + + if (rd & MBIR_RXMBFA) { + dev_err(dev, "RX memory selftest fails\n"); + ret |= 2; + } + + dev_dbg(dev, "the selftest passes\n"); + return ret; +} + +static void ks_setup(struct ks_net *ks) +{ + u16 w; + + /** + * Configure QMU Transmit + */ + + /* Setup Transmit Frame Data Pointer Auto-Increment (TXFDPR) */ + ks_wrreg16(ks, KS_TXFDPR, TXFDPR_TXFPAI); + + /* Setup Receive Frame Data Pointer Auto-Increment */ + ks_wrreg16(ks, KS_RXFDPR, RXFDPR_RXFPAI); + + /* Setup Receive Frame Threshold - 1 frame (RXFCTFC) */ + ks_wrreg16(ks, KS_RXFCTR, 1 & RXFCTR_THRESHOLD_MASK); + + /* Setup RxQ Command Control (RXQCR) */ + ks_wrreg16(ks, KS_RXQCR, RXQCR_CMD_CNTL); + + /** + * set the force mode to half duplex, default is full duplex + * because if the auto-negotiation fails, most switch uses + * half-duplex. + */ + + w = ks_rdreg16(ks, KS_P1MBCR); + w &= ~P1MBCR_FORCE_FDX; + ks_wrreg16(ks, KS_P1MBCR, w); + + w = TXCR_TXFCE | TXCR_TXPE | TXCR_TXCRC | TXCR_TCGIP; + ks_wrreg16(ks, KS_TXCR, w); + + w = RXCR1_RXFCE | RXCR1_RXBE | RXCR1_RXUE | RXCR1_RXME | RXCR1_RXIPFCC | + RXCR1_RXPAFMA; + ks_wrreg16(ks, KS_RXCR1, w); +} /*ks_setup */ + +static int ks8851_rx_frame(struct ks_net *ks) +{ + struct device_d *dev = &ks->edev.dev; + u16 *rdptr = (u16 *) NetRxPackets[0]; + u16 RxStatus, RxLen = 0; + u16 tmp_rxqcr; + + dev_dbg(dev, "receiving packet\n"); + + RxStatus = ks_rdreg16(ks, KS_RXFHSR); + RxLen = ks_rdreg16(ks, KS_RXFHBCR) & RXFHBCR_CNT_MASK; + dev_dbg(dev, "%s RxLen %d (%d) RxStatus 0x%04x\n", + __func__, RxLen, ALIGN(RxLen, 4), RxStatus); + + if (RxLen > PKTSIZE) + dev_err(dev, "rx length too big\n"); + + /* reset Frame pointer */ + ks_wrreg16(ks, KS_RXFDPR, RXFDPR_RXFPAI); + + tmp_rxqcr = ks_rdreg16(ks, KS_RXQCR); + ks_wrreg16(ks, KS_RXQCR, tmp_rxqcr | RXQCR_SDA); + /* read 2 bytes for dummy, 2 for status, 2 for len*/ + ks_inblk(ks, rdptr, 2 + 2 + 2); + ks_inblk(ks, rdptr, ALIGN(RxLen, 4)); + ks_wrreg16(ks, KS_RXQCR, tmp_rxqcr); + + if (RxStatus & RXFSHR_RXFV) { + /* Pass to upper layer */ + dev_dbg(dev, "passing packet to upper layer\n\n"); + net_receive(NetRxPackets[0], RxLen); + return RxLen; + } else if (RxStatus & RXFSHR_ERR) { + dev_err(dev, "RxStatus error 0x%04x\n", RxStatus & RXFSHR_ERR); + if (RxStatus & RXFSHR_RXICMPFCS) + dev_dbg(dev, "ICMP frame checksum field is incorrect\n"); + if (RxStatus & RXFSHR_RXIPFCS) + dev_dbg(dev, "IP frame checksum field is incorrect\n"); + if (RxStatus & RXFSHR_RXTCPFCS) + dev_dbg(dev, "TCP frame checksum field is incorrect\n"); + if (RxStatus & RXFSHR_RXCE) + dev_dbg(dev, "CRC Error\n"); + if (RxStatus & RXFSHR_RXRF) + dev_dbg(dev, "frame collision\n"); + if (RxStatus & RXFSHR_RXFTL) + dev_dbg(dev, "frame too long\n"); + if (RxStatus & RXFSHR_RXMR) + dev_dbg(dev, "MII symbol error\n"); + } else + dev_err(dev, "other RxStatus error 0x%04x\n", RxStatus); + return 0; +} + +static int ks8851_eth_rx(struct eth_device *edev) +{ + struct ks_net *ks = (struct ks_net *)edev->priv; + struct device_d *dev = &edev->dev; + u16 frame_cnt; + + if (!(ks_rdreg16(ks, KS_ISR) & IRQ_RXI)) + return 0; + ks_wrreg16(ks, KS_ISR, IRQ_RXI); + + frame_cnt = RXFCTR_RXFC_GET(ks_rdreg16(ks, KS_RXFCTR)); + + while (frame_cnt--) { + dev_dbg(dev, "%s frame %d\n", __func__, frame_cnt); + ks8851_rx_frame(ks); + } + + return 0; +} + +static int ks8851_eth_send(struct eth_device *edev, + void *packet, int length) +{ + struct ks_net *ks = (struct ks_net *)edev->priv; + struct device_d *dev = &edev->dev; + uint64_t tmo; + u16 tmp_rxqcr; + + dev_dbg(dev, "%s: length: %d (%d)\n", __func__, length, ALIGN(length, 4)); + + /* Enable TXQ write access */ + tmp_rxqcr = ks_rdreg16(ks, KS_RXQCR); + ks_wrreg16(ks, KS_RXQCR, tmp_rxqcr | RXQCR_SDA); + + /* write status/lenth info */ + writew(0, ks->hw_addr); + writew(cpu_to_le16(length), ks->hw_addr); + + /* write pkt data */ + ks_outblk(ks, (u16 *) packet, ALIGN(length, 4)); + ks_wrreg16(ks, KS_RXQCR, tmp_rxqcr); + + /* (move the pkt from TX buffer into TXQ) */ + ks_wrreg16(ks, KS_TXQCR, TXQCR_METFE); + /* wait for transmit done */ + tmo = get_time_ns(); + while (ks_rdreg16(ks, KS_TXQCR) & TXQCR_METFE) { + if (is_timeout(tmo, 5 * SECOND)) { + dev_err(dev, "transmission timeout\n"); + break; + } + } + + dev_dbg(dev, "transmit done\n\n"); + return 0; +} + +static int ks8851_eth_open(struct eth_device *edev) +{ + struct ks_net *priv = (struct ks_net *)edev->priv; + struct device_d *dev = &edev->dev; + + ks_enable_qmu(priv); + + miidev_wait_aneg(&priv->miidev); + miidev_print_status(&priv->miidev); + + dev_dbg(dev, "eth_open\n"); + + return 0; +} + +static int ks8851_init_dev(struct eth_device *edev) +{ + struct ks_net *priv = (struct ks_net *)edev->priv; + + miidev_restart_aneg(&priv->miidev); + return 0; +} + +static void ks8851_eth_halt(struct eth_device *edev) +{ + struct ks_net *priv = (struct ks_net *)edev->priv; + struct device_d *dev = &edev->dev; + + ks_disable_qmu(priv); + + dev_dbg(dev, "eth_halt\n"); +} + +static int ks8851_probe(struct device_d *dev) +{ + struct eth_device *edev; + struct ks_net *ks; + u16 id; + + ks = xzalloc(sizeof(struct ks_net)); + edev = &ks->edev; + dev->type_data = edev; + edev->priv = ks; + + if (dev->num_resources < 2) { + dev_err(dev, "ks8851: need 2 resources addr and addr_cmd"); + return -ENODEV; + } + + ks->hw_addr = dev_request_mem_region(dev, 0); + ks->hw_addr_cmd = dev_request_mem_region(dev, 1); + ks->bus_width = dev->resource[0].flags & IORESOURCE_MEM_TYPE_MASK; + + edev->init = ks8851_init_dev; + edev->open = ks8851_eth_open; + edev->send = ks8851_eth_send; + edev->recv = ks8851_eth_rx; + edev->halt = ks8851_eth_halt; + edev->set_ethaddr = ks8851_set_ethaddr; + edev->get_ethaddr = ks8851_get_ethaddr; + edev->parent = dev; + + /* setup mii state */ + ks->miidev.read = ks_phy_read; + ks->miidev.write = ks_phy_write; + ks->miidev.address = 1; + ks->miidev.flags = 0; + ks->miidev.edev = edev; + ks->miidev.parent = dev; + + /* simple check for a valid chip being connected to the bus */ + + id = ks_rdreg16(ks, KS_CIDER); + + if ((id & ~CIDER_REV_MASK) != CIDER_ID) { + dev_err(dev, "failed to read device ID\n"); + return -ENODEV; + } + dev_dbg(dev, "Found chip, family: 0x%x, id: 0x%x, rev: 0x%x\n", + (id >> 8) & 0xff, (id >> 4) & 0xf, (id >> 1) & 0x7); + + if (ks_read_selftest(ks)) { + dev_err(dev, "failed to read device ID\n"); + return -ENODEV; + } + + ks_soft_reset(ks, GRR_GSR); + ks_setup(ks); + + mii_register(&ks->miidev); + eth_register(edev); + dev_dbg(dev, "%s MARL 0x%04x MARM 0x%04x MARH 0x%04x\n", __func__, + ks_rdreg16(ks, KS_MARL), ks_rdreg16(ks, KS_MARM), + ks_rdreg16(ks, KS_MARH)); + + return 0; +} + +static struct driver_d ks8851_driver = { + .name = "ks8851_mll", + .probe = ks8851_probe, +}; + +static int ks8851_init(void) +{ + register_driver(&ks8851_driver); + return 0; +} + +device_initcall(ks8851_init); diff --git a/drivers/net/miidev.c b/drivers/net/miidev.c index d721aac9de..3b73133201 100644 --- a/drivers/net/miidev.c +++ b/drivers/net/miidev.c @@ -30,23 +30,37 @@ int miidev_restart_aneg(struct mii_device *mdev) { - uint16_t status; - int timeout; + int status, timeout; + uint64_t start; + + status = mii_write(mdev, mdev->address, MII_BMCR, BMCR_RESET); + if (status) + return status; - /* - * Reset PHY, then delay 300ns - */ - mii_write(mdev, mdev->address, MII_BMCR, BMCR_RESET); + start = get_time_ns(); + do { + status = mii_read(mdev, mdev->address, MII_BMCR); + if (status < 0) + return status; + + if (is_timeout(start, SECOND)) + return -ETIMEDOUT; + + } while (status & BMCR_RESET); if (mdev->flags & MIIDEV_FORCE_LINK) return 0; - udelay(1000); - if (mdev->flags & MIIDEV_FORCE_10) { printf("Forcing 10 Mbps ethernet link... "); + status = mii_read(mdev, mdev->address, MII_BMSR); - mii_write(mdev, mdev->address, MII_BMCR, BMCR_FULLDPLX | BMCR_CTST); + if (status < 0) + return status; + + status = mii_write(mdev, mdev->address, MII_BMCR, BMCR_FULLDPLX | BMCR_CTST); + if (status) + return status; timeout = 20; do { /* wait for link status to go down */ @@ -56,6 +70,8 @@ int miidev_restart_aneg(struct mii_device *mdev) break; } status = mii_read(mdev, mdev->address, MII_BMSR); + if (status < 0) + return status; } while (status & BMSR_LSTATUS); } else { /* MII100 */ @@ -63,10 +79,18 @@ int miidev_restart_aneg(struct mii_device *mdev) * Set the auto-negotiation advertisement register bits */ status = mii_read(mdev, mdev->address, MII_ADVERTISE); + if (status < 0) + return status; + status |= ADVERTISE_ALL; - mii_write(mdev, mdev->address, MII_ADVERTISE, status); - mii_write(mdev, mdev->address, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART); + status = mii_write(mdev, mdev->address, MII_ADVERTISE, status); + if (status) + return status; + + status = mii_write(mdev, mdev->address, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART); + if (status) + return status; } return 0; @@ -74,27 +98,22 @@ int miidev_restart_aneg(struct mii_device *mdev) int miidev_wait_aneg(struct mii_device *mdev) { - uint64_t start; int status; + uint64_t start = get_time_ns(); if (mdev->flags & MIIDEV_FORCE_LINK) return 0; - /* - * Wait for AN completion - */ - start = get_time_ns(); do { + status = mii_read(mdev, mdev->address, MII_BMSR); + if (status < 0) + return status; + if (is_timeout(start, 5 * SECOND)) { printf("%s: Autonegotiation timeout\n", mdev->cdev.name); - return -1; + return -ETIMEDOUT; } - status = mii_read(mdev, mdev->address, MII_BMSR); - if (status < 0) { - printf("%s: Autonegotiation failed. status: 0x%04x\n", mdev->cdev.name, status); - return -1; - } } while (!(status & BMSR_LSTATUS)); return 0; diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index 797d19fe5f..4eb2f6248c 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig @@ -14,6 +14,7 @@ config USB_GADGET_DRIVER_ARC prompt "Arc OTG device core" depends on ARCH_IMX select USB_GADGET_DUALSPEED + select POLLER config USB_GADGET_DRIVER_AT91 bool diff --git a/drivers/usb/otg/Kconfig b/drivers/usb/otg/Kconfig index de09cf352b..2c5b789c8f 100644 --- a/drivers/usb/otg/Kconfig +++ b/drivers/usb/otg/Kconfig @@ -1,9 +1,7 @@ config USB_ULPI - bool - -config USB_ISP1504 - select USB_ULPI - bool "ISP1504 Tranceiver support" + bool "ULPI Tranceiver support" + help + Support for tranceivers that conforms ULPI specification. config USB_TWL4030 bool "TWL4030 Tranceiver support" diff --git a/drivers/usb/otg/Makefile b/drivers/usb/otg/Makefile index aa95cc9954..465a7f098c 100644 --- a/drivers/usb/otg/Makefile +++ b/drivers/usb/otg/Makefile @@ -1,4 +1,3 @@ obj-$(CONFIG_USB_ULPI) += ulpi.o -obj-$(CONFIG_USB_ISP1504) += isp1504.o obj-$(CONFIG_USB_TWL4030) += twl4030.o diff --git a/drivers/usb/otg/isp1504.c b/drivers/usb/otg/isp1504.c deleted file mode 100644 index 9ba74b157b..0000000000 --- a/drivers/usb/otg/isp1504.c +++ /dev/null @@ -1,37 +0,0 @@ -#include <common.h> -#include <usb/ulpi.h> -#include <usb/isp1504.h> - -int isp1504_set_vbus_power(void __iomem *view, int on) -{ - int vid, pid, ret = 0; - - vid = (ulpi_read(ISP1504_VID_HIGH, view) << 8) | - ulpi_read(ISP1504_VID_LOW, view); - pid = (ulpi_read(ISP1504_PID_HIGH, view) << 8) | - ulpi_read(ISP1504_PID_LOW, view); - - pr_info("ULPI Vendor ID 0x%x Product ID 0x%x\n", vid, pid); - if (vid != 0x4cc || pid != 0x1504) { - pr_err("No ISP1504 found\n"); - return -1; - } - - if (on) { - ret = ulpi_set(DRV_VBUS_EXT | /* enable external Vbus */ - DRV_VBUS | /* enable internal Vbus */ - USE_EXT_VBUS_IND | /* use external indicator */ - CHRG_VBUS, /* charge Vbus */ - ISP1504_OTGCTL, view); - } else { - ret = ulpi_clear(DRV_VBUS_EXT | /* disable external Vbus */ - DRV_VBUS, /* disable internal Vbus */ - ISP1504_OTGCTL, view); - - ret |= ulpi_set(USE_EXT_VBUS_IND | /* use external indicator */ - DISCHRG_VBUS, /* discharge Vbus */ - ISP1504_OTGCTL, view); - } - - return ret; -} diff --git a/drivers/usb/otg/ulpi.c b/drivers/usb/otg/ulpi.c index 6ed6f01e8e..a5ca25f3b0 100644 --- a/drivers/usb/otg/ulpi.c +++ b/drivers/usb/otg/ulpi.c @@ -87,7 +87,7 @@ int ulpi_set(u8 bits, int reg, void __iomem *view) } writel((ULPIVW_RUN | ULPIVW_WRITE | - ((reg + ISP1504_REG_SET) << ULPIVW_ADDR_SHIFT) | + ((reg + ULPI_REG_SET) << ULPIVW_ADDR_SHIFT) | ((bits & ULPIVW_WDATA_MASK) << ULPIVW_WDATA_SHIFT)), view); @@ -104,7 +104,7 @@ int ulpi_clear(u8 bits, int reg, void __iomem *view) int ret; writel((ULPIVW_RUN | ULPIVW_WRITE | - ((reg + ISP1504_REG_CLEAR) << ULPIVW_ADDR_SHIFT) | + ((reg + ULPI_REG_CLEAR) << ULPIVW_ADDR_SHIFT) | ((bits & ULPIVW_WDATA_MASK) << ULPIVW_WDATA_SHIFT)), view); @@ -116,3 +116,79 @@ int ulpi_clear(u8 bits, int reg, void __iomem *view) } EXPORT_SYMBOL(ulpi_clear); +struct ulpi_info { + uint32_t id; + char *name; +}; + +#define ULPI_ID(vendor, product) (((vendor) << 16) | (product)) +#define ULPI_INFO(_id, _name) \ + { \ + .id = (_id), \ + .name = (_name), \ + } + +/* ULPI hardcoded IDs, used for probing */ +static struct ulpi_info ulpi_ids[] = { + ULPI_INFO(ULPI_ID(0x04cc, 0x1504), "NXP ISP150x"), + ULPI_INFO(ULPI_ID(0x0424, 0x0006), "SMSC USB331x"), +}; + +int ulpi_probe(void __iomem *view) +{ + int i, vid, pid, ret; + uint32_t ulpi_id = 0; + + for (i = 0; i < 4; i++) { + ret = ulpi_read(ULPI_PID_HIGH - i, view); + if (ret < 0) + return ret; + ulpi_id = (ulpi_id << 8) | ret; + } + vid = ulpi_id & 0xffff; + pid = ulpi_id >> 16; + + for (i = 0; i < ARRAY_SIZE(ulpi_ids); i++) { + if (ulpi_ids[i].id == ULPI_ID(vid, pid)) { + pr_info("Found %s ULPI transceiver (0x%04x:0x%04x).\n", + ulpi_ids[i].name, vid, pid); + return 0; + } + } + + pr_err("No ULPI found.\n"); + + return -1; +} + +int ulpi_set_vbus(void __iomem *view, int on) +{ + int ret; + + if (on) { + ret = ulpi_set(DRV_VBUS_EXT | /* enable external Vbus */ + DRV_VBUS | /* enable internal Vbus */ + USE_EXT_VBUS_IND | /* use external indicator */ + CHRG_VBUS, /* charge Vbus */ + ULPI_OTGCTL, view); + } else { + ret = ulpi_clear(DRV_VBUS_EXT | /* disable external Vbus */ + DRV_VBUS, /* disable internal Vbus */ + ULPI_OTGCTL, view); + + ret |= ulpi_set(USE_EXT_VBUS_IND | /* use external indicator */ + DISCHRG_VBUS, /* discharge Vbus */ + ULPI_OTGCTL, view); + } + + return ret; +} + +int ulpi_setup(void __iomem *view, int on) +{ + if (ulpi_probe(view)) + return -1; + + return ulpi_set_vbus(view, on); +} +EXPORT_SYMBOL(ulpi_setup); diff --git a/fs/Kconfig b/fs/Kconfig index 6208cd2119..e5f307fd26 100644 --- a/fs/Kconfig +++ b/fs/Kconfig @@ -1,6 +1,9 @@ menu "Filesystem support " +config FS_AUTOMOUNT + bool + config FS_CRAMFS bool select ZLIB diff --git a/fs/fat/fat.c b/fs/fat/fat.c index 7d6e37a6b0..21464bde95 100644 --- a/fs/fat/fat.c +++ b/fs/fat/fat.c @@ -376,6 +376,7 @@ static int fat_probe(struct device_d *dev) struct fs_device_d *fsdev = dev_to_fs_device(dev); struct fat_priv *priv = xzalloc(sizeof(struct fat_priv)); char *backingstore = fsdev->backingstore; + int ret; dev->priv = priv; @@ -383,13 +384,24 @@ static int fat_probe(struct device_d *dev) backingstore += 5; priv->cdev = cdev_open(backingstore, O_RDWR); - if (!priv->cdev) - return -EINVAL; + if (!priv->cdev) { + ret = -ENOENT; + goto err_open; + } priv->fat.userdata = priv; - f_mount(&priv->fat); + ret = f_mount(&priv->fat); + if (ret) + goto err_mount; return 0; + +err_mount: + cdev_close(priv->cdev); +err_open: + free(priv); + + return ret; } static void fat_remove(struct device_d *dev) diff --git a/fs/fat/ff.c b/fs/fat/ff.c index a720389424..2d476ee2d5 100644 --- a/fs/fat/ff.c +++ b/fs/fat/ff.c @@ -1699,9 +1699,7 @@ int f_mount ( { fs->fs_type = 0; /* Clear new fs object */ - chk_mounted(fs, 0); - - return 0; + return chk_mounted(fs, 0); } /* @@ -167,21 +167,21 @@ char *normalise_path(const char *pathname) } EXPORT_SYMBOL(normalise_path); -LIST_HEAD(mtab_list); -static struct mtab_entry *mtab_root; +LIST_HEAD(fs_device_list); +static struct fs_device_d *fs_dev_root; -static struct mtab_entry *get_mtab_entry_by_path(const char *path) +static struct fs_device_d *get_fsdevice_by_path(const char *path) { - struct mtab_entry *e = NULL; + struct fs_device_d *fsdev = NULL; - for_each_mtab_entry(e) { - int len = strlen(e->path); - if (!strncmp(path, e->path, len) && + for_each_fs_device(fsdev) { + int len = strlen(fsdev->path); + if (!strncmp(path, fsdev->path, len) && (path[len] == '/' || path[len] == 0)) - return e; + return fsdev; } - return mtab_root; + return fs_dev_root; } static FILE files[MAX_FILES]; @@ -216,20 +216,134 @@ static int check_fd(int fd) return 0; } -static struct device_d *get_fs_device_by_path(char **path) +#ifdef CONFIG_FS_AUTOMOUNT + +#define AUTOMOUNT_IS_FILE (1 << 0) + +struct automount { + char *path; + char *cmd; + struct list_head list; + unsigned int flags; +}; + +static LIST_HEAD(automount_list); + +void automount_remove(const char *_path) { - struct device_d *dev; - struct mtab_entry *e; + char *path = normalise_path(_path); + struct automount *am; - e = get_mtab_entry_by_path(*path); - if (!e) - return NULL; - if (e != mtab_root) - *path += strlen(e->path); + list_for_each_entry(am, &automount_list, list) { + if (!strcmp(path, am->path)) + goto found; + } - dev = e->dev; + return; +found: + list_del(&am->list); + free(am->path); + free(am->cmd); + free(am); +} +EXPORT_SYMBOL(automount_remove); - return dev; +int automount_add(const char *path, const char *cmd) +{ + struct automount *am = xzalloc(sizeof(*am)); + struct stat s; + int ret; + + am->path = normalise_path(path); + am->cmd = xstrdup(cmd); + + ret = stat(path, &s); + if (!ret) { + /* + * If it exists it must be a directory + */ + if (!S_ISDIR(s.st_mode)) + return -ENOTDIR; + } else { + am->flags |= AUTOMOUNT_IS_FILE; + } + + list_add_tail(&am->list, &automount_list); + + return 0; +} +EXPORT_SYMBOL(automount_add); + +void automount_print(void) +{ + struct automount *am; + + list_for_each_entry(am, &automount_list, list) + printf("%-20s %s\n", am->path, am->cmd); +} +EXPORT_SYMBOL(automount_print); + +static void automount_mount(const char *path, int instat) +{ + struct automount *am; + int ret; + + list_for_each_entry(am, &automount_list, list) { + char *cmd; + int len_path = strlen(path); + int len_am_path = strlen(am->path); + + /* + * stat is a bit special. We do not want to trigger + * automount when someone calls stat() on the automount + * directory itself. + */ + if (instat && !(am->flags & AUTOMOUNT_IS_FILE) && + len_path == len_am_path) { + continue; + } + + if (len_path < len_am_path) + continue; + + if (strncmp(path, am->path, len_am_path)) + continue; + + if (*(path + len_am_path) != 0 && *(path + len_am_path) != '/') + continue; + + cmd = asprintf("%s %s", am->cmd, am->path); + ret = run_command(cmd, 0); + free(cmd); + + if (ret) + printf("running automount command '%s' failed\n", + am->cmd); + else + automount_remove(am->path); + + return; + } +} +#else +static void automount_mount(const char *path, int instat) +{ +} +#endif /* CONFIG_FS_AUTOMOUNT */ + +static struct fs_device_d *get_fs_device_and_root_path(char **path) +{ + struct fs_device_d *fsdev; + + automount_mount(*path, 0); + + fsdev = get_fsdevice_by_path(*path); + if (!fsdev) + return NULL; + if (fsdev != fs_dev_root) + *path += strlen(fsdev->path); + + return fsdev; } static int dir_is_empty(const char *pathname) @@ -336,7 +450,7 @@ EXPORT_SYMBOL(chdir); int unlink(const char *pathname) { - struct device_d *dev; + struct fs_device_d *fsdev; struct fs_driver_d *fsdrv; char *p = normalise_path(pathname); char *freep = p; @@ -344,17 +458,17 @@ int unlink(const char *pathname) if (path_check_prereq(pathname, S_IFREG)) goto out; - dev = get_fs_device_by_path(&p); - if (!dev) + fsdev = get_fs_device_and_root_path(&p); + if (!fsdev) goto out; - fsdrv = dev_to_fs_driver(dev); + fsdrv = fsdev->driver; if (!fsdrv->unlink) { errno = -ENOSYS; goto out; } - errno = fsdrv->unlink(dev, p); + errno = fsdrv->unlink(&fsdev->dev, p); out: free(freep); return errno; @@ -363,23 +477,23 @@ EXPORT_SYMBOL(unlink); int open(const char *pathname, int flags, ...) { - struct device_d *dev; + struct fs_device_d *fsdev; struct fs_driver_d *fsdrv; FILE *f; - int exist; + int exist_err; struct stat s; char *path = normalise_path(pathname); char *freep = path; - exist = (stat(path, &s) == 0) ? 1 : 0; + exist_err = stat(path, &s); - if (exist && S_ISDIR(s.st_mode)) { + if (!exist_err && S_ISDIR(s.st_mode)) { errno = -EISDIR; goto out1; } - if (!exist && !(flags & O_CREAT)) { - errno = -ENOENT; + if (exist_err && !(flags & O_CREAT)) { + errno = exist_err; goto out1; } @@ -389,13 +503,13 @@ int open(const char *pathname, int flags, ...) goto out1; } - dev = get_fs_device_by_path(&path); - if (!dev) + fsdev = get_fs_device_and_root_path(&path); + if (!fsdev) goto out; - fsdrv = dev_to_fs_driver(dev); + fsdrv = fsdev->driver; - f->dev = dev; + f->dev = &fsdev->dev; f->flags = flags; if ((flags & O_ACCMODE) && !fsdrv->write) { @@ -403,22 +517,22 @@ int open(const char *pathname, int flags, ...) goto out; } - if (!exist) { + if (exist_err) { if (NULL != fsdrv->create) - errno = fsdrv->create(dev, path, + errno = fsdrv->create(&fsdev->dev, path, S_IFREG | S_IRWXU | S_IRWXG | S_IRWXO); else errno = -EROFS; if (errno) goto out; } - errno = fsdrv->open(dev, f, path); + errno = fsdrv->open(&fsdev->dev, f, path); if (errno) goto out; if (flags & O_TRUNC) { - errno = fsdrv->truncate(dev, f, 0); + errno = fsdrv->truncate(&fsdev->dev, f, 0); f->size = 0; if (errno) goto out; @@ -705,7 +819,7 @@ static int fs_match(struct device_d *dev, struct driver_d *drv) static int fs_probe(struct device_d *dev) { struct fs_device_d *fsdev = dev_to_fs_device(dev); - struct mtab_entry *entry = &fsdev->mtab; + struct fs_driver_d *fsdrv = dev_to_fs_driver(dev); int ret; ret = dev->driver->probe(dev); @@ -714,15 +828,15 @@ static int fs_probe(struct device_d *dev) if (fsdev->cdev) { dev_add_child(fsdev->cdev->dev, &fsdev->dev); - entry->parent_device = fsdev->cdev->dev; + fsdev->parent_device = fsdev->cdev->dev; } - entry->dev = &fsdev->dev; + fsdev->driver = fsdrv; - list_add_tail(&entry->list, &mtab_list); + list_add_tail(&fsdev->list, &fs_device_list); - if (!mtab_root) - mtab_root = entry; + if (!fs_dev_root) + fs_dev_root = fsdev; return 0; } @@ -730,17 +844,16 @@ static int fs_probe(struct device_d *dev) static void fs_remove(struct device_d *dev) { struct fs_device_d *fsdev = dev_to_fs_device(dev); - struct mtab_entry *entry = &fsdev->mtab; if (fsdev->dev.driver) { dev->driver->remove(dev); - list_del(&entry->list); + list_del(&fsdev->list); } - free(entry->path); + free(fsdev->path); - if (entry == mtab_root) - mtab_root = NULL; + if (fsdev == fs_dev_root) + fs_dev_root = NULL; free(fsdev->backingstore); free(fsdev); @@ -777,10 +890,9 @@ int mount(const char *device, const char *fsname, const char *_path) debug("mount: %s on %s type %s\n", device, path, fsname); - if (mtab_root) { - struct mtab_entry *entry; - entry = get_mtab_entry_by_path(path); - if (entry != mtab_root) { + if (fs_dev_root) { + fsdev = get_fsdevice_by_path(path); + if (fsdev != fs_dev_root) { printf("sorry, no nested mounts\n"); errno = -EBUSY; goto err_free_path; @@ -799,7 +911,7 @@ int mount(const char *device, const char *fsname, const char *_path) fsdev->backingstore = xstrdup(device); safe_strncpy(fsdev->dev.name, fsname, MAX_DRIVER_NAME); fsdev->dev.id = get_free_deviceid(fsdev->dev.name); - fsdev->mtab.path = xstrdup(path); + fsdev->path = xstrdup(path); fsdev->dev.bus = &fs_bus; if (!strncmp(device, "/dev/", 5)) @@ -836,29 +948,29 @@ EXPORT_SYMBOL(mount); int umount(const char *pathname) { - struct mtab_entry *entry = NULL, *e; + struct fs_device_d *fsdev = NULL, *f; char *p = normalise_path(pathname); - for_each_mtab_entry(e) { - if (!strcmp(p, e->path)) { - entry = e; + for_each_fs_device(f) { + if (!strcmp(p, f->path)) { + fsdev = f; break; } } free(p); - if (e == mtab_root && !list_is_singular(&mtab_list)) { + if (f == fs_dev_root && !list_is_singular(&fs_device_list)) { errno = -EBUSY; return errno; } - if (!entry) { + if (!fsdev) { errno = -EFAULT; return errno; } - unregister_device(entry->dev); + unregister_device(&fsdev->dev); return 0; } @@ -867,7 +979,7 @@ EXPORT_SYMBOL(umount); DIR *opendir(const char *pathname) { DIR *dir = NULL; - struct device_d *dev; + struct fs_device_d *fsdev; struct fs_driver_d *fsdrv; char *p = normalise_path(pathname); char *freep = p; @@ -875,16 +987,16 @@ DIR *opendir(const char *pathname) if (path_check_prereq(pathname, S_IFDIR)) goto out; - dev = get_fs_device_by_path(&p); - if (!dev) + fsdev = get_fs_device_and_root_path(&p); + if (!fsdev) goto out; - fsdrv = dev_to_fs_driver(dev); + fsdrv = fsdev->driver; debug("opendir: fsdrv: %p\n",fsdrv); - dir = fsdrv->opendir(dev, p); + dir = fsdrv->opendir(&fsdev->dev, p); if (dir) { - dir->dev = dev; + dir->dev = &fsdev->dev; dir->fsdrv = fsdrv; } @@ -918,23 +1030,25 @@ int stat(const char *filename, struct stat *s) { struct device_d *dev; struct fs_driver_d *fsdrv; - struct mtab_entry *e; + struct fs_device_d *fsdev; char *f = normalise_path(filename); char *freep = f; + automount_mount(f, 1); + memset(s, 0, sizeof(struct stat)); - e = get_mtab_entry_by_path(f); - if (!e) { + fsdev = get_fsdevice_by_path(f); + if (!fsdev) { errno = -ENOENT; goto out; } - if (e != mtab_root && strcmp(f, e->path)) { - f += strlen(e->path); - dev = e->dev; + if (fsdev != fs_dev_root && strcmp(f, fsdev->path)) { + f += strlen(fsdev->path); + dev = &fsdev->dev; } else - dev = mtab_root->dev; + dev = &fs_dev_root->dev; fsdrv = dev_to_fs_driver(dev); @@ -951,20 +1065,20 @@ EXPORT_SYMBOL(stat); int mkdir (const char *pathname, mode_t mode) { struct fs_driver_d *fsdrv; - struct device_d *dev; + struct fs_device_d *fsdev; char *p = normalise_path(pathname); char *freep = p; if (path_check_prereq(pathname, S_UB_DOES_NOT_EXIST)) goto out; - dev = get_fs_device_by_path(&p); - if (!dev) + fsdev = get_fs_device_and_root_path(&p); + if (!fsdev) goto out; - fsdrv = dev_to_fs_driver(dev); + fsdrv = fsdev->driver; if (fsdrv->mkdir) { - errno = fsdrv->mkdir(dev, p); + errno = fsdrv->mkdir(&fsdev->dev, p); goto out; } @@ -978,20 +1092,20 @@ EXPORT_SYMBOL(mkdir); int rmdir (const char *pathname) { struct fs_driver_d *fsdrv; - struct device_d *dev; + struct fs_device_d *fsdev; char *p = normalise_path(pathname); char *freep = p; if (path_check_prereq(pathname, S_IFDIR | S_UB_IS_EMPTY)) goto out; - dev = get_fs_device_by_path(&p); - if (!dev) + fsdev = get_fs_device_and_root_path(&p); + if (!fsdev) goto out; - fsdrv = dev_to_fs_driver(dev); + fsdrv = fsdev->driver; if (fsdrv->rmdir) { - errno = fsdrv->rmdir(dev, p); + errno = fsdrv->rmdir(&fsdev->dev, p); goto out; } diff --git a/include/driver.h b/include/driver.h index f1964b7a01..37620273af 100644 --- a/include/driver.h +++ b/include/driver.h @@ -247,6 +247,17 @@ static inline struct device_d *add_usb_ehci_device(int id, resource_size_t hccr, } #endif +#ifdef CONFIG_DRIVER_NET_KS8851_MLL +struct device_d *add_ks8851_device(int id, resource_size_t addr, + resource_size_t addr_cmd, int flags, void *pdata); +#else +static inline struct device_d *add_ks8851_device(int id, resource_size_t addr, + resource_size_t addr_cmd, int flags, void *pdata) +{ + return NULL; +} +#endif + static inline struct device_d *add_generic_usb_ehci_device(int id, resource_size_t base, void *pdata) { diff --git a/include/fs.h b/include/fs.h index e5364f9e79..d82f02626a 100644 --- a/include/fs.h +++ b/include/fs.h @@ -77,15 +77,8 @@ struct fs_driver_d { #define dev_to_fs_driver(d) container_of(d->driver, struct fs_driver_d, drv) #define dev_to_fs_device(d) container_of(d, struct fs_device_d, dev) -struct mtab_entry { - char *path; - struct device_d *dev; - struct device_d *parent_device; - struct list_head list; -}; - -extern struct list_head mtab_list; -#define for_each_mtab_entry(e) list_for_each_entry(e, &mtab_list, list) +extern struct list_head fs_device_list; +#define for_each_fs_device(f) list_for_each_entry(f, &fs_device_list, list) struct fs_device_d { char *backingstore; /* the device we are associated with */ @@ -94,7 +87,9 @@ struct fs_device_d { struct fs_driver_d *driver; struct cdev *cdev; - struct mtab_entry mtab; + char *path; + struct device_d *parent_device; + struct list_head list; }; /* @@ -165,4 +160,8 @@ char *normalise_path(const char *path); /* Register a new filesystem driver */ int register_fs_driver(struct fs_driver_d *fsdrv); +void automount_remove(const char *_path); +int automount_add(const char *path, const char *cmd); +void automount_print(void); + #endif /* __FS_H */ diff --git a/include/net.h b/include/net.h index 2eec47fb52..3f2187eca0 100644 --- a/include/net.h +++ b/include/net.h @@ -21,6 +21,8 @@ #include <led.h> #include <asm/byteorder.h> /* for nton* / ntoh* stuff */ +/* How often do we retry to send packages */ +#define PKT_NUM_RETRIES 4 /* The number of receive packet buffers */ #define PKTBUFSRX 4 @@ -277,7 +279,11 @@ char *ip_to_string (IPaddr_t x, char *s); /* Convert a string to ip address */ int string_to_ip(const char *s, IPaddr_t *ip); -IPaddr_t getenv_ip(const char *name); +IPaddr_t getenv_ip_dns(const char *name, int dns); +static inline IPaddr_t getenv_ip(const char *name) +{ + return getenv_ip_dns(name, 0); +} int setenv_ip(const char *name, IPaddr_t ip); int string_to_ethaddr(const char *str, char *enetaddr); diff --git a/include/usb/isp1504.h b/include/usb/isp1504.h deleted file mode 100644 index 2eb7665054..0000000000 --- a/include/usb/isp1504.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __INCLUDE_USB_ISP1504_H -#define __INCLUDE_USB_ISP1504_H - -int isp1504_set_vbus_power(void __iomem *view, int on); - -#endif /* __INCLUDE_USB_ISP1504_H */ diff --git a/include/usb/ulpi.h b/include/usb/ulpi.h index 0397fdb39f..542993cc72 100644 --- a/include/usb/ulpi.h +++ b/include/usb/ulpi.h @@ -4,20 +4,21 @@ int ulpi_set(u8 bits, int reg, void __iomem *view); int ulpi_clear(u8 bits, int reg, void __iomem *view); int ulpi_read(int reg, void __iomem *view); +int ulpi_setup(void __iomem *view, int on); -/* ISP 1504 register addresses */ -#define ISP1504_VID_LOW 0x00 /* Vendor ID low */ -#define ISP1504_VID_HIGH 0x01 /* Vendor ID high */ -#define ISP1504_PID_LOW 0x02 /* Product ID low */ -#define ISP1504_PID_HIGH 0x03 /* Product ID high */ -#define ISP1504_ITFCTL 0x07 /* Interface Control */ -#define ISP1504_OTGCTL 0x0A /* OTG Control */ +/* ULPI register addresses */ +#define ULPI_VID_LOW 0x00 /* Vendor ID low */ +#define ULPI_VID_HIGH 0x01 /* Vendor ID high */ +#define ULPI_PID_LOW 0x02 /* Product ID low */ +#define ULPI_PID_HIGH 0x03 /* Product ID high */ +#define ULPI_ITFCTL 0x07 /* Interface Control */ +#define ULPI_OTGCTL 0x0A /* OTG Control */ /* add to above register address to access Set/Clear functions */ -#define ISP1504_REG_SET 0x01 -#define ISP1504_REG_CLEAR 0x02 +#define ULPI_REG_SET 0x01 +#define ULPI_REG_CLEAR 0x02 -/* 1504 OTG Control Register bits */ +/* ULPI OTG Control Register bits */ #define USE_EXT_VBUS_IND (1 << 7) /* Use ext. Vbus indicator */ #define DRV_VBUS_EXT (1 << 6) /* Drive Vbus external */ #define DRV_VBUS (1 << 5) /* Drive Vbus */ diff --git a/net/dhcp.c b/net/dhcp.c index d86f9a9a2b..ad32b535e3 100644 --- a/net/dhcp.c +++ b/net/dhcp.c @@ -17,6 +17,7 @@ #include <errno.h> #include <magicvar.h> #include <linux/err.h> +#include <getopt.h> #define OPT_SIZE 312 /* Minimum DHCP Options size per RFC2131 - results in 576 byte pkt */ @@ -74,6 +75,222 @@ static dhcp_state_t dhcp_state; static uint32_t dhcp_leasetime; static IPaddr_t net_dhcp_server_ip; static uint64_t dhcp_start; +static char dhcp_tftpname[256]; + +struct dhcp_opt { + unsigned char option; + /* request automatically the option when creating the DHCP request */ + bool optional; + const char *barebox_var_name; + void (*handle)(struct dhcp_opt *opt, unsigned char *data, int tlen); + void *data; + + struct bootp *bp; +}; + +static void netmask_handle(struct dhcp_opt *opt, unsigned char *popt, int optlen) +{ + IPaddr_t ip; + + ip = net_read_ip(popt); + net_set_netmask(ip); +} + +static void gateway_handle(struct dhcp_opt *opt, unsigned char *popt, int optlen) +{ + IPaddr_t ip; + + ip = net_read_ip(popt); + net_set_gateway(ip); +} + +static void env_ip_handle(struct dhcp_opt *opt, unsigned char *popt, int optlen) +{ + IPaddr_t ip; + + ip = net_read_ip(popt); + setenv_ip(opt->barebox_var_name, ip); +} + +static void env_str_handle(struct dhcp_opt *opt, unsigned char *popt, int optlen) +{ + char str[256]; + char *tmp = str; + + if (opt->data) + tmp = opt->data; + + memcpy(tmp, popt, optlen); + tmp[optlen] = 0; + setenv(opt->barebox_var_name, tmp); +} + +static void copy_uint32_handle(struct dhcp_opt *opt, unsigned char *popt, int optlen) +{ + net_copy_uint32(opt->data, (uint32_t *)popt); +}; + +static void copy_ip_handle(struct dhcp_opt *opt, unsigned char *popt, int optlen) +{ + net_copy_ip(opt->data, popt); +}; + +static void bootfile_vendorex_handle(struct dhcp_opt *opt, unsigned char *popt, int optlen) +{ + if (opt->bp->bp_file[0] != '\0') + return; + + /* + * only use vendor boot file if we didn't + * receive a boot file in the main non-vendor + * part of the packet - god only knows why + * some vendors chose not to use this perfectly + * good spot to store the boot file (join on + * Tru64 Unix) it seems mind bogglingly crazy + * to me + */ + pr_warn("*** WARNING: using vendor optional boot file\n"); + + /* + * I can't use dhcp_vendorex_proc here because I need + * to write into the bootp packet - even then I had to + * pass the bootp packet pointer into here as the + * second arg + */ + env_str_handle(opt, popt, optlen); +} + +struct dhcp_opt dhcp_options[] = { + { + .option = 1, + .handle = netmask_handle, + }, { + .option = 3, + .handle = gateway_handle, + }, { + .option = 6, + .handle = env_ip_handle, + .barebox_var_name = "nameserver", + }, { + .option = 12, + .handle = env_str_handle, + .barebox_var_name = "hostname", + }, { + .option = 15, + .handle = env_str_handle, + .barebox_var_name = "domainname", + }, { + .option = 17, + .handle = env_str_handle, + .barebox_var_name = "rootpath", + }, { + .option = 51, + .handle = copy_uint32_handle, + .data = &dhcp_leasetime, + }, { + .option = 54, + .handle = copy_ip_handle, + .data = &net_dhcp_server_ip, + .optional = true, + }, { + .option = 66, + .handle = env_str_handle, + .barebox_var_name = "dhcp_tftp_server_name", + .data = dhcp_tftpname, + }, { + .option = 67, + .handle = bootfile_vendorex_handle, + .barebox_var_name = "bootfile", + }, +}; + +struct dhcp_param { + unsigned char option; + const char *barebox_var_name; + int (*handle)(struct dhcp_param *param, u8 *e); + void *data; +}; + +static int dhcp_set_string_options(struct dhcp_param *param, u8 *e) +{ + int str_len; + char* str = param->data; + + if (!str && param->barebox_var_name) + str = (char*)getenv(param->barebox_var_name); + + if (!str) + return 0; + + str_len = strlen(str); + if (!str_len) + return 0; + + *e++ = param->option; + *e++ = str_len; + memcpy(e, str, str_len); + + return str_len + 2; +} + +#define DHCP_VENDOR_ID 60 +#define DHCP_CLIENT_ID 61 +#define DHCP_USER_CLASS 77 +#define DHCP_CLIENT_UUID 97 + +struct dhcp_param dhcp_params[] = { + { + .option = DHCP_VENDOR_ID, + .handle = dhcp_set_string_options, + .barebox_var_name = "dhcp_vendor_id", + }, { + .option = DHCP_CLIENT_ID, + .handle = dhcp_set_string_options, + .barebox_var_name = "dhcp_client_id", + }, { + .option = DHCP_USER_CLASS, + .handle = dhcp_set_string_options, + .barebox_var_name = "dhcp_user_class", + }, { + .option = DHCP_CLIENT_UUID, + .handle = dhcp_set_string_options, + .barebox_var_name = "dhcp_client_uuid", + } +}; + +static void dhcp_set_param_data(int option, void* data) +{ + struct dhcp_param *param; + int i; + + for (i = 0; i < ARRAY_SIZE(dhcp_params); i++) { + param = &dhcp_params[i]; + + if (param->option == option) { + param->data = data; + return; + } + } +} + +static int dhcp_set_ip_options(int option, u8 *e, IPaddr_t ip) +{ + int tmp; + + if (!ip) + return 0; + + tmp = ntohl(ip); + + *e++ = option; + *e++ = 4; + *e++ = tmp >> 24; + *e++ = tmp >> 16; + *e++ = tmp >> 8; + *e++ = tmp & 0xff; + + return 6; +} static int bootp_check_packet(unsigned char *pkt, unsigned src, unsigned len) { @@ -127,8 +344,10 @@ static void bootp_copy_net_params(struct bootp *bp) /* * Initialize BOOTP extension fields in the request. */ -static int dhcp_extended (u8 *e, int message_type, IPaddr_t ServerID, IPaddr_t RequestedIP) +static int dhcp_extended (u8 *e, int message_type, IPaddr_t ServerID, + IPaddr_t RequestedIP) { + int i; u8 *start = e; u8 *cnt; @@ -146,43 +365,23 @@ static int dhcp_extended (u8 *e, int message_type, IPaddr_t ServerID, IPaddr_t R *e++ = (576 - 312 + OPT_SIZE) >> 8; *e++ = (576 - 312 + OPT_SIZE) & 0xff; - if (ServerID) { - int tmp = ntohl (ServerID); - *e++ = 54; /* ServerID */ - *e++ = 4; - *e++ = tmp >> 24; - *e++ = tmp >> 16; - *e++ = tmp >> 8; - *e++ = tmp & 0xff; - } - - if (RequestedIP) { - int tmp = ntohl (RequestedIP); + e += dhcp_set_ip_options(50, e, RequestedIP); + e += dhcp_set_ip_options(54, e, ServerID); - *e++ = 50; /* Requested IP */ - *e++ = 4; - *e++ = tmp >> 24; - *e++ = tmp >> 16; - *e++ = tmp >> 8; - *e++ = tmp & 0xff; - } + for (i = 0; i < ARRAY_SIZE(dhcp_params); i++) + e += dhcp_params[i].handle(&dhcp_params[i], e); *e++ = 55; /* Parameter Request List */ cnt = e++; /* Pointer to count of requested items */ *cnt = 0; - *e++ = 1; /* Subnet Mask */ - *cnt += 1; - *e++ = 3; /* Router Option */ - *cnt += 1; - *e++ = 6; /* DNS Server(s) */ - *cnt += 1; - *e++ = 12; /* Hostname */ - *cnt += 1; - *e++ = 15; /* domain name */ - *cnt += 1; - *e++ = 17; /* Boot path */ - *cnt += 1; + + for (i = 0; i < ARRAY_SIZE(dhcp_options); i++) { + if (dhcp_options[i].optional) + continue; + *e++ = dhcp_options[i].option; + *cnt += 1; + } *e++ = 255; /* End of the list */ /* Pad to minimal length */ @@ -235,91 +434,45 @@ static int bootp_request(void) return ret; } +static int dhcp_options_handle(unsigned char option, unsigned char *popt, + int optlen, struct bootp *bp) +{ + int i; + struct dhcp_opt *opt; + + for (i = 0; i < ARRAY_SIZE(dhcp_options); i++) { + opt = &dhcp_options[i]; + if (opt->option == option) { + opt->bp = bp; + opt->handle(opt, popt, optlen); + goto end; + } + } + +end: + return i; +} + static void dhcp_options_process(unsigned char *popt, struct bootp *bp) { unsigned char *end = popt + sizeof(*bp) + OPT_SIZE; int oplen; - IPaddr_t ip; - char str[256]; + unsigned char option; + int i; while (popt < end && *popt != 0xff) { oplen = *(popt + 1); - switch (*popt) { - case 1: - ip = net_read_ip(popt + 2); - net_set_netmask(ip); - break; - case 3: - ip = net_read_ip(popt + 2); - net_set_gateway(ip); - break; - case 6: - ip = net_read_ip(popt + 2); - setenv_ip("nameserver", ip); - break; - case 12: - memcpy(str, popt + 2, oplen); - str[oplen] = 0; - setenv("hostname", str); - break; - case 15: - memcpy(str, popt + 2, oplen); - str[oplen] = 0; - setenv("domainname", str); - break; - case 17: - memcpy(str, popt + 2, oplen); - str[oplen] = 0; - setenv("rootpath", str); - break; - case 51: - net_copy_uint32 (&dhcp_leasetime, (uint32_t *)(popt + 2)); - break; - case 53: /* Ignore Message Type Option */ - break; - case 54: - net_copy_ip(&net_dhcp_server_ip, (popt + 2)); - break; - case 58: /* Ignore Renewal Time Option */ - break; - case 59: /* Ignore Rebinding Time Option */ - break; - case 66: /* Ignore TFTP server name */ - break; - case 67: /* vendor opt bootfile */ - /* - * I can't use dhcp_vendorex_proc here because I need - * to write into the bootp packet - even then I had to - * pass the bootp packet pointer into here as the - * second arg - */ - memcpy(str, popt + 2, oplen); - str[oplen] = 0; - if (bp->bp_file[0] == '\0') { - /* - * only use vendor boot file if we didn't - * receive a boot file in the main non-vendor - * part of the packet - god only knows why - * some vendors chose not to use this perfectly - * good spot to store the boot file (join on - * Tru64 Unix) it seems mind bogglingly crazy - * to me - */ - printf("*** WARNING: using vendor " - "optional boot file\n"); - setenv("bootfile", str); - } - break; - default: -#ifdef CONFIG_BOOTP_VENDOREX - if (dhcp_vendorex_proc (popt)) - break; -#endif - debug("*** Unhandled DHCP Option in OFFER/ACK: %d\n", *popt); - break; - } + option = *popt; + + i = dhcp_options_handle(option, popt + 2, oplen, bp); + if (i == ARRAY_SIZE(dhcp_options)) + debug("*** Unhandled DHCP Option in OFFER/ACK: %d\n", option); + popt += oplen + 2; /* Process next option */ } + + if (dhcp_tftpname[0] != 0) + net_set_serverip(resolv(dhcp_tftpname)); } static int dhcp_message_type(unsigned char *popt) @@ -373,7 +526,8 @@ static void dhcp_send_request_packet(struct bootp *bp_offer) * Copy options from OFFER packet if present */ net_copy_ip(&OfferedIP, &bp->bp_yiaddr); - extlen = dhcp_extended((u8 *)bp->bp_vend, DHCP_REQUEST, net_dhcp_server_ip, OfferedIP); + extlen = dhcp_extended((u8 *)bp->bp_vend, DHCP_REQUEST, net_dhcp_server_ip, + OfferedIP); debug("Transmitting DHCPREQUEST packet\n"); net_udp_send(dhcp_con, sizeof(*bp) + extlen); @@ -436,9 +590,42 @@ static void dhcp_handler(void *ctx, char *packet, unsigned int len) } } +static void dhcp_reset_env(void) +{ + struct dhcp_opt *opt; + int i; + + for (i = 0; i < ARRAY_SIZE(dhcp_options); i++) { + opt = &dhcp_options[i]; + if (!opt->barebox_var_name) + continue; + + setenv(opt->barebox_var_name,""); + } +} + static int do_dhcp(int argc, char *argv[]) { - int ret; + int ret, opt; + + dhcp_reset_env(); + + while((opt = getopt(argc, argv, "v:c:u:U:")) > 0) { + switch(opt) { + case 'v': + dhcp_set_param_data(DHCP_VENDOR_ID, optarg); + break; + case 'c': + dhcp_set_param_data(DHCP_CLIENT_ID, optarg); + break; + case 'u': + dhcp_set_param_data(DHCP_CLIENT_UUID, optarg); + break; + case 'U': + dhcp_set_param_data(DHCP_USER_CLASS, optarg); + break; + } + } dhcp_con = net_udp_new(0xffffffff, PORT_BOOTPS, dhcp_handler, NULL); if (IS_ERR(dhcp_con)) { @@ -478,9 +665,31 @@ out: return ret ? 1 : 0; } +BAREBOX_CMD_HELP_START(dhcp) +BAREBOX_CMD_HELP_USAGE("dhcp [OPTIONS]\n") +BAREBOX_CMD_HELP_SHORT("Invoke dhcp client to obtain ip/boot params.\n") +BAREBOX_CMD_HELP_OPT ("-v <vendor_id>", +"DHCP Vendor ID (code 60) submitted in DHCP requests. It can\n" +"be used in the DHCP server's configuration to select options\n" +"(e.g. bootfile or server) which are valid for barebox clients only.\n") +BAREBOX_CMD_HELP_OPT ("-c <client_id>", +"DHCP Client ID (code 61) submitted in DHCP requests. It can\n" +"be used in the DHCP server's configuration to select options\n" +"(e.g. bootfile or server) which are valid for barebox clients only.\n") +BAREBOX_CMD_HELP_OPT ("-u <client_uuid>", +"DHCP Client UUID (code 97) submitted in DHCP requests. It can\n" +"be used in the DHCP server's configuration to select options\n" +"(e.g. bootfile or server) which are valid for barebox clients only.\n") +BAREBOX_CMD_HELP_OPT ("-U <user_class>", +"DHCP User class (code 77) submitted in DHCP requests. It can\n" +"be used in the DHCP server's configuration to select options\n" +"(e.g. bootfile or server) which are valid for barebox clients only.\n"); +BAREBOX_CMD_HELP_END + BAREBOX_CMD_START(dhcp) .cmd = do_dhcp, .usage = "invoke dhcp client to obtain ip/boot params", + BAREBOX_CMD_HELP(cmd_dhcp_help) BAREBOX_CMD_END BAREBOX_MAGICVAR(bootfile, "bootfile returned from DHCP request"); @@ -488,3 +697,8 @@ BAREBOX_MAGICVAR(nameserver, "Nameserver returned from DHCP request"); BAREBOX_MAGICVAR(hostname, "hostname returned from DHCP request"); BAREBOX_MAGICVAR(domainname, "domainname returned from DHCP request"); BAREBOX_MAGICVAR(rootpath, "rootpath returned from DHCP request"); +BAREBOX_MAGICVAR(dhcp_vendor_id, "vendor id to send to the DHCP server"); +BAREBOX_MAGICVAR(dhcp_client_uuid, "cliend uuid to send to the DHCP server"); +BAREBOX_MAGICVAR(dhcp_client_id, "cliend id to send to the DHCP server"); +BAREBOX_MAGICVAR(dhcp_user_class, "user class to send to the DHCP server"); +BAREBOX_MAGICVAR(dhcp_tftp_server_name, "TFTP server Name returned from DHCP request"); @@ -205,7 +205,7 @@ IPaddr_t resolv(char *host) dns_state = STATE_INIT; - ip = getenv_ip("nameserver"); + ip = getenv_ip_dns("nameserver", 0); if (!ip) return 0; @@ -127,7 +127,7 @@ int string_to_ip(const char *s, IPaddr_t *ip) return 0; } -IPaddr_t getenv_ip(const char *name) +IPaddr_t getenv_ip_dns(const char *name, int dns) { IPaddr_t ip; const char *var = getenv(name); @@ -135,10 +135,13 @@ IPaddr_t getenv_ip(const char *name) if (!var) return 0; - if (string_to_ip(var, &ip)) + if (!string_to_ip(var, &ip)) + return ip; + + if (!dns) return 0; - return ip; + return resolv((char*)var); } int setenv_ip(const char *name, IPaddr_t ip) @@ -220,6 +223,7 @@ static int arp_request(IPaddr_t dest, unsigned char *ether) uint64_t arp_start; static char *arp_packet; struct ethernet *et; + unsigned retries = 0; if (!arp_packet) { arp_packet = net_alloc_packet(); @@ -274,8 +278,12 @@ static int arp_request(IPaddr_t dest, unsigned char *ether) printf("T "); arp_start = get_time_ns(); eth_send(arp_packet, ETHER_HDR_SIZE + ARP_HDR_SIZE); + retries++; } + if (retries > PKT_NUM_RETRIES) + return -ETIMEDOUT; + net_poll(); } diff --git a/net/ping.c b/net/ping.c index b90e5af683..bc6cf2e95e 100644 --- a/net/ping.c +++ b/net/ping.c @@ -55,7 +55,8 @@ static void ping_handler(void *ctx, char *pkt, unsigned len) static int do_ping(int argc, char *argv[]) { int ret; - uint64_t ping_start = 0; + uint64_t ping_start; + unsigned retries = 0; if (argc < 2) return COMMAND_ERROR_USAGE; @@ -88,11 +89,18 @@ static int do_ping(int argc, char *argv[]) net_poll(); - if (is_timeout(ping_start, 10 * SECOND)) { + if (is_timeout(ping_start, SECOND)) { + /* No answer, send another packet */ ping_start = get_time_ns(); ret = ping_send(); if (ret) goto out_unreg; + retries++; + } + + if (retries > PKT_NUM_RETRIES) { + ret = -ETIMEDOUT; + goto out_unreg; } } diff --git a/net/tftp.c b/net/tftp.c index 45ac7ad999..fc33c94583 100644 --- a/net/tftp.c +++ b/net/tftp.c @@ -39,6 +39,7 @@ static unsigned int tftp_last_block; /* last packet sequence number received */ static int tftp_state; static uint64_t tftp_timer_start; static int tftp_err; +static unsigned tftp_retries; #define STATE_RRQ 1 #define STATE_WRQ 2 @@ -106,6 +107,7 @@ static int tftp_send(void) } tftp_last_block = tftp_block; + tftp_retries = 0; s = (uint16_t *)pkt; *s++ = htons(TFTP_DATA); *s++ = htons(tftp_block); @@ -231,6 +233,7 @@ static void tftp_handler(void *ctx, char *packet, unsigned len) break; tftp_last_block = tftp_block; + tftp_retries = 0; if (!(tftp_block % 10)) tftp_size++; @@ -278,6 +281,7 @@ static int do_tftpb(int argc, char *argv[]) do_tftp_push(0); tftp_last_block = 0; tftp_size = 0; + tftp_retries = 0; while((opt = getopt(argc, argv, "p")) > 0) { switch(opt) { @@ -345,7 +349,15 @@ static int do_tftpb(int argc, char *argv[]) net_poll(); if (is_timeout(tftp_timer_start, SECOND)) { show_progress(-1); - tftp_send(); + tftp_err = tftp_send(); + if (tftp_err) + goto out_unreg; + tftp_retries++; + } + + if (tftp_retries > PKT_NUM_RETRIES) { + tftp_err = -ETIMEDOUT; + break; } } out_unreg: |