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author | Sascha Hauer <s.hauer@pengutronix.de> | 2012-11-23 11:24:44 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2012-12-06 13:43:09 +0100 |
commit | a32d081d6dab8ef3ecc20644a853379d55533c13 (patch) | |
tree | 172b2cb67d8d33b9e3db917c15ccfeafa410bd2c | |
parent | 0e9ba6c384d363091f626b0b37f520018bc56f0c (diff) | |
download | barebox-a32d081d6dab8ef3ecc20644a853379d55533c13.tar.gz barebox-a32d081d6dab8ef3ecc20644a853379d55533c13.tar.xz |
ARM i.MX bbu: Allow to have no DCD
Some boards do not have a DCD table since they initialize everything
in code, so allow to skip it and leave the corresponding pointers
empty.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r-- | arch/arm/mach-imx/imx-bbu-internal.c | 22 |
1 files changed, 16 insertions, 6 deletions
diff --git a/arch/arm/mach-imx/imx-bbu-internal.c b/arch/arm/mach-imx/imx-bbu-internal.c index fe57071474..5b03aa0a4d 100644 --- a/arch/arm/mach-imx/imx-bbu-internal.c +++ b/arch/arm/mach-imx/imx-bbu-internal.c @@ -357,8 +357,9 @@ static int imx_bbu_internal_v2_update(struct bbu_handler *handler, struct bbu_da flash_header->header.version = IVT_VERSION; flash_header->entry = imx_handler->app_dest + imx_pre_image_size; - flash_header->dcd_ptr = imx_handler->app_dest + flash_header_offset + - offsetof(struct imx_flash_header_v2, dcd); + if (imx_handler->dcdsize) + flash_header->dcd_ptr = imx_handler->app_dest + flash_header_offset + + offsetof(struct imx_flash_header_v2, dcd); flash_header->boot_data_ptr = imx_handler->app_dest + flash_header_offset + offsetof(struct imx_flash_header_v2, boot_data); flash_header->self = imx_handler->app_dest + flash_header_offset; @@ -366,10 +367,12 @@ static int imx_bbu_internal_v2_update(struct bbu_handler *handler, struct bbu_da flash_header->boot_data.start = imx_handler->app_dest; flash_header->boot_data.size = ALIGN(imx_pre_image_size + data->len, 4096);; - flash_header->dcd.header.tag = DCD_HEADER_TAG; - flash_header->dcd.header.length = cpu_to_be16(sizeof(struct imx_dcd) + - imx_handler->dcdsize); - flash_header->dcd.header.version = DCD_VERSION; + if (imx_handler->dcdsize) { + flash_header->dcd.header.tag = DCD_HEADER_TAG; + flash_header->dcd.header.length = cpu_to_be16(sizeof(struct imx_dcd) + + imx_handler->dcdsize); + flash_header->dcd.header.version = DCD_VERSION; + } /* Add dcd data */ memcpy((void *)flash_header + sizeof(*flash_header), imx_handler->dcd, imx_handler->dcdsize); @@ -482,6 +485,13 @@ static int imx53_bbu_internal_init_dcd(struct imx_internal_bbu_handler *imx_hand uint32_t *dcd32 = dcd; /* + * For boards which do not have a dcd (i.e. they do their SDRAM + * setup in C code) + */ + if (!dcd || !dcdsize) + return 0; + + /* * The DCD data we have compiled in does not have a DCD_WR_CMD at * the beginning. Instead it is contained in struct imx_flash_header_v2. * This is necessary to generate the DCD size at compile time. If |