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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2013-07-25 10:22:33 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2013-09-27 07:11:02 +0200 |
| commit | ab8a576a09185e2013fa8b5246edc2981e4e6487 (patch) | |
| tree | 5d0d222e36f4493fb54e67af450cc183b1965523 | |
| parent | 47974cac82a59427972373a6d0e6c23eda81ba3b (diff) | |
| download | barebox-ab8a576a09185e2013fa8b5246edc2981e4e6487.tar.gz barebox-ab8a576a09185e2013fa8b5246edc2981e4e6487.tar.xz | |
ARM: dts: i.MX6q: cpus/cpu nodes dts updates
Add device_type = "cpu", otherwise a v3.10 kernel boots with only
one CPU enabled.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| -rw-r--r-- | arch/arm/dts/imx6q.dtsi | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/dts/imx6q.dtsi b/arch/arm/dts/imx6q.dtsi index 5e6c7f35fe..beb8946fe2 100644 --- a/arch/arm/dts/imx6q.dtsi +++ b/arch/arm/dts/imx6q.dtsi @@ -18,6 +18,7 @@ cpu@0 { compatible = "arm,cortex-a9"; + device_type = "cpu"; reg = <0>; next-level-cache = <&L2>; operating-points = < @@ -39,18 +40,21 @@ cpu@1 { compatible = "arm,cortex-a9"; + device_type = "cpu"; reg = <1>; next-level-cache = <&L2>; }; cpu@2 { compatible = "arm,cortex-a9"; + device_type = "cpu"; reg = <2>; next-level-cache = <&L2>; }; cpu@3 { compatible = "arm,cortex-a9"; + device_type = "cpu"; reg = <3>; next-level-cache = <&L2>; }; |