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| author | Lucas Stach <l.stach@pengutronix.de> | 2014-05-01 23:32:52 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2014-05-05 15:09:09 +0200 |
| commit | 60a9cd5c328d406c5f2fc31d22d9a43ee308bd2c (patch) | |
| tree | 66a998c16ce1e5ce244dde20f97f64e3b6bc5203 | |
| parent | 739b916a4f7611a78cb4cb27dab837a38011f79a (diff) | |
| download | barebox-60a9cd5c328d406c5f2fc31d22d9a43ee308bd2c.tar.gz barebox-60a9cd5c328d406c5f2fc31d22d9a43ee308bd2c.tar.xz | |
ARM: phycore-am33xx: remove extra FDT memcpy
Not needed anymore, as barebox now accepts FDTs outside
of it's visible DRAM, as long as it's a valid pointer.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| -rw-r--r-- | arch/arm/boards/phytec-phycore-am335x/lowlevel.c | 13 |
1 files changed, 2 insertions, 11 deletions
diff --git a/arch/arm/boards/phytec-phycore-am335x/lowlevel.c b/arch/arm/boards/phytec-phycore-am335x/lowlevel.c index a413b67753..f04961dbf7 100644 --- a/arch/arm/boards/phytec-phycore-am335x/lowlevel.c +++ b/arch/arm/boards/phytec-phycore-am335x/lowlevel.c @@ -47,7 +47,6 @@ static const struct am33xx_ddr_data MT41J256M8HX15E_2x256M8_data = { }; extern char __dtb_am335x_phytec_phycore_start[]; -extern char __dtb_am335x_phytec_phycore_end[]; /** * @brief The basic entry point for board initialization. @@ -60,7 +59,6 @@ extern char __dtb_am335x_phytec_phycore_end[]; */ static noinline void pcm051_board_init(void) { - uint32_t sdram = 0x80000000; void *fdt; /* WDT1 is already running when the bootloader gets control @@ -83,16 +81,9 @@ static noinline void pcm051_board_init(void) omap_uart_lowlevel_init((void *)AM33XX_UART0_BASE); putc_ll('>'); - /* - * Copy the devicetree blob to sdram so that the barebox code finds it - * inside valid SDRAM instead of SRAM. - */ - memcpy((void *)sdram, __dtb_am335x_phytec_phycore_start, - __dtb_am335x_phytec_phycore_end - - __dtb_am335x_phytec_phycore_start); - fdt = (void *)sdram; + fdt = __dtb_am335x_phytec_phycore_start - get_runtime_offset(); - barebox_arm_entry(sdram, SZ_512M, fdt); + barebox_arm_entry(0x80000000, SZ_512M, fdt); } ENTRY_FUNCTION(start_am33xx_phytec_phycore_sram, bootinfo, r1, r2) |