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| author | Christian Hemp <c.hemp@phytec.de> | 2014-09-15 14:56:29 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2014-09-17 08:53:25 +0200 |
| commit | e49b40d98504076b5604d056da9d0c92b2a00d87 (patch) | |
| tree | fa7b39e411dc8dac937e521fbb551657881bf133 | |
| parent | 7e094dd2e2e917c7bb0df0799d47cc2e34e6e714 (diff) | |
| download | barebox-e49b40d98504076b5604d056da9d0c92b2a00d87.tar.gz barebox-e49b40d98504076b5604d056da9d0c92b2a00d87.tar.xz | |
ARM:phyFLEX-iMX6: Remove eth phy reset form board
Remove ethernet phy reset from board file. The reset is now made by the fec
driver since commit:
|commit 5c1846b625247f4b99eb429dcd5b0854699a4298
|Author: Rostislav Lisovy <lisovy@gmail.com>
|Date: Wed Nov 20 22:22:25 2013 +0100
|
| ARM: i.mx53: Parse Reset GPIO pin in FEC driver from Devicetree
|
| Signed-off-by: Rostislav Lisovy <lisovy@gmail.com>
| Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| -rw-r--r-- | arch/arm/boards/phytec-phyflex-imx6/board.c | 13 |
1 files changed, 0 insertions, 13 deletions
diff --git a/arch/arm/boards/phytec-phyflex-imx6/board.c b/arch/arm/boards/phytec-phyflex-imx6/board.c index fe3d1b20e0..131861d258 100644 --- a/arch/arm/boards/phytec-phyflex-imx6/board.c +++ b/arch/arm/boards/phytec-phyflex-imx6/board.c @@ -32,8 +32,6 @@ #include <mach/iomux-mx6.h> #include <mach/imx6.h> -#define ETH_PHY_RST IMX_GPIO_NR(3, 23) - #define GPIO_2_11_PD_CTL MX6_PAD_CTL_PUS_100K_DOWN | MX6_PAD_CTL_PUE | MX6_PAD_CTL_PKE | \ MX6_PAD_CTL_SPEED_MED | MX6_PAD_CTL_DSE_40ohm | MX6_PAD_CTL_HYS @@ -65,16 +63,6 @@ static void phyflex_err006282_workaround(void) gpio_direction_input(MX6_PHYFLEX_ERR006282); } -static int eth_phy_reset(void) -{ - gpio_request(ETH_PHY_RST, "phy reset"); - gpio_direction_output(ETH_PHY_RST, 0); - mdelay(1); - gpio_set_value(ETH_PHY_RST, 1); - - return 0; -} - static void mmd_write_reg(struct phy_device *dev, int device, int reg, int val) { phy_write(dev, 0x0d, device); @@ -99,7 +87,6 @@ static int phytec_pfla02_init(void) phyflex_err006282_workaround(); - eth_phy_reset(); phy_register_fixup_for_uid(PHY_ID_KSZ9031, MICREL_PHY_ID_MASK, ksz9031rn_phy_fixup); |