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authorLucas Stach <dev@lynxeye.de>2016-04-12 22:15:20 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2016-04-14 08:50:36 +0200
commit1bef2e8e8d30c5d6a39bcdbde5fb409c68df9f67 (patch)
tree82b262c7eafe3641702a0a787ca8b956c5edda7c
parent78118046b54872ad571fb19a5658a40c32cd25e0 (diff)
downloadbarebox-1bef2e8e8d30c5d6a39bcdbde5fb409c68df9f67.tar.gz
barebox-1bef2e8e8d30c5d6a39bcdbde5fb409c68df9f67.tar.xz
ARM: tegra: set up stack before calling maincluster entry
Allows this code to work correct regardless of the used compiler optimizations. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r--arch/arm/mach-tegra/include/mach/lowlevel.h7
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/include/mach/lowlevel.h b/arch/arm/mach-tegra/include/mach/lowlevel.h
index f70688e029..e9ba5ee393 100644
--- a/arch/arm/mach-tegra/include/mach/lowlevel.h
+++ b/arch/arm/mach-tegra/include/mach/lowlevel.h
@@ -255,9 +255,6 @@ void tegra_cpu_lowlevel_setup(char *fdt)
{
uint32_t r;
- if (tegra_cpu_is_maincomplex())
- tegra_maincomplex_entry(fdt - get_runtime_offset());
-
/* set the cpu to SVC32 mode */
__asm__ __volatile__("mrs %0, cpsr":"=r"(r));
r &= ~0x1f;
@@ -265,6 +262,10 @@ void tegra_cpu_lowlevel_setup(char *fdt)
__asm__ __volatile__("msr cpsr, %0" : : "r"(r));
arm_setup_stack(TEGRA_IRAM_BASE + SZ_256K - 8);
+
+ if (tegra_cpu_is_maincomplex())
+ tegra_maincomplex_entry(fdt - get_runtime_offset());
+
tegra_ll_delay_setup();
}