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author | Sascha Hauer <s.hauer@pengutronix.de> | 2014-12-08 10:15:04 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2015-01-05 11:31:00 +0100 |
commit | 1708b4b009ee6bf54056b66c744ba2f9978238cd (patch) | |
tree | 40fd0ddd8b00d70d8e037e1ae0a161efcb78cce4 | |
parent | 0160f834928a7b7c518c69bb4feb8750796caebc (diff) | |
download | barebox-1708b4b009ee6bf54056b66c744ba2f9978238cd.tar.gz barebox-1708b4b009ee6bf54056b66c744ba2f9978238cd.tar.xz |
ARM: MXS: Add more base address defines
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r-- | arch/arm/mach-mxs/include/mach/imx23-regs.h | 3 | ||||
-rw-r--r-- | arch/arm/mach-mxs/include/mach/imx28-regs.h | 3 |
2 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-mxs/include/mach/imx23-regs.h b/arch/arm/mach-mxs/include/mach/imx23-regs.h index 7fb664b334..3fd2f3d15b 100644 --- a/arch/arm/mach-mxs/include/mach/imx23-regs.h +++ b/arch/arm/mach-mxs/include/mach/imx23-regs.h @@ -24,9 +24,11 @@ #define IMX_DBGUART_BASE 0x80070000 #define IMX_TIM1_BASE 0x80068000 #define IMX_IOMUXC_BASE 0x80018000 +#define IMX_EMI_BASE 0x80020000 #define IMX_OCOTP_BASE 0x8002c000 #define IMX_WDT_BASE 0x8005c000 #define IMX_CCM_BASE 0x80040000 +#define IMX_LRADC_BASE 0x80050000 #define IMX_I2C1_BASE 0x80058000 #define IMX_SSP1_BASE 0x80010000 #define IMX_FB_BASE 0x80030000 @@ -35,5 +37,6 @@ #define IMX_USBPHY_BASE 0x8007c000 #define IMX_DIGCTL_BASE 0x8001c000 #define IMX_USB_BASE 0x80080000 +#define IMX_SDRAMC_BASE 0x800e0000 #endif /* __ASM_ARCH_MX23_REGS_H */ diff --git a/arch/arm/mach-mxs/include/mach/imx28-regs.h b/arch/arm/mach-mxs/include/mach/imx28-regs.h index 088282963d..de0d882414 100644 --- a/arch/arm/mach-mxs/include/mach/imx28-regs.h +++ b/arch/arm/mach-mxs/include/mach/imx28-regs.h @@ -25,10 +25,12 @@ #define IMX_SSP3_BASE 0x80016000 #define IMX_IOMUXC_BASE 0x80018000 #define IMX_DIGCTL_BASE 0x8001c000 +#define IMX_EMI_BASE 0x80020000 #define IMX_OCOTP_BASE 0x8002c000 #define IMX_FB_BASE 0x80030000 #define IMX_CCM_BASE 0x80040000 #define IMX_POWER_BASE 0x80044000 +#define IMX_LRADC_BASE 0x80050000 #define IMX_WDT_BASE 0x80056000 #define IMX_I2C0_BASE 0x80058000 #define IMX_I2C1_BASE 0x8005a000 @@ -43,6 +45,7 @@ #define IMX_USBPHY1_BASE 0x8007e000 #define IMX_USB0_BASE 0x80080000 #define IMX_USB1_BASE 0x80090000 +#define IMX_SDRAMC_BASE 0x800e0000 #define IMX_FEC0_BASE 0x800F0000 #define IMX_FEC1_BASE 0x800F4000 |