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| author | Alexander Shiyan <shc_work@mail.ru> | 2013-04-09 19:05:31 +0400 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2013-04-12 19:23:13 +0200 |
| commit | 5f82a0cd0138ae5208cc8758c638ce6a928ed2e3 (patch) | |
| tree | 593d10b57a80505b7abbd7b21b352bd5b124d9e4 | |
| parent | 8474cc900f96d306b5ac7733fc4aebf702a942a0 (diff) | |
| download | barebox-5f82a0cd0138ae5208cc8758c638ce6a928ed2e3.tar.gz barebox-5f82a0cd0138ae5208cc8758c638ce6a928ed2e3.tar.xz | |
ARM: cpuimx51: Use custom padctrl for fec
The fec padctrl is different from what we have in the kernel iomux
file. To be able to keep the iomux file in sync with the kernel, use
a custom padctrl for the cpuimx51 board.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| -rw-r--r-- | arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c b/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c index 5e77f90322..523a805dcb 100644 --- a/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c +++ b/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c @@ -55,23 +55,23 @@ static iomux_v3_cfg_t eukrea_cpuimx51_pads[] = { MX51_PAD_UART1_RTS__UART1_RTS, MX51_PAD_UART1_CTS__UART1_CTS, /* FEC */ - MX51_PAD_DISP2_DAT1__FEC_RX_ER, + NEW_PAD_CTRL(MX51_PAD_DISP2_DAT1__FEC_RX_ER, MX51_PAD_CTRL_5), MX51_PAD_DISP2_DAT15__FEC_TDATA0, MX51_PAD_DISP2_DAT6__FEC_TDATA1, MX51_PAD_DISP2_DAT7__FEC_TDATA2, MX51_PAD_DISP2_DAT8__FEC_TDATA3, MX51_PAD_DISP2_DAT9__FEC_TX_EN, - MX51_PAD_DISP2_DAT10__FEC_COL, - MX51_PAD_DISP2_DAT11__FEC_RX_CLK, - MX51_PAD_DISP2_DAT12__FEC_RX_DV, + NEW_PAD_CTRL(MX51_PAD_DISP2_DAT10__FEC_COL, MX51_PAD_CTRL_5), + NEW_PAD_CTRL(MX51_PAD_DISP2_DAT11__FEC_RX_CLK, MX51_PAD_CTRL_5), + NEW_PAD_CTRL(MX51_PAD_DISP2_DAT12__FEC_RX_DV, MX51_PAD_CTRL_5), MX51_PAD_DISP2_DAT13__FEC_TX_CLK, MX51_PAD_DI2_PIN4__FEC_CRS, MX51_PAD_DI2_PIN2__FEC_MDC, - MX51_PAD_DI2_PIN3__FEC_MDIO, + NEW_PAD_CTRL(MX51_PAD_DI2_PIN3__FEC_MDIO, MX51_PAD_CTRL_5), MX51_PAD_DISP2_DAT14__FEC_RDATA0, MX51_PAD_DI2_DISP_CLK__FEC_RDATA1, - MX51_PAD_DI_GP4__FEC_RDATA2, - MX51_PAD_DISP2_DAT0__FEC_RDATA3, + NEW_PAD_CTRL(MX51_PAD_DI_GP4__FEC_RDATA2, MX51_PAD_CTRL_5), + NEW_PAD_CTRL(MX51_PAD_DISP2_DAT0__FEC_RDATA3, MX51_PAD_CTRL_5), MX51_PAD_DI_GP3__FEC_TX_ER, MX51_PAD_EIM_DTACK__GPIO2_31, /* LAN8700 reset pin */ /* NAND */ |