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author | Sascha Hauer <s.hauer@pengutronix.de> | 2015-07-29 11:45:52 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2015-07-31 08:49:43 +0200 |
commit | 8d48e07c4d39a99b24e52ebab3deacc7e09d259b (patch) | |
tree | cff837118bc515aee62101221bfd17ed0d02fc04 | |
parent | ca8a4b0ff52a7505d3970c2619a309a52f7479fc (diff) | |
download | barebox-8d48e07c4d39a99b24e52ebab3deacc7e09d259b.tar.gz barebox-8d48e07c4d39a99b24e52ebab3deacc7e09d259b.tar.xz |
ARM: i.MX: make early UART functions independent of DEBUG_LL
We have functions to setup the i.MX uart for early use, but these all
depend on DEBUG_LL. Move them to imx-uart.h to make them usable for
the regular PBL console.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r-- | arch/arm/mach-imx/include/mach/debug_ll.h | 47 | ||||
-rw-r--r-- | include/serial/imx-uart.h | 40 |
2 files changed, 47 insertions, 40 deletions
diff --git a/arch/arm/mach-imx/include/mach/debug_ll.h b/arch/arm/mach-imx/include/mach/debug_ll.h index ab939b3a88..fb170fe08f 100644 --- a/arch/arm/mach-imx/include/mach/debug_ll.h +++ b/arch/arm/mach-imx/include/mach/debug_ll.h @@ -21,33 +21,6 @@ #define __IMX_UART_BASE(soc, num) soc##_UART##num##_BASE_ADDR #define IMX_UART_BASE(soc, num) __IMX_UART_BASE(soc, num) -static inline void imx_uart_setup_ll(void __iomem *uartbase, - unsigned int refclock) -{ - writel(0x00000000, uartbase + UCR1); - - writel(UCR2_IRTS | UCR2_WS | UCR2_TXEN | UCR2_RXEN | UCR2_SRST, - uartbase + UCR2); - writel(UCR3_DSR | UCR3_DCD | UCR3_RI | UCR3_ADNIMP | UCR3_RXDMUXSEL, - uartbase + UCR3); - writel((0b10 << UFCR_TXTL_SHF) | UFCR_RFDIV1 | (1 << UFCR_RXTL_SHF), - uartbase + UFCR); - - writel(baudrate_to_ubir(CONFIG_BAUDRATE), - uartbase + UBIR); - writel(refclock_to_ubmr(refclock), - uartbase + UBMR); - - writel(UCR1_UARTEN, uartbase + UCR1); -} - -#define __imx_uart_setup_ll(refclock) \ - do { \ - imx_uart_setup_ll(IOMEM(IMX_UART_BASE(IMX_DEBUG_SOC, \ - CONFIG_DEBUG_IMX_UART_PORT)), \ - refclock); \ - } while(0) - #ifdef CONFIG_DEBUG_IMX1_UART #define IMX_DEBUG_SOC MX1 #elif defined CONFIG_DEBUG_IMX21_UART @@ -72,12 +45,16 @@ static inline void imx_uart_setup_ll(void __iomem *uartbase, static inline void imx51_uart_setup_ll(void) { - __imx_uart_setup_ll(54000000); + void *base = IOMEM(IMX_UART_BASE(IMX_DEBUG_SOC, CONFIG_DEBUG_IMX_UART_PORT)); + + imx51_uart_setup(base); } static inline void imx6_uart_setup_ll(void) { - __imx_uart_setup_ll(80000000); + void *base = IOMEM(IMX_UART_BASE(IMX_DEBUG_SOC, CONFIG_DEBUG_IMX_UART_PORT)); + + imx6_uart_setup(base); } static inline void PUTC_LL(int c) @@ -88,20 +65,10 @@ static inline void PUTC_LL(int c) if (!base) return; - if (!(readl(base + UCR1) & UCR1_UARTEN)) - return; - - while (!(readl(base + USR2) & USR2_TXDC)); - - writel(c, base + URTX0); + imx_uart_putc(base, c); } #else -static inline void imx_uart_setup_ll(void __iomem *uartbase, - unsigned int refclock) -{ -} - static inline void imx51_uart_setup_ll(void) {} static inline void imx6_uart_setup_ll(void) {} diff --git a/include/serial/imx-uart.h b/include/serial/imx-uart.h index 7275e6ac38..d0e5bcc2b8 100644 --- a/include/serial/imx-uart.h +++ b/include/serial/imx-uart.h @@ -125,4 +125,44 @@ static inline int refclock_to_ubmr(int clock_hz) return clock_hz / 1600 - 1; } +static inline void imx_uart_setup(void __iomem *uartbase, + unsigned int refclock) +{ + writel(0x00000000, uartbase + UCR1); + + writel(UCR2_IRTS | UCR2_WS | UCR2_TXEN | UCR2_RXEN | UCR2_SRST, + uartbase + UCR2); + writel(UCR3_DSR | UCR3_DCD | UCR3_RI | UCR3_ADNIMP | UCR3_RXDMUXSEL, + uartbase + UCR3); + writel((0b10 << UFCR_TXTL_SHF) | UFCR_RFDIV1 | (1 << UFCR_RXTL_SHF), + uartbase + UFCR); + + writel(baudrate_to_ubir(CONFIG_BAUDRATE), + uartbase + UBIR); + writel(refclock_to_ubmr(refclock), + uartbase + UBMR); + + writel(UCR1_UARTEN, uartbase + UCR1); +} + +static inline void imx51_uart_setup(void __iomem *uartbase) +{ + imx_uart_setup(uartbase, 54000000); +} + +static inline void imx6_uart_setup(void __iomem *uartbase) +{ + imx_uart_setup(uartbase, 80000000); +} + +static inline void imx_uart_putc(void *base, int c) +{ + if (!(readl(base + UCR1) & UCR1_UARTEN)) + return; + + while (!(readl(base + USR2) & USR2_TXDC)); + + writel(c, base + URTX0); +} + #endif /* __IMX_UART_H__ */ |