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author | Michael Grzeschik <m.grzeschik@pengutronix.de> | 2017-05-05 17:49:19 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2017-05-08 13:53:31 +0200 |
commit | ed073bcac38d69347d7fa31c5c2674aa562d6b0f (patch) | |
tree | 3e16f5f600318cd29871e3bab3ecc998624e01b9 | |
parent | fa8a8ec88668a43874220cad21a2fa95bac054e5 (diff) | |
download | barebox-ed073bcac38d69347d7fa31c5c2674aa562d6b0f.tar.gz barebox-ed073bcac38d69347d7fa31c5c2674aa562d6b0f.tar.xz |
ARM: phytec-som-imx6: the ethernet clocks get enabled by fec_imx
All necessary clocks get already enabled through the fec_imx driver
configured by the devicetree.
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r-- | arch/arm/boards/phytec-som-imx6/board.c | 27 |
1 files changed, 1 insertions, 26 deletions
diff --git a/arch/arm/boards/phytec-som-imx6/board.c b/arch/arm/boards/phytec-som-imx6/board.c index 31b2761024..b93fd1be60 100644 --- a/arch/arm/boards/phytec-som-imx6/board.c +++ b/arch/arm/boards/phytec-som-imx6/board.c @@ -31,7 +31,6 @@ #include <mach/bbu.h> #include <platform_data/eth-fec.h> #include <mfd/imx6q-iomuxc-gpr.h> -#include <linux/clk.h> #include <linux/micrel_phy.h> #include <globalvar.h> @@ -97,32 +96,14 @@ int ksz8081_phy_fixup(struct phy_device *phydev) return 0; } -static int imx6ul_setup_fec(void) +static void imx6ul_setup_fec(void) { void __iomem *gprbase = IOMEM(MX6_IOMUXC_BASE_ADDR) + 0x4000; uint32_t val; - struct clk *clk; phy_register_fixup_for_uid(PHY_ID_KSZ8081, MICREL_PHY_ID_MASK, ksz8081_phy_fixup); - clk = clk_lookup("enet_ptp"); - if (IS_ERR(clk)) - goto err; - - clk_enable(clk); - - clk = clk_lookup("enet_ref"); - if (IS_ERR(clk)) - goto err; - clk_enable(clk); - - clk = clk_lookup("enet_ref_125m"); - if (IS_ERR(clk)) - goto err; - - clk_enable(clk); - val = readl(gprbase + IOMUXC_GPR1); /* Use 50M anatop loopback REF_CLK1 for ENET1, clear gpr1[13], set gpr1[17]*/ val &= ~(1 << 13); @@ -131,12 +112,6 @@ static int imx6ul_setup_fec(void) val &= ~(1 << 14); val |= (1 << 18); writel(val, gprbase + IOMUXC_GPR1); - - return 0; -err: - pr_err("Setting up DFEC\n"); - - return -EIO; } static int physom_imx6_devices_init(void) |