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| author | Steffen Trumtrar <s.trumtrar@pengutronix.de> | 2017-06-30 10:08:22 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2017-06-30 13:32:22 +0200 |
| commit | 2909ca66d89482873507655ac087193093e315f3 (patch) | |
| tree | 3eb688f5768ca744f1bca6393036720339e06f41 | |
| parent | 429fba777e8c0cb10a335504927a59c46c412126 (diff) | |
| download | barebox-2909ca66d89482873507655ac087193093e315f3.tar.gz barebox-2909ca66d89482873507655ac087193093e315f3.tar.xz | |
ARM: socfpga: remove unused fpgaintf setup
The disable bits for the ethernet interfaces between FPGA and HPS are read
and configured, but never written back.
The configuration itself doesn't make that much sense however. So instead of
writing it back to the register, remove the whole read-modify operation altogether.
Reported-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| -rw-r--r-- | arch/arm/mach-socfpga/arria10-generic.c | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/arch/arm/mach-socfpga/arria10-generic.c b/arch/arm/mach-socfpga/arria10-generic.c index b8129eaf23..6a10c19d14 100644 --- a/arch/arm/mach-socfpga/arria10-generic.c +++ b/arch/arm/mach-socfpga/arria10-generic.c @@ -37,14 +37,6 @@ static void arria10_init_emac(void) val |= ARRIA10_SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RGMII; writel(val, ARRIA10_SYSMGR_EMAC2); - val = readl(ARRIA10_SYSMGR_FPGAINTF_EN_3); - val &= ~(ARRIA10_SYSMGR_FPGAINTF_EN3_EMAC0 | - ARRIA10_SYSMGR_FPGAINTF_EN3_EMAC0_SW | - ARRIA10_SYSMGR_FPGAINTF_EN3_EMAC1 | - ARRIA10_SYSMGR_FPGAINTF_EN3_EMAC1_SW | - ARRIA10_SYSMGR_FPGAINTF_EN3_EMAC2 | - ARRIA10_SYSMGR_FPGAINTF_EN3_EMAC2_SW); - rst = readl(ARRIA10_RSTMGR_ADDR + ARRIA10_RSTMGR_PER0MODRST); rst &= ~(ARRIA10_RSTMGR_PER0MODRST_EMAC0 | ARRIA10_RSTMGR_PER0MODRST_EMAC1 | |