diff options
author | Sascha Hauer <s.hauer@pengutronix.de> | 2017-09-08 08:41:18 +0200 |
---|---|---|
committer | Sascha Hauer <s.hauer@pengutronix.de> | 2017-09-08 08:41:18 +0200 |
commit | 164ad51e6410d2439634a0a84a1d9b3dfeb08a0d (patch) | |
tree | 4a0ca04a74b3fec75fb465a82872869df62cb0dd | |
parent | af250795bcdb29ecf062c709148a8561b138c7ba (diff) | |
parent | 5c62fa38c6b9eae1d35514f6aae692aa3636ea11 (diff) | |
download | barebox-164ad51e6410d2439634a0a84a1d9b3dfeb08a0d.tar.gz barebox-164ad51e6410d2439634a0a84a1d9b3dfeb08a0d.tar.xz |
Merge branch 'for-next/omap'
-rw-r--r-- | arch/arm/boards/phytec-som-am335x/lowlevel.c | 9 | ||||
-rw-r--r-- | arch/arm/configs/am335x_defconfig | 1 | ||||
-rw-r--r-- | arch/arm/dts/Makefile | 6 | ||||
-rw-r--r-- | arch/arm/dts/am335x-phytec-phycore-som-emmc.dts | 35 | ||||
-rw-r--r-- | arch/arm/dts/am335x-phytec-phycore-som-nand-no-eeprom.dts (renamed from arch/arm/dts/am335x-phytec-phycore-som-no-eeprom.dts) | 4 | ||||
-rw-r--r-- | arch/arm/dts/am335x-phytec-phycore-som-nand-no-spi-no-eeprom.dts (renamed from arch/arm/dts/am335x-phytec-phycore-som-no-spi-no-eeprom.dts) | 4 | ||||
-rw-r--r-- | arch/arm/dts/am335x-phytec-phycore-som-nand-no-spi.dts (renamed from arch/arm/dts/am335x-phytec-phycore-som.dts) | 2 | ||||
-rw-r--r-- | arch/arm/dts/am335x-phytec-phycore-som-nand.dts (renamed from arch/arm/dts/am335x-phytec-phycore-som-no-spi.dts) | 8 | ||||
-rw-r--r-- | arch/arm/dts/am335x-phytec-phycore-som.dtsi | 26 | ||||
-rw-r--r-- | images/Makefile.am33xx | 20 |
10 files changed, 99 insertions, 16 deletions
diff --git a/arch/arm/boards/phytec-som-am335x/lowlevel.c b/arch/arm/boards/phytec-som-am335x/lowlevel.c index 03c7e98f5a..77f436fa8b 100644 --- a/arch/arm/boards/phytec-som-am335x/lowlevel.c +++ b/arch/arm/boards/phytec-som-am335x/lowlevel.c @@ -125,10 +125,11 @@ PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_sram_2x512mb, am335x_phytec_phycore PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_r2_sram_512mb, am335x_phytec_phycore_som_mlo, PHYCORE_R2_MT41K256M16TW107IT_512MB); PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_r2_sram_256mb, am335x_phytec_phycore_som_mlo, PHYCORE_R2_MT41K128M16JT_256MB); PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_r2_sram_1024mb, am335x_phytec_phycore_som_mlo, PHYCORE_R2_MT41K512M16HA125IT_1024MB); -PHYTEC_ENTRY(start_am33xx_phytec_phycore_sdram, am335x_phytec_phycore_som); -PHYTEC_ENTRY(start_am33xx_phytec_phycore_no_spi_sdram, am335x_phytec_phycore_som_no_spi); -PHYTEC_ENTRY(start_am33xx_phytec_phycore_no_eeprom_sdram, am335x_phytec_phycore_som_no_eeprom); -PHYTEC_ENTRY(start_am33xx_phytec_phycore_no_spi_no_eeprom_sdram, am335x_phytec_phycore_som_no_spi_no_eeprom); +PHYTEC_ENTRY(start_am33xx_phytec_phycore_nand_sdram, am335x_phytec_phycore_som_nand); +PHYTEC_ENTRY(start_am33xx_phytec_phycore_emmc_sdram, am335x_phytec_phycore_som_emmc); +PHYTEC_ENTRY(start_am33xx_phytec_phycore_nand_no_spi_sdram, am335x_phytec_phycore_som_nand_no_spi); +PHYTEC_ENTRY(start_am33xx_phytec_phycore_nand_no_eeprom_sdram, am335x_phytec_phycore_som_nand_no_eeprom); +PHYTEC_ENTRY(start_am33xx_phytec_phycore_nand_no_spi_no_eeprom_sdram, am335x_phytec_phycore_som_nand_no_spi_no_eeprom); /* phyflex-som */ PHYTEC_ENTRY_MLO(start_am33xx_phytec_phyflex_sram_256mb, am335x_phytec_phyflex_som_mlo, PHYFLEX_MT41K128M16JT_256MB); diff --git a/arch/arm/configs/am335x_defconfig b/arch/arm/configs/am335x_defconfig index 382133b8c4..dd9c3c5494 100644 --- a/arch/arm/configs/am335x_defconfig +++ b/arch/arm/configs/am335x_defconfig @@ -87,6 +87,7 @@ CONFIG_CMD_OF_DISPLAY_TIMINGS=y CONFIG_CMD_OF_FIXUP_STATUS=y CONFIG_CMD_OFTREE=y CONFIG_CMD_TIME=y +CONFIG_CMD_MMC_EXTCSD=y CONFIG_NET=y CONFIG_NET_NFS=y CONFIG_NET_NETCONSOLE=y diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 0ec03bc810..cf9d8ea940 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -40,8 +40,10 @@ pbl-dtb-$(CONFIG_MACH_PCM038) += imx27-phytec-phycore-rdk.dtb.o pbl-dtb-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += am335x-phytec-phyflex-som.dtb.o am335x-phytec-phyflex-som-mlo.dtb.o \ am335x-phytec-phyflex-som-no-spi.dtb.o am335x-phytec-phyflex-som-no-eeprom.dtb.o \ am335x-phytec-phyflex-som-no-spi-no-eeprom.dtb.o \ - am335x-phytec-phycore-som.dtb.o am335x-phytec-phycore-som-no-spi.dtb.o am335x-phytec-phycore-som-mlo.dtb.o \ - am335x-phytec-phycore-som-no-eeprom.dtb.o am335x-phytec-phycore-som-no-spi-no-eeprom.dtb.o \ + am335x-phytec-phycore-som-mlo.dtb.o \ + am335x-phytec-phycore-som-nand.dtb.o am335x-phytec-phycore-som-nand-no-spi.dtb.o \ + am335x-phytec-phycore-som-nand-no-eeprom.dtb.o am335x-phytec-phycore-som-nand-no-spi-no-eeprom.dtb.o \ + am335x-phytec-phycore-som-emmc.dtb.o \ am335x-phytec-phycard-som.dtb.o am335x-phytec-phycard-som-mlo.dtb.o pbl-dtb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += imx6q-phytec-pbaa03.dtb.o \ imx6s-phytec-pbab01.dtb.o \ diff --git a/arch/arm/dts/am335x-phytec-phycore-som-emmc.dts b/arch/arm/dts/am335x-phytec-phycore-som-emmc.dts new file mode 100644 index 0000000000..880700e3bd --- /dev/null +++ b/arch/arm/dts/am335x-phytec-phycore-som-emmc.dts @@ -0,0 +1,35 @@ +/* + * Copyright (C) 2017 PHYTEC Messtechnik GmbH, + * Author: Daniel Schultz <d.schultz@phytec.de> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; + +#include "am33xx.dtsi" +#include "am335x-phytec-phycore-som.dtsi" + +/ { + model = "Phytec phyCORE EMMC AM335x"; + compatible = "phytec,phycore-am335x-som", "phytec,am335x-som", "ti,am33xx"; +}; + +&mmc2 { + status = "okay"; +}; + +&spi0 { + status = "okay"; +}; + +&eeprom { + status = "okay"; +}; diff --git a/arch/arm/dts/am335x-phytec-phycore-som-no-eeprom.dts b/arch/arm/dts/am335x-phytec-phycore-som-nand-no-eeprom.dts index 3dd130e2b7..9f0da372cd 100644 --- a/arch/arm/dts/am335x-phytec-phycore-som-no-eeprom.dts +++ b/arch/arm/dts/am335x-phytec-phycore-som-nand-no-eeprom.dts @@ -16,6 +16,10 @@ compatible = "phytec,phycore-am335x-som", "phytec,am335x-som", "ti,am33xx"; }; +&gpmc { + status = "okay"; +}; + &spi0 { status = "okay"; }; diff --git a/arch/arm/dts/am335x-phytec-phycore-som-no-spi-no-eeprom.dts b/arch/arm/dts/am335x-phytec-phycore-som-nand-no-spi-no-eeprom.dts index 397be77076..c026a820e2 100644 --- a/arch/arm/dts/am335x-phytec-phycore-som-no-spi-no-eeprom.dts +++ b/arch/arm/dts/am335x-phytec-phycore-som-nand-no-spi-no-eeprom.dts @@ -15,3 +15,7 @@ model = "Phytec phyCORE AM335x"; compatible = "phytec,phycore-am335x-som", "phytec,am335x-som", "ti,am33xx"; }; + +&gpmc { + status = "okay"; +}; diff --git a/arch/arm/dts/am335x-phytec-phycore-som.dts b/arch/arm/dts/am335x-phytec-phycore-som-nand-no-spi.dts index f13e0d6bdd..2c2fab017a 100644 --- a/arch/arm/dts/am335x-phytec-phycore-som.dts +++ b/arch/arm/dts/am335x-phytec-phycore-som-nand-no-spi.dts @@ -15,7 +15,7 @@ compatible = "phytec,phycore-am335x-som", "phytec,am335x-som", "ti,am33xx"; }; -&spi0 { +&gpmc { status = "okay"; }; diff --git a/arch/arm/dts/am335x-phytec-phycore-som-no-spi.dts b/arch/arm/dts/am335x-phytec-phycore-som-nand.dts index ad03d4dcb8..6ff2447608 100644 --- a/arch/arm/dts/am335x-phytec-phycore-som-no-spi.dts +++ b/arch/arm/dts/am335x-phytec-phycore-som-nand.dts @@ -15,6 +15,14 @@ compatible = "phytec,phycore-am335x-som", "phytec,am335x-som", "ti,am33xx"; }; +&gpmc { + status = "okay"; +}; + +&spi0 { + status = "okay"; +}; + &eeprom { status = "okay"; }; diff --git a/arch/arm/dts/am335x-phytec-phycore-som.dtsi b/arch/arm/dts/am335x-phytec-phycore-som.dtsi index 0b8c454143..dbc64246e5 100644 --- a/arch/arm/dts/am335x-phytec-phycore-som.dtsi +++ b/arch/arm/dts/am335x-phytec-phycore-som.dtsi @@ -58,6 +58,21 @@ >; }; + emmc_pins: pinmux_emmc_pins { + pinctrl-single,pins = < + 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ + 0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ + 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ + 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ + 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ + 0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ + 0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ + 0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ + 0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ + 0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ + >; + }; + emac_rmii1_pins: pinmux_emac_rmii1_pins { pinctrl-single,pins = < 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs_dv */ @@ -157,6 +172,15 @@ status = "okay"; }; +&mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&emmc_pins>; + bus-width = <8>; + status = "disabled"; + ti,vcc-aux-disable-is-sleep; + non-removable; +}; + &spi0 { pinctrl-names = "default"; pinctrl-0 = <&spi0_pins>; @@ -225,7 +249,7 @@ }; &gpmc { - status = "okay"; + status = "disabled"; pinctrl-names = "default"; pinctrl-0 = <&nandflash_pins_s0>; ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */ diff --git a/images/Makefile.am33xx b/images/Makefile.am33xx index d1c432e2c2..e86d4e9573 100644 --- a/images/Makefile.am33xx +++ b/images/Makefile.am33xx @@ -25,20 +25,24 @@ FILE_barebox-am33xx-afi-gf-mlo.spi.img = start_am33xx_afi_gf_sram.pblx.mlospi am33xx-mlo-$(CONFIG_MACH_AFI_GF) += barebox-am33xx-afi-gf-mlo.img am33xx-mlospi-$(CONFIG_MACH_AFI_GF) += barebox-am33xx-afi-gf-mlo.spi.img -pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_sdram -FILE_barebox-am33xx-phytec-phycore.img = start_am33xx_phytec_phycore_sdram.pblx +pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_nand_sdram +FILE_barebox-am33xx-phytec-phycore.img = start_am33xx_phytec_phycore_nand_sdram.pblx am33xx-barebox-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore.img -pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_no_spi_sdram -FILE_barebox-am33xx-phytec-phycore-no-spi.img = start_am33xx_phytec_phycore_no_spi_sdram.pblx +pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_emmc_sdram +FILE_barebox-am33xx-phytec-phycore-emmc.img = start_am33xx_phytec_phycore_emmc_sdram.pblx +am33xx-barebox-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-emmc.img + +pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_nand_no_spi_sdram +FILE_barebox-am33xx-phytec-phycore-no-spi.img = start_am33xx_phytec_phycore_nand_no_spi_sdram.pblx am33xx-barebox-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-no-spi.img -pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_no_eeprom_sdram -FILE_barebox-am33xx-phytec-phycore-no-eeprom.img = start_am33xx_phytec_phycore_no_eeprom_sdram.pblx +pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_nand_no_eeprom_sdram +FILE_barebox-am33xx-phytec-phycore-no-eeprom.img = start_am33xx_phytec_phycore_nand_no_eeprom_sdram.pblx am33xx-barebox-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-no-eeprom.img -pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_no_spi_no_eeprom_sdram -FILE_barebox-am33xx-phytec-phycore-no-spi-no-eeprom.img = start_am33xx_phytec_phycore_no_spi_no_eeprom_sdram.pblx +pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_nand_no_spi_no_eeprom_sdram +FILE_barebox-am33xx-phytec-phycore-no-spi-no-eeprom.img = start_am33xx_phytec_phycore_nand_no_spi_no_eeprom_sdram.pblx am33xx-barebox-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-no-spi-no-eeprom.img pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_sram_256mb |