ARM: aarch64: mmu: Fix PTE_TYPE_* flags

When we reach level 3 page tables we set the PTE_TYPE_PAGE bit in attr.
This is wrong since in the outer loop we can fall back to a lower level
in which case the PTE_TYPE_PAGE may not be set.
Fix this by not modifying attr and instead compose the *pte value when
needed.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

1 files changed, 5 insertions, 6 deletions

diff --git a/arch/arm/cpu/mmu_64.c b/arch/arm/cpu/mmu_64.c
index 2934ad12cd..c7590fa33c 100644
--- a/arch/arm/cpu/mmu_64.c
+++ b/arch/arm/cpu/mmu_64.c
@@ -208,13 +208,12 @@ static void map_region(uint64_t virt, uint64_t phys, uint64_t size, uint64_t att
 
 			pte = table + idx;
 
-			if (level == 3)
-				attr |= PTE_TYPE_PAGE;
-			else
-				attr |= PTE_TYPE_BLOCK;
-
 			if (size >= block_size && IS_ALIGNED(addr, block_size)) {
-				*pte = phys | attr;
+				if (level == 3)
+					*pte = phys | attr | PTE_TYPE_PAGE;
+				else
+					*pte = phys | attr | PTE_TYPE_BLOCK;
+
 				addr += block_size;
 				phys += block_size;
 				size -= block_size;