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| author | Peter Mamonov <pmamonov@gmail.com> | 2018-05-22 18:33:39 +0300 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-05-24 12:45:10 +0200 |
| commit | dc01361fc28329c11fbfaf327b99d3385c91ec87 (patch) | |
| tree | 8256ae5193b44bb4da9389712a83d282e53d6aca | |
| parent | 1162bfaa4b9e021294604d18a3b8eeb2778b8bb3 (diff) | |
| download | barebox-dc01361fc28329c11fbfaf327b99d3385c91ec87.tar.gz barebox-dc01361fc28329c11fbfaf327b99d3385c91ec87.tar.xz | |
MIPS: use CKSEG1 instead of KSEG1
KSEG1 constant is defined for 32 bit MIPS only. Use CKSEG1 which is defined for
both MIPS32 and MIPS64.
Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| -rw-r--r-- | arch/mips/boot/dtb.c | 4 | ||||
| -rw-r--r-- | arch/mips/lib/c-r4k.c | 8 |
2 files changed, 6 insertions, 6 deletions
diff --git a/arch/mips/boot/dtb.c b/arch/mips/boot/dtb.c index e7633a5aff..3f7f466413 100644 --- a/arch/mips/boot/dtb.c +++ b/arch/mips/boot/dtb.c @@ -30,10 +30,10 @@ void of_add_memory_bank(struct device_node *node, bool dump, int r, if (IS_ENABLED(CONFIG_MMU)) { sprintf(str, "kseg0_ram%d", r); - barebox_add_memory_bank(str, KSEG0 | base, size); + barebox_add_memory_bank(str, CKSEG0 | base, size); } else { sprintf(str, "kseg1_ram%d", r); - barebox_add_memory_bank(str, KSEG1 | base, size); + barebox_add_memory_bank(str, CKSEG1 | base, size); } if (dump) diff --git a/arch/mips/lib/c-r4k.c b/arch/mips/lib/c-r4k.c index 150205840d..cb0544a532 100644 --- a/arch/mips/lib/c-r4k.c +++ b/arch/mips/lib/c-r4k.c @@ -58,14 +58,14 @@ void flush_cache_all(void) dcache_size = c->dcache.waysize * c->dcache.ways; lsize = c->dcache.linesz; - aend = (KSEG0 + dcache_size - 1) & ~(lsize - 1); - for (addr = KSEG0; addr <= aend; addr += lsize) + aend = (CKSEG0 + dcache_size - 1) & ~(lsize - 1); + for (addr = CKSEG0; addr <= aend; addr += lsize) cache_op(Index_Writeback_Inv_D, addr); icache_size = c->icache.waysize * c->icache.ways; lsize = c->icache.linesz; - aend = (KSEG0 + icache_size - 1) & ~(lsize - 1); - for (addr = KSEG0; addr <= aend; addr += lsize) + aend = (CKSEG0 + icache_size - 1) & ~(lsize - 1); + for (addr = CKSEG0; addr <= aend; addr += lsize) cache_op(Index_Invalidate_I, addr); /* secondatory cache skipped */ |