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authorSascha Hauer <s.hauer@pengutronix.de>2019-02-28 14:27:26 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2019-03-04 12:32:19 +0100
commitb88872fd25c70dbf0c9ed87183c679a4651912ae (patch)
tree236fe8751017c07a2ce786609ca3af957b456c80
parent3a3f2636878c3d32ca0d9b2039ee57bdc4f29757 (diff)
downloadbarebox-b88872fd25c70dbf0c9ed87183c679a4651912ae.tar.gz
barebox-b88872fd25c70dbf0c9ed87183c679a4651912ae.tar.xz
ARM: Fix cpu_info for armv8
We have get_cr() to get the control register for the different exception levels. Use it rather than the variant hardcoded for EL1. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r--arch/arm/cpu/cpuinfo.c7
1 files changed, 2 insertions, 5 deletions
diff --git a/arch/arm/cpu/cpuinfo.c b/arch/arm/cpu/cpuinfo.c
index 175475b038..1ba3b4379c 100644
--- a/arch/arm/cpu/cpuinfo.c
+++ b/arch/arm/cpu/cpuinfo.c
@@ -19,6 +19,7 @@
#include <common.h>
#include <command.h>
#include <complete.h>
+#include <asm/system.h>
#define CPU_ARCH_UNKNOWN 0
#define CPU_ARCH_ARMv3 1
@@ -76,11 +77,7 @@ static int do_cpuinfo(int argc, char *argv[])
:
: "memory");
- __asm__ __volatile__(
- "mrs %0, sctlr_el1\n"
- : "=r" (cr)
- :
- : "memory");
+ cr = get_cr();
#else
__asm__ __volatile__(
"mrc p15, 0, %0, c0, c0, 0 @ read control reg\n"