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authorRenaud Barbier <renaud.barbier@ge.com>2013-11-05 15:36:10 +0000
committerSascha Hauer <s.hauer@pengutronix.de>2013-11-06 11:04:37 +0100
commit04180c0464d642d5cc8b94cdaf50d359788fd6de (patch)
treeff5ae4baa072238bd76708a228aed99c9db5cb10
parenteb3ce91e594960d903aedda944f3821fe92aac66 (diff)
downloadbarebox-04180c0464d642d5cc8b94cdaf50d359788fd6de.tar.gz
barebox-04180c0464d642d5cc8b94cdaf50d359788fd6de.tar.xz
ppc: mpc85xx: enable DDR driver
The use of the DDR driver as well as early I2C support is enabled for board initialising their memory through SPD EEPROM data. A SOC specific function returning the DDR bus frequency is added for the DDR driver to translate DDR timings to register values. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r--arch/ppc/ddr-8xxx/Makefile2
-rw-r--r--arch/ppc/mach-mpc85xx/Makefile1
-rw-r--r--arch/ppc/mach-mpc85xx/cpu.c6
-rw-r--r--arch/ppc/mach-mpc85xx/include/mach/clock.h1
-rw-r--r--arch/ppc/mach-mpc85xx/speed.c9
5 files changed, 17 insertions, 2 deletions
diff --git a/arch/ppc/ddr-8xxx/Makefile b/arch/ppc/ddr-8xxx/Makefile
new file mode 100644
index 0000000000..54cb7ce512
--- /dev/null
+++ b/arch/ppc/ddr-8xxx/Makefile
@@ -0,0 +1,2 @@
+obj-y += main.o util.o ctrl_regs.o options.o lc_common_dimm_params.o
+obj-$(CONFIG_FSL_DDR2) += ddr2_dimm_params.o ddr2_setctrl.o
diff --git a/arch/ppc/mach-mpc85xx/Makefile b/arch/ppc/mach-mpc85xx/Makefile
index 81d68535dd..dba0550cf0 100644
--- a/arch/ppc/mach-mpc85xx/Makefile
+++ b/arch/ppc/mach-mpc85xx/Makefile
@@ -4,6 +4,7 @@ obj-y += cpu_init.o
obj-y += fsl_law.o
obj-y += speed.o
obj-y +=time.o
+obj-y += fsl_i2c.o
obj-$(CONFIG_MP) += mp.o
obj-$(CONFIG_OFTREE) += fdt.o
obj-$(CONFIG_DRIVER_NET_GIANFAR) += eth-devices.o
diff --git a/arch/ppc/mach-mpc85xx/cpu.c b/arch/ppc/mach-mpc85xx/cpu.c
index 39343ff494..17a1c4cb37 100644
--- a/arch/ppc/mach-mpc85xx/cpu.c
+++ b/arch/ppc/mach-mpc85xx/cpu.c
@@ -44,8 +44,10 @@ long int initdram(int board_type)
{
phys_size_t dram_size = 0;
- dram_size = fixed_sdram();
-
+ if (IS_ENABLED(CONFIG_DDR_SPD))
+ dram_size = fsl_ddr_sdram();
+ else
+ dram_size = fixed_sdram();
dram_size = e500_setup_ddr_tlbs(dram_size / 0x100000);
dram_size *= 0x100000;
diff --git a/arch/ppc/mach-mpc85xx/include/mach/clock.h b/arch/ppc/mach-mpc85xx/include/mach/clock.h
index e20d68518e..0e68cf6667 100644
--- a/arch/ppc/mach-mpc85xx/include/mach/clock.h
+++ b/arch/ppc/mach-mpc85xx/include/mach/clock.h
@@ -11,6 +11,7 @@ struct sys_info {
};
unsigned long fsl_get_bus_freq(ulong dummy);
+unsigned long fsl_get_ddr_freq(ulong dummy);
unsigned long fsl_get_timebase_clock(void);
unsigned long fsl_get_i2c_freq(void);
void fsl_get_sys_info(struct sys_info *sysInfo);
diff --git a/arch/ppc/mach-mpc85xx/speed.c b/arch/ppc/mach-mpc85xx/speed.c
index 64c10f927c..eb9d725dd4 100644
--- a/arch/ppc/mach-mpc85xx/speed.c
+++ b/arch/ppc/mach-mpc85xx/speed.c
@@ -90,6 +90,15 @@ unsigned long fsl_get_bus_freq(ulong dummy)
return sys_info.freqSystemBus;
}
+unsigned long fsl_get_ddr_freq(ulong dummy)
+{
+ struct sys_info sys_info;
+
+ fsl_get_sys_info(&sys_info);
+
+ return sys_info.freqDDRBus;
+}
+
unsigned long fsl_get_timebase_clock(void)
{
struct sys_info sysinfo;