diff options
| author | Vyacheslav Yurkov <Vyacheslav.Yurkov@bruker.com> | 2022-11-01 11:33:27 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2022-11-02 09:07:08 +0100 |
| commit | 1f57cc8f01c91a81b0ed7859614ea3290013e909 (patch) | |
| tree | aedc6cd055d63c452ddb41d52d48b4a8a4a306d4 | |
| parent | 28366ce804344b7055bfadf7970ea05cd7e52f56 (diff) | |
| download | barebox-1f57cc8f01c91a81b0ed7859614ea3290013e909.tar.gz barebox-1f57cc8f01c91a81b0ed7859614ea3290013e909.tar.xz | |
ARM: socfpga: Configure F2SDRAM bridges
When DDR firewall configuration is updated the F2SDRAM bridges need to
be brought from reset.
Signed-off-by: Vyacheslav Yurkov <Vyacheslav.Yurkov@bruker.com>
Link: https://lore.barebox.org/20221101103327.985435-2-uvv.mail@gmail.com
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| -rw-r--r-- | arch/arm/mach-socfpga/arria10-sdram.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/mach-socfpga/arria10-sdram.c b/arch/arm/mach-socfpga/arria10-sdram.c index b7eade0b17..a6eb63299a 100644 --- a/arch/arm/mach-socfpga/arria10-sdram.c +++ b/arch/arm/mach-socfpga/arria10-sdram.c @@ -468,6 +468,18 @@ static void arria10_sdram_mmr_init(void) } } +static void arria10_f2sdram_bridges_reset(void) +{ + uint32_t val; + + /* Release F2SDRAM bridges from reset */ + val = readl(ARRIA10_RSTMGR_ADDR + ARRIA10_RSTMGR_BRGMODRST); + val &= ~(ARRIA10_RSTMGR_BRGMODRST_F2SSDRAM0 | + ARRIA10_RSTMGR_BRGMODRST_F2SSDRAM1 | + ARRIA10_RSTMGR_BRGMODRST_F2SSDRAM2); + writel(val, ARRIA10_RSTMGR_ADDR + ARRIA10_RSTMGR_BRGMODRST); +} + static int arria10_sdram_firewall_setup(void) { uint32_t mpu_en = 0; @@ -512,6 +524,8 @@ static int arria10_sdram_firewall_setup(void) writel(0xffff0000, ARRIA10_NOC_FW_DDR_L3_HPSREGION0ADDR); writel(ARRIA10_NOC_FW_DDR_L3_HPSREG0EN, ARRIA10_NOC_FW_DDR_L3_EN); + arria10_f2sdram_bridges_reset(); + return 0; } |