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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2019-10-15 10:55:58 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2019-10-15 10:55:58 +0200 |
| commit | 2036f2866753a28b2783ad6dc78a40ca5345e6d8 (patch) | |
| tree | 468b1c17b06a2377c5f8e6d711d8f3187f60667f | |
| parent | 785f926d4527184194b6424bc39ce367e2cea7d8 (diff) | |
| download | barebox-2036f2866753a28b2783ad6dc78a40ca5345e6d8.tar.gz barebox-2036f2866753a28b2783ad6dc78a40ca5345e6d8.tar.xz | |
dts: update to v5.4-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
825 files changed, 38987 insertions, 9667 deletions
diff --git a/dts/Bindings/arm/actions.txt b/dts/Bindings/arm/actions.txt deleted file mode 100644 index d54f33c4e0..0000000000 --- a/dts/Bindings/arm/actions.txt +++ /dev/null @@ -1,56 +0,0 @@ -Actions Semi platforms device tree bindings -------------------------------------------- - - -S500 SoC -======== - -Required root node properties: - - - compatible : must contain "actions,s500" - - -Modules: - -Root node property compatible must contain, depending on module: - - - LeMaker Guitar: "lemaker,guitar" - - -Boards: - -Root node property compatible must contain, depending on board: - - - Allo.com Sparky: "allo,sparky" - - Cubietech CubieBoard6: "cubietech,cubieboard6" - - LeMaker Guitar Base Board rev. B: "lemaker,guitar-bb-rev-b", "lemaker,guitar" - - -S700 SoC -======== - -Required root node properties: - -- compatible : must contain "actions,s700" - - -Boards: - -Root node property compatible must contain, depending on board: - - - Cubietech CubieBoard7: "cubietech,cubieboard7" - - -S900 SoC -======== - -Required root node properties: - -- compatible : must contain "actions,s900" - - -Boards: - -Root node property compatible must contain, depending on board: - - - uCRobotics Bubblegum-96: "ucrobotics,bubblegum-96" diff --git a/dts/Bindings/arm/actions.yaml b/dts/Bindings/arm/actions.yaml new file mode 100644 index 0000000000..ace3fdaa83 --- /dev/null +++ b/dts/Bindings/arm/actions.yaml @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/actions.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Actions Semi platforms device tree bindings + +maintainers: + - Andreas Färber <afaerber@suse.de> + - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + +properties: + compatible: + oneOf: + # The Actions Semi S500 is a quad-core ARM Cortex-A9 SoC. + - items: + - enum: + - allo,sparky # Allo.com Sparky + - cubietech,cubieboard6 # Cubietech CubieBoard6 + - const: actions,s500 + - items: + - enum: + - lemaker,guitar-bb-rev-b # LeMaker Guitar Base Board rev. B + - const: lemaker,guitar + - const: actions,s500 + + # The Actions Semi S700 is a quad-core ARM Cortex-A53 SoC. + - items: + - enum: + - cubietech,cubieboard7 # Cubietech CubieBoard7 + - const: actions,s700 + + # The Actions Semi S900 is a quad-core ARM Cortex-A53 SoC. + - items: + - enum: + - ucrobotics,bubblegum-96 # uCRobotics Bubblegum-96 + - const: actions,s900 diff --git a/dts/Bindings/arm/amlogic.yaml b/dts/Bindings/arm/amlogic.yaml index 325c6fd356..99015cef8b 100644 --- a/dts/Bindings/arm/amlogic.yaml +++ b/dts/Bindings/arm/amlogic.yaml @@ -91,13 +91,11 @@ properties: - description: Boards with the Amlogic Meson GXL S905X SoC items: - enum: - - amediatech,x96-max - amlogic,p212 - hwacom,amazetv - khadas,vim - libretech,cc - nexbox,a95x - - seirobotics,sei510 - const: amlogic,s905x - const: amlogic,meson-gxl @@ -129,16 +127,33 @@ properties: - const: amlogic,a113d - const: amlogic,meson-axg - - description: Boards with the Amlogic Meson G12A S905D2 SoC + - description: Boards with the Amlogic Meson G12A S905D2/X2/Y2 SoC items: - enum: + - amediatech,x96-max - amlogic,u200 + - seirobotics,sei510 - const: amlogic,g12a + - description: Boards with the Amlogic Meson G12B A311D SoC + items: + - enum: + - khadas,vim3 + - const: amlogic,a311d + - const: amlogic,g12b + - description: Boards with the Amlogic Meson G12B S922X SoC items: - enum: - hardkernel,odroid-n2 + - khadas,vim3 + - const: amlogic,s922x - const: amlogic,g12b + - description: Boards with the Amlogic Meson SM1 S905X3/D3/Y3 SoC + items: + - enum: + - seirobotics,sei610 + - khadas,vim3l + - const: amlogic,sm1 ... diff --git a/dts/Bindings/arm/amlogic/amlogic,meson-gx-ao-secure.txt b/dts/Bindings/arm/amlogic/amlogic,meson-gx-ao-secure.txt deleted file mode 100644 index c67d9f48fb..0000000000 --- a/dts/Bindings/arm/amlogic/amlogic,meson-gx-ao-secure.txt +++ /dev/null @@ -1,28 +0,0 @@ -Amlogic Meson Firmware registers Interface ------------------------------------------- - -The Meson SoCs have a register bank with status and data shared with the -secure firmware. - -Required properties: - - compatible: For Meson GX SoCs, must be "amlogic,meson-gx-ao-secure", "syscon" - -Properties should indentify components of this register interface : - -Meson GX SoC Information ------------------------- -A firmware register encodes the SoC type, package and revision information on -the Meson GX SoCs. -If present, the following property should be added : - -Optional properties: - - amlogic,has-chip-id: If present, the interface gives the current SoC version. - -Example -------- - -ao-secure@140 { - compatible = "amlogic,meson-gx-ao-secure", "syscon"; - reg = <0x0 0x140 0x0 0x140>; - amlogic,has-chip-id; -}; diff --git a/dts/Bindings/arm/amlogic/amlogic,meson-gx-ao-secure.yaml b/dts/Bindings/arm/amlogic/amlogic,meson-gx-ao-secure.yaml new file mode 100644 index 0000000000..853d7d2b56 --- /dev/null +++ b/dts/Bindings/arm/amlogic/amlogic,meson-gx-ao-secure.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019 BayLibre, SAS +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/arm/amlogic/amlogic,meson-gx-ao-secure.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Amlogic Meson Firmware registers Interface + +maintainers: + - Neil Armstrong <narmstrong@baylibre.com> + +description: | + The Meson SoCs have a register bank with status and data shared with the + secure firmware. + +# We need a select here so we don't match all nodes with 'syscon' +select: + properties: + compatible: + contains: + const: amlogic,meson-gx-ao-secure + required: + - compatible + +properties: + compatible: + items: + - const: amlogic,meson-gx-ao-secure + - const: syscon + + reg: + maxItems: 1 + + amlogic,has-chip-id: + description: | + A firmware register encodes the SoC type, package and revision + information on the Meson GX SoCs. If present, the interface gives + the current SoC version. + type: boolean + +required: + - compatible + - reg + +examples: + - | + ao-secure@140 { + compatible = "amlogic,meson-gx-ao-secure", "syscon"; + reg = <0x140 0x140>; + amlogic,has-chip-id; + }; diff --git a/dts/Bindings/arm/arm,scmi.txt b/dts/Bindings/arm/arm,scmi.txt index 317a2fc366..083dbf96ee 100644 --- a/dts/Bindings/arm/arm,scmi.txt +++ b/dts/Bindings/arm/arm,scmi.txt @@ -73,6 +73,16 @@ Required properties: as used by the firmware. Refer to platform details for your implementation for the IDs to use. +Reset signal bindings for the reset domains based on SCMI Message Protocol +------------------------------------------------------------ + +This binding for the SCMI reset domain providers uses the generic reset +signal binding[5]. + +Required properties: + - #reset-cells : Should be 1. Contains the reset domain ID value used + by SCMI commands. + SRAM and Shared Memory for SCMI ------------------------------- @@ -93,6 +103,7 @@ Required sub-node properties: [2] Documentation/devicetree/bindings/power/power_domain.txt [3] Documentation/devicetree/bindings/thermal/thermal.txt [4] Documentation/devicetree/bindings/sram/sram.txt +[5] Documentation/devicetree/bindings/reset/reset.txt Example: @@ -152,6 +163,11 @@ firmware { reg = <0x15>; #thermal-sensor-cells = <1>; }; + + scmi_reset: protocol@16 { + reg = <0x16>; + #reset-cells = <1>; + }; }; }; @@ -166,6 +182,7 @@ hdlcd@7ff60000 { reg = <0 0x7ff60000 0 0x1000>; clocks = <&scmi_clk 4>; power-domains = <&scmi_devpd 1>; + resets = <&scmi_reset 10>; }; thermal-zones { diff --git a/dts/Bindings/arm/arm-boards b/dts/Bindings/arm/arm-boards index 6758ece324..b2a9f9f843 100644 --- a/dts/Bindings/arm/arm-boards +++ b/dts/Bindings/arm/arm-boards @@ -199,7 +199,7 @@ The description for the board must include: A detailed description of the bindings used for "psci" nodes is present in the psci.yaml file. - a "cpus" node describing the available cores and their associated - "enable-method"s. For more details see cpus.txt file. + "enable-method"s. For more details see cpus.yaml file. Example: diff --git a/dts/Bindings/arm/cpus.yaml b/dts/Bindings/arm/cpus.yaml index aa40b074b8..cb30895e3b 100644 --- a/dts/Bindings/arm/cpus.yaml +++ b/dts/Bindings/arm/cpus.yaml @@ -124,6 +124,7 @@ properties: - arm,cortex-a15 - arm,cortex-a17 - arm,cortex-a53 + - arm,cortex-a55 - arm,cortex-a57 - arm,cortex-a72 - arm,cortex-a73 @@ -155,6 +156,7 @@ properties: - qcom,krait - qcom,kryo - qcom,kryo385 + - qcom,kryo485 - qcom,scorpion enable-method: @@ -175,6 +177,7 @@ properties: - amlogic,meson8-smp - amlogic,meson8b-smp - arm,realview-smp + - aspeed,ast2600-smp - brcm,bcm11351-cpu-method - brcm,bcm23550 - brcm,bcm2836-smp diff --git a/dts/Bindings/arm/freescale/fsl,scu.txt b/dts/Bindings/arm/freescale/fsl,scu.txt index a575e42f7f..c149fadc6f 100644 --- a/dts/Bindings/arm/freescale/fsl,scu.txt +++ b/dts/Bindings/arm/freescale/fsl,scu.txt @@ -136,7 +136,9 @@ Required properties: OCOTP bindings based on SCU Message Protocol ------------------------------------------------------------ Required properties: -- compatible: Should be "fsl,imx8qxp-scu-ocotp" +- compatible: Should be one of: + "fsl,imx8qm-scu-ocotp", + "fsl,imx8qxp-scu-ocotp". - #address-cells: Must be 1. Contains byte index - #size-cells: Must be 1. Contains byte length diff --git a/dts/Bindings/arm/fsl.yaml b/dts/Bindings/arm/fsl.yaml index 7294ac36f4..1b4b4e6573 100644 --- a/dts/Bindings/arm/fsl.yaml +++ b/dts/Bindings/arm/fsl.yaml @@ -161,6 +161,20 @@ properties: items: - enum: - fsl,imx6ul-14x14-evk # i.MX6 UltraLite 14x14 EVK Board + - kontron,imx6ul-n6310-som # Kontron N6310 SOM + - const: fsl,imx6ul + + - description: Kontron N6310 S Board + items: + - const: kontron,imx6ul-n6310-s + - const: kontron,imx6ul-n6310-som + - const: fsl,imx6ul + + - description: Kontron N6310 S 43 Board + items: + - const: kontron,imx6ul-n6310-s-43 + - const: kontron,imx6ul-n6310-s + - const: kontron,imx6ul-n6310-som - const: fsl,imx6ul - description: i.MX6ULL based Boards @@ -188,6 +202,7 @@ properties: - fsl,imx7d-sdb # i.MX7 SabreSD Board - novtech,imx7d-meerkat96 # i.MX7 Meerkat96 Board - tq,imx7d-mba7 # i.MX7D TQ MBa7 with TQMa7D SoM + - zii,imx7d-rmu2 # ZII RMU2 Board - zii,imx7d-rpu2 # ZII RPU2 Board - const: fsl,imx7d @@ -214,16 +229,26 @@ properties: - fsl,imx8mm-evk # i.MX8MM EVK Board - const: fsl,imx8mm + - description: i.MX8MN based Boards + items: + - enum: + - fsl,imx8mn-ddr4-evk # i.MX8MN DDR4 EVK Board + - const: fsl,imx8mn + - description: i.MX8MQ based Boards items: - enum: + - boundary,imx8mq-nitrogen8m # i.MX8MQ NITROGEN Board - fsl,imx8mq-evk # i.MX8MQ EVK Board - purism,librem5-devkit # Purism Librem5 devkit + - solidrun,hummingboard-pulse # SolidRun Hummingboard Pulse + - technexion,pico-pi-imx8m # TechNexion PICO-PI-8M evk - const: fsl,imx8mq - description: i.MX8QXP based Boards items: - enum: + - einfochips,imx8qxp-ai_ml # i.MX8QXP AI_ML Board - fsl,imx8qxp-mek # i.MX8QXP MEK Board - const: fsl,imx8qxp @@ -283,6 +308,7 @@ properties: - description: LS1046A based Boards items: - enum: + - fsl,ls1046a-frwy - fsl,ls1046a-qds - fsl,ls1046a-rdb - const: fsl,ls1046a diff --git a/dts/Bindings/arm/idle-states.txt b/dts/Bindings/arm/idle-states.txt index 2d325bed37..771f5d20ae 100644 --- a/dts/Bindings/arm/idle-states.txt +++ b/dts/Bindings/arm/idle-states.txt @@ -28,7 +28,7 @@ PM implementation to put the processor in different idle states (which include states listed above; "off" state is not an idle state since it does not have wake-up capabilities, hence it is not considered in this document). -Idle state parameters (eg entry latency) are platform specific and need to be +Idle state parameters (e.g. entry latency) are platform specific and need to be characterized with bindings that provide the required information to OS PM code so that it can build the required tables and use them at runtime. @@ -90,24 +90,24 @@ These timing parameters can be used by an OS in different circumstances. An idle CPU requires the expected min-residency time to select the most appropriate idle state based on the expected expiry time of the next IRQ -(ie wake-up) that causes the CPU to return to the EXEC phase. +(i.e. wake-up) that causes the CPU to return to the EXEC phase. An operating system scheduler may need to compute the shortest wake-up delay for CPUs in the system by detecting how long will it take to get a CPU out -of an idle state, eg: +of an idle state, e.g.: wakeup-delay = exit-latency + max(entry-latency - (now - entry-timestamp), 0) In other words, the scheduler can make its scheduling decision by selecting -(eg waking-up) the CPU with the shortest wake-up latency. -The wake-up latency must take into account the entry latency if that period +(e.g. waking-up) the CPU with the shortest wake-up delay. +The wake-up delay must take into account the entry latency if that period has not expired. The abortable nature of the PREP period can be ignored if it cannot be relied upon (e.g. the PREP deadline may occur much sooner than -the worst case since it depends on the CPU operating conditions, ie caches +the worst case since it depends on the CPU operating conditions, i.e. caches state). An OS has to reliably probe the wakeup-latency since some devices can enforce -latency constraints guarantees to work properly, so the OS has to detect the +latency constraint guarantees to work properly, so the OS has to detect the worst case wake-up latency it can incur if a CPU is allowed to enter an idle state, and possibly to prevent that to guarantee reliable device functioning. @@ -183,15 +183,15 @@ and IDLE2: Graph 2: idle states min-residency example In graph 2 above, that takes into account idle states entry/exit energy -costs, it is clear that if the idle state residency time (ie time till next +costs, it is clear that if the idle state residency time (i.e. time till next wake-up IRQ) is less than IDLE2-min-residency, IDLE1 is the better idle state choice energywise. This is mainly down to the fact that IDLE1 entry/exit energy costs are lower than IDLE2. -However, the lower power consumption (ie shallower energy curve slope) of idle -state IDLE2 implies that after a suitable time, IDLE2 becomes more energy +However, the lower power consumption (i.e. shallower energy curve slope) of +idle state IDLE2 implies that after a suitable time, IDLE2 becomes more energy efficient. The time at which IDLE2 becomes more energy efficient than IDLE1 (and other @@ -214,8 +214,8 @@ processor idle states, defined as device tree nodes, are listed. Usage: Optional - On ARM systems, it is a container of processor idle states nodes. If the system does not provide CPU - power management capabilities or the processor just - supports idle_standby an idle-states node is not + power management capabilities, or the processor just + supports idle_standby, an idle-states node is not required. Description: idle-states node is a container node, where its @@ -287,14 +287,14 @@ follows: Value type: <prop-encoded-array> Definition: u32 value representing worst case latency in microseconds required to enter the idle state. - The exit-latency-us duration may be guaranteed - only after entry-latency-us has passed. - exit-latency-us Usage: Required Value type: <prop-encoded-array> Definition: u32 value representing worst case latency in microseconds required to exit the idle state. + The exit-latency-us duration may be guaranteed + only after entry-latency-us has passed. - min-residency-us Usage: Required @@ -342,8 +342,8 @@ follows: state. In addition to the properties listed above, a state node may require - additional properties specifics to the entry-method defined in the - idle-states node, please refer to the entry-method bindings + additional properties specific to the entry-method defined in the + idle-states node. Please refer to the entry-method bindings documentation for properties definitions. =========================================== diff --git a/dts/Bindings/arm/l2c2x0.yaml b/dts/Bindings/arm/l2c2x0.yaml index bfc5c18556..913a8cd8b2 100644 --- a/dts/Bindings/arm/l2c2x0.yaml +++ b/dts/Bindings/arm/l2c2x0.yaml @@ -176,6 +176,10 @@ properties: description: disable parity checking on the L2 cache (L220 or PL310). type: boolean + marvell,ecc-enable: + description: enable ECC protection on the L2 cache + type: boolean + arm,outer-sync-disable: description: disable the outer sync operation on the L2 cache. Some core tiles, especially ARM PB11MPCore have a faulty L220 cache that diff --git a/dts/Bindings/arm/marvell/ap806-system-controller.txt b/dts/Bindings/arm/marvell/ap806-system-controller.txt index 7b8b8eb019..26410fbb85 100644 --- a/dts/Bindings/arm/marvell/ap806-system-controller.txt +++ b/dts/Bindings/arm/marvell/ap806-system-controller.txt @@ -18,17 +18,19 @@ Clocks: ------- -The Device Tree node representing the AP806 system controller provides -a number of clocks: +The Device Tree node representing the AP806/AP807 system controller +provides a number of clocks: - - 0: clock of CPU cluster 0 - - 1: clock of CPU cluster 1 + - 0: reference clock of CPU cluster 0 + - 1: reference clock of CPU cluster 1 - 2: fixed PLL at 1200 Mhz - 3: MSS clock, derived from the fixed PLL Required properties: - - compatible: must be: "marvell,ap806-clock" + - compatible: must be one of: + * "marvell,ap806-clock" + * "marvell,ap807-clock" - #clock-cells: must be set to 1 Pinctrl: @@ -143,3 +145,33 @@ ap_syscon1: system-controller@6f8000 { #thermal-sensor-cells = <1>; }; }; + +Cluster clocks: +--------------- + +Device Tree Clock bindings for cluster clock of Marvell +AP806/AP807. Each cluster contain up to 2 CPUs running at the same +frequency. + +Required properties: + - compatible: must be one of: + * "marvell,ap806-cpu-clock" + * "marvell,ap807-cpu-clock" +- #clock-cells : should be set to 1. + +- clocks : shall be the input parent clock(s) phandle for the clock + (one per cluster) + +- reg: register range associated with the cluster clocks + +ap_syscon1: system-controller@6f8000 { + compatible = "marvell,armada-ap806-syscon1", "syscon", "simple-mfd"; + reg = <0x6f8000 0x1000>; + + cpu_clk: clock-cpu@278 { + compatible = "marvell,ap806-cpu-clock"; + clocks = <&ap_clk 0>, <&ap_clk 1>; + #clock-cells = <1>; + reg = <0x278 0xa30>; + }; +}; diff --git a/dts/Bindings/arm/marvell/armada-37xx.txt b/dts/Bindings/arm/marvell/armada-37xx.txt index eddde4faef..f6d6642d81 100644 --- a/dts/Bindings/arm/marvell/armada-37xx.txt +++ b/dts/Bindings/arm/marvell/armada-37xx.txt @@ -48,3 +48,11 @@ avs: avs@11500 { compatible = "marvell,armada-3700-avs", "syscon"; reg = <0x11500 0x40>; } + + +CZ.NIC's Turris Mox SOHO router Device Tree Bindings +---------------------------------------------------- + +Required root node property: + + - compatible: must contain "cznic,turris-mox" diff --git a/dts/Bindings/arm/marvell/cp110-system-controller.txt b/dts/Bindings/arm/marvell/cp110-system-controller.txt index 4db4119a6d..f982a8ed93 100644 --- a/dts/Bindings/arm/marvell/cp110-system-controller.txt +++ b/dts/Bindings/arm/marvell/cp110-system-controller.txt @@ -78,8 +78,8 @@ Documentation/devicetree/bindings/pinctrl/marvell,mvebu-pinctrl.txt. Required properties: -- compatible: "marvell,armada-7k-pinctrl", - "marvell,armada-8k-cpm-pinctrl" or "marvell,armada-8k-cps-pinctrl" +- compatible: "marvell,armada-7k-pinctrl", "marvell,armada-8k-cpm-pinctrl", + "marvell,armada-8k-cps-pinctrl" or "marvell,cp115-standalone-pinctrl" depending on the specific variant of the SoC being used. Available mpp pins/groups and functions: diff --git a/dts/Bindings/arm/mediatek.yaml b/dts/Bindings/arm/mediatek.yaml index a4ad2eb926..4043c50464 100644 --- a/dts/Bindings/arm/mediatek.yaml +++ b/dts/Bindings/arm/mediatek.yaml @@ -48,6 +48,10 @@ properties: - const: mediatek,mt6765 - items: - enum: + - mediatek,mt6779-evb + - const: mediatek,mt6779 + - items: + - enum: - mediatek,mt6795-evb - const: mediatek,mt6795 - items: diff --git a/dts/Bindings/arm/mediatek/mediatek,apmixedsys.txt b/dts/Bindings/arm/mediatek/mediatek,apmixedsys.txt index 161e63a6c2..ff000ccade 100644 --- a/dts/Bindings/arm/mediatek/mediatek,apmixedsys.txt +++ b/dts/Bindings/arm/mediatek/mediatek,apmixedsys.txt @@ -8,6 +8,7 @@ Required Properties: - compatible: Should be one of: - "mediatek,mt2701-apmixedsys" - "mediatek,mt2712-apmixedsys", "syscon" + - "mediatek,mt6779-apmixedsys", "syscon" - "mediatek,mt6797-apmixedsys" - "mediatek,mt7622-apmixedsys" - "mediatek,mt7623-apmixedsys", "mediatek,mt2701-apmixedsys" diff --git a/dts/Bindings/arm/mediatek/mediatek,audsys.txt b/dts/Bindings/arm/mediatek/mediatek,audsys.txt index 07c9d81346..e4ca7b7031 100644 --- a/dts/Bindings/arm/mediatek/mediatek,audsys.txt +++ b/dts/Bindings/arm/mediatek/mediatek,audsys.txt @@ -7,6 +7,7 @@ Required Properties: - compatible: Should be one of: - "mediatek,mt2701-audsys", "syscon" + - "mediatek,mt6779-audio", "syscon" - "mediatek,mt7622-audsys", "syscon" - "mediatek,mt7623-audsys", "mediatek,mt2701-audsys", "syscon" - "mediatek,mt8183-audiosys", "syscon" diff --git a/dts/Bindings/arm/mediatek/mediatek,camsys.txt b/dts/Bindings/arm/mediatek/mediatek,camsys.txt index d8930f64aa..1f4aaa15a3 100644 --- a/dts/Bindings/arm/mediatek/mediatek,camsys.txt +++ b/dts/Bindings/arm/mediatek/mediatek,camsys.txt @@ -6,6 +6,7 @@ The MediaTek camsys controller provides various clocks to the system. Required Properties: - compatible: Should be one of: + - "mediatek,mt6779-camsys", "syscon" - "mediatek,mt8183-camsys", "syscon" - #clock-cells: Must be 1 diff --git a/dts/Bindings/arm/mediatek/mediatek,imgsys.txt b/dts/Bindings/arm/mediatek/mediatek,imgsys.txt index e3bc4a1e7a..2b693e343c 100644 --- a/dts/Bindings/arm/mediatek/mediatek,imgsys.txt +++ b/dts/Bindings/arm/mediatek/mediatek,imgsys.txt @@ -8,6 +8,7 @@ Required Properties: - compatible: Should be one of: - "mediatek,mt2701-imgsys", "syscon" - "mediatek,mt2712-imgsys", "syscon" + - "mediatek,mt6779-imgsys", "syscon" - "mediatek,mt6797-imgsys", "syscon" - "mediatek,mt7623-imgsys", "mediatek,mt2701-imgsys", "syscon" - "mediatek,mt8173-imgsys", "syscon" diff --git a/dts/Bindings/arm/mediatek/mediatek,infracfg.txt b/dts/Bindings/arm/mediatek/mediatek,infracfg.txt index a90913988d..db2f4fd754 100644 --- a/dts/Bindings/arm/mediatek/mediatek,infracfg.txt +++ b/dts/Bindings/arm/mediatek/mediatek,infracfg.txt @@ -9,6 +9,7 @@ Required Properties: - compatible: Should be one of: - "mediatek,mt2701-infracfg", "syscon" - "mediatek,mt2712-infracfg", "syscon" + - "mediatek,mt6779-infracfg_ao", "syscon" - "mediatek,mt6797-infracfg", "syscon" - "mediatek,mt7622-infracfg", "syscon" - "mediatek,mt7623-infracfg", "mediatek,mt2701-infracfg", "syscon" diff --git a/dts/Bindings/arm/mediatek/mediatek,ipesys.txt b/dts/Bindings/arm/mediatek/mediatek,ipesys.txt new file mode 100644 index 0000000000..2ce889b023 --- /dev/null +++ b/dts/Bindings/arm/mediatek/mediatek,ipesys.txt @@ -0,0 +1,22 @@ +Mediatek ipesys controller +============================ + +The Mediatek ipesys controller provides various clocks to the system. + +Required Properties: + +- compatible: Should be one of: + - "mediatek,mt6779-ipesys", "syscon" +- #clock-cells: Must be 1 + +The ipesys controller uses the common clk binding from +Documentation/devicetree/bindings/clock/clock-bindings.txt +The available clocks are defined in dt-bindings/clock/mt*-clk.h. + +Example: + +ipesys: clock-controller@1b000000 { + compatible = "mediatek,mt6779-ipesys", "syscon"; + reg = <0 0x1b000000 0 0x1000>; + #clock-cells = <1>; +}; diff --git a/dts/Bindings/arm/mediatek/mediatek,mfgcfg.txt b/dts/Bindings/arm/mediatek/mediatek,mfgcfg.txt index 72787e7dd2..ad5f9d2f68 100644 --- a/dts/Bindings/arm/mediatek/mediatek,mfgcfg.txt +++ b/dts/Bindings/arm/mediatek/mediatek,mfgcfg.txt @@ -7,6 +7,7 @@ Required Properties: - compatible: Should be one of: - "mediatek,mt2712-mfgcfg", "syscon" + - "mediatek,mt6779-mfgcfg", "syscon" - "mediatek,mt8183-mfgcfg", "syscon" - #clock-cells: Must be 1 diff --git a/dts/Bindings/arm/mediatek/mediatek,mmsys.txt b/dts/Bindings/arm/mediatek/mediatek,mmsys.txt index 545eab717c..301eefbe16 100644 --- a/dts/Bindings/arm/mediatek/mediatek,mmsys.txt +++ b/dts/Bindings/arm/mediatek/mediatek,mmsys.txt @@ -8,6 +8,7 @@ Required Properties: - compatible: Should be one of: - "mediatek,mt2701-mmsys", "syscon" - "mediatek,mt2712-mmsys", "syscon" + - "mediatek,mt6779-mmsys", "syscon" - "mediatek,mt6797-mmsys", "syscon" - "mediatek,mt7623-mmsys", "mediatek,mt2701-mmsys", "syscon" - "mediatek,mt8173-mmsys", "syscon" diff --git a/dts/Bindings/arm/mediatek/mediatek,pericfg.txt b/dts/Bindings/arm/mediatek/mediatek,pericfg.txt index 4c7e478117..ecf027a900 100644 --- a/dts/Bindings/arm/mediatek/mediatek,pericfg.txt +++ b/dts/Bindings/arm/mediatek/mediatek,pericfg.txt @@ -14,6 +14,7 @@ Required Properties: - "mediatek,mt7629-pericfg", "syscon" - "mediatek,mt8135-pericfg", "syscon" - "mediatek,mt8173-pericfg", "syscon" + - "mediatek,mt8183-pericfg", "syscon" - #clock-cells: Must be 1 - #reset-cells: Must be 1 diff --git a/dts/Bindings/arm/mediatek/mediatek,sgmiisys.txt b/dts/Bindings/arm/mediatek/mediatek,sgmiisys.txt index f5518f26a9..30cb645c0e 100644 --- a/dts/Bindings/arm/mediatek/mediatek,sgmiisys.txt +++ b/dts/Bindings/arm/mediatek/mediatek,sgmiisys.txt @@ -9,8 +9,6 @@ Required Properties: - "mediatek,mt7622-sgmiisys", "syscon" - "mediatek,mt7629-sgmiisys", "syscon" - #clock-cells: Must be 1 -- mediatek,physpeed: Should be one of "auto", "1000" or "2500" to match up - the capability of the target PHY. The SGMIISYS controller uses the common clk binding from Documentation/devicetree/bindings/clock/clock-bindings.txt diff --git a/dts/Bindings/arm/mediatek/mediatek,topckgen.txt b/dts/Bindings/arm/mediatek/mediatek,topckgen.txt index a023b83389..0293d693ce 100644 --- a/dts/Bindings/arm/mediatek/mediatek,topckgen.txt +++ b/dts/Bindings/arm/mediatek/mediatek,topckgen.txt @@ -8,6 +8,7 @@ Required Properties: - compatible: Should be one of: - "mediatek,mt2701-topckgen" - "mediatek,mt2712-topckgen", "syscon" + - "mediatek,mt6779-topckgen", "syscon" - "mediatek,mt6797-topckgen" - "mediatek,mt7622-topckgen" - "mediatek,mt7623-topckgen", "mediatek,mt2701-topckgen" diff --git a/dts/Bindings/arm/mediatek/mediatek,vdecsys.txt b/dts/Bindings/arm/mediatek/mediatek,vdecsys.txt index 57176bb8db..7894558b7a 100644 --- a/dts/Bindings/arm/mediatek/mediatek,vdecsys.txt +++ b/dts/Bindings/arm/mediatek/mediatek,vdecsys.txt @@ -8,6 +8,7 @@ Required Properties: - compatible: Should be one of: - "mediatek,mt2701-vdecsys", "syscon" - "mediatek,mt2712-vdecsys", "syscon" + - "mediatek,mt6779-vdecsys", "syscon" - "mediatek,mt6797-vdecsys", "syscon" - "mediatek,mt7623-vdecsys", "mediatek,mt2701-vdecsys", "syscon" - "mediatek,mt8173-vdecsys", "syscon" diff --git a/dts/Bindings/arm/mediatek/mediatek,vencsys.txt b/dts/Bindings/arm/mediatek/mediatek,vencsys.txt index c9faa62690..6a6a14e15c 100644 --- a/dts/Bindings/arm/mediatek/mediatek,vencsys.txt +++ b/dts/Bindings/arm/mediatek/mediatek,vencsys.txt @@ -7,6 +7,7 @@ Required Properties: - compatible: Should be one of: - "mediatek,mt2712-vencsys", "syscon" + - "mediatek,mt6779-vencsys", "syscon" - "mediatek,mt6797-vencsys", "syscon" - "mediatek,mt8173-vencsys", "syscon" - "mediatek,mt8183-vencsys", "syscon" diff --git a/dts/Bindings/arm/qcom.yaml b/dts/Bindings/arm/qcom.yaml index 54ef6b6b91..e39d8f02e3 100644 --- a/dts/Bindings/arm/qcom.yaml +++ b/dts/Bindings/arm/qcom.yaml @@ -45,6 +45,7 @@ description: | mtp sbc hk01 + qrd The 'soc_version' and 'board_version' elements take the form of v<Major>.<Minor> where the minor number may be omitted when it's zero, i.e. v1.0 is the same @@ -116,6 +117,13 @@ properties: - const: qcom,msm8916 - items: + - enum: + - longcheer,l8150 + - samsung,a3u-eur + - samsung,a5u-eur + - const: qcom,msm8916 + + - items: - const: qcom,msm8996-mtp - items: diff --git a/dts/Bindings/arm/realtek.txt b/dts/Bindings/arm/realtek.txt deleted file mode 100644 index 95839e19ae..0000000000 --- a/dts/Bindings/arm/realtek.txt +++ /dev/null @@ -1,22 +0,0 @@ -Realtek platforms device tree bindings --------------------------------------- - - -RTD1295 SoC -=========== - -Required root node properties: - - - compatible : must contain "realtek,rtd1295" - - -Root node property compatible must contain, depending on board: - - - MeLE V9: "mele,v9" - - ProBox2 AVA: "probox2,ava" - - Zidoo X9S: "zidoo,x9s" - - -Example: - - compatible = "zidoo,x9s", "realtek,rtd1295"; diff --git a/dts/Bindings/arm/realtek.yaml b/dts/Bindings/arm/realtek.yaml new file mode 100644 index 0000000000..3528b61963 --- /dev/null +++ b/dts/Bindings/arm/realtek.yaml @@ -0,0 +1,23 @@ +# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/realtek.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek platforms device tree bindings + +maintainers: + - Andreas Färber <afaerber@suse.de> + +properties: + $nodename: + const: '/' + compatible: + # RTD1295 SoC based boards + items: + - enum: + - mele,v9 + - probox2,ava + - zidoo,x9s + - const: realtek,rtd1295 +... diff --git a/dts/Bindings/arm/rockchip.yaml b/dts/Bindings/arm/rockchip.yaml index 34865042f4..c82c5e57d4 100644 --- a/dts/Bindings/arm/rockchip.yaml +++ b/dts/Bindings/arm/rockchip.yaml @@ -128,6 +128,21 @@ properties: - const: google,veyron - const: rockchip,rk3288 + - description: Google Fievel (AOPEN Chromebox Mini) + items: + - const: google,veyron-fievel-rev8 + - const: google,veyron-fievel-rev7 + - const: google,veyron-fievel-rev6 + - const: google,veyron-fievel-rev5 + - const: google,veyron-fievel-rev4 + - const: google,veyron-fievel-rev3 + - const: google,veyron-fievel-rev2 + - const: google,veyron-fievel-rev1 + - const: google,veyron-fievel-rev0 + - const: google,veyron-fievel + - const: google,veyron + - const: rockchip,rk3288 + - description: Google Gru (dev-board) items: - const: google,gru-rev15 @@ -311,6 +326,21 @@ properties: - const: google,veyron - const: rockchip,rk3288 + - description: Google Tiger (AOpen Chromebase Mini) + items: + - const: google,veyron-tiger-rev8 + - const: google,veyron-tiger-rev7 + - const: google,veyron-tiger-rev6 + - const: google,veyron-tiger-rev5 + - const: google,veyron-tiger-rev4 + - const: google,veyron-tiger-rev3 + - const: google,veyron-tiger-rev2 + - const: google,veyron-tiger-rev1 + - const: google,veyron-tiger-rev0 + - const: google,veyron-tiger + - const: google,veyron + - const: rockchip,rk3288 + - description: Haoyu MarsBoard RK3066 items: - const: haoyu,marsboard-rk3066 @@ -329,6 +359,16 @@ properties: - khadas,edge-v - const: rockchip,rk3399 + - description: Mecer Xtreme Mini S6 + items: + - const: mecer,xms6 + - const: rockchip,rk3229 + + - description: Leez RK3399 P710 + items: + - const: leez,p710 + - const: rockchip,rk3399 + - description: mqmaker MiQi items: - const: mqmaker,miqi @@ -424,11 +464,6 @@ properties: - rockchip,rk3288-evb-rk808 - const: rockchip,rk3288 - - description: Rockchip RK3288 Fennec - items: - - const: rockchip,rk3288-fennec - - const: rockchip,rk3288 - - description: Rockchip RK3328 Evaluation board items: - const: rockchip,rk3328-evb diff --git a/dts/Bindings/arm/sunxi.yaml b/dts/Bindings/arm/sunxi.yaml index 000a00d12d..972b1e9ee8 100644 --- a/dts/Bindings/arm/sunxi.yaml +++ b/dts/Bindings/arm/sunxi.yaml @@ -353,6 +353,12 @@ properties: - const: licheepi,licheepi-zero - const: allwinner,sun8i-v3s + - description: Lichee Zero Plus (with S3, without eMMC/SPI Flash) + items: + - const: sipeed,lichee-zero-plus + - const: sochip,s3 + - const: allwinner,sun8i-v3 + - description: Linksprite PCDuino items: - const: linksprite,a10-pcduino @@ -568,6 +574,11 @@ properties: - const: olimex,a64-olinuxino - const: allwinner,sun50i-a64 + - description: Olimex A64-OlinuXino (with eMMC) + items: + - const: olimex,a64-olinuxino-emmc + - const: allwinner,sun50i-a64 + - description: Olimex A64 Teres-I items: - const: olimex,a64-teres-i @@ -671,6 +682,11 @@ properties: - const: sinlinx,sina33 - const: allwinner,sun8i-a33 + - description: Tanix TX6 + items: + - const: oranth,tanix-tx6 + - const: allwinner,sun50i-h6 + - description: TBS A711 Tablet items: - const: tbs-biometrics,a711 diff --git a/dts/Bindings/ata/ahci-platform.txt b/dts/Bindings/ata/ahci-platform.txt index e30fd106df..55c6fab1b3 100644 --- a/dts/Bindings/ata/ahci-platform.txt +++ b/dts/Bindings/ata/ahci-platform.txt @@ -45,7 +45,7 @@ Required properties when using sub-nodes: - #address-cells : number of cells to encode an address - #size-cells : number of cells representing the size of an address -For allwinner,sun8i-r40-ahci, the reset propertie must be present. +For allwinner,sun8i-r40-ahci, the reset property must be present. Sub-nodes required properties: - reg : the port number diff --git a/dts/Bindings/bus/allwinner,sun50i-a64-de2.yaml b/dts/Bindings/bus/allwinner,sun50i-a64-de2.yaml new file mode 100644 index 0000000000..d2a8722864 --- /dev/null +++ b/dts/Bindings/bus/allwinner,sun50i-a64-de2.yaml @@ -0,0 +1,85 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bus/allwinner,sun50i-a64-de2.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner A64 Display Engine Bus Device Tree Bindings + +maintainers: + - Chen-Yu Tsai <wens@csie.org> + - Maxime Ripard <maxime.ripard@bootlin.com> + +properties: + $nodename: + pattern: "^bus(@[0-9a-f]+)?$" + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + compatible: + oneOf: + - const: allwinner,sun50i-a64-de2 + - items: + - const: allwinner,sun50i-h6-de3 + - const: allwinner,sun50i-a64-de2 + + reg: + maxItems: 1 + + allwinner,sram: + allOf: + - $ref: /schemas/types.yaml#definitions/phandle-array + - maxItems: 1 + description: + The SRAM that needs to be claimed to access the display engine + bus. + + ranges: true + +patternProperties: + # All other properties should be child nodes with unit-address and 'reg' + "^[a-zA-Z][a-zA-Z0-9,+\\-._]{0,63}@[0-9a-fA-F]+$": + type: object + properties: + reg: + maxItems: 1 + + required: + - reg + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + - ranges + - allwinner,sram + +additionalProperties: false + +examples: + - | + bus@1000000 { + compatible = "allwinner,sun50i-a64-de2"; + reg = <0x1000000 0x400000>; + allwinner,sram = <&de2_sram 1>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x1000000 0x400000>; + + display_clocks: clock@0 { + compatible = "allwinner,sun50i-a64-de2-clk"; + reg = <0x0 0x100000>; + clocks = <&ccu 52>, <&ccu 99>; + clock-names = "bus", "mod"; + resets = <&ccu 30>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + }; + +... diff --git a/dts/Bindings/bus/imx-weim.txt b/dts/Bindings/bus/imx-weim.txt index dda7d6d664..1b1d1c5c21 100644 --- a/dts/Bindings/bus/imx-weim.txt +++ b/dts/Bindings/bus/imx-weim.txt @@ -44,6 +44,10 @@ Optional properties: what bootloader sets up in IOMUXC_GPR1[11:0] will be used. + - fsl,burst-clk-enable For "fsl,imx50-weim" and "fsl,imx6q-weim" type of + devices, the presence of this property indicates that + the weim bus should operate in Burst Clock Mode. + Timing property for child nodes. It is mandatory, not optional. - fsl,weim-cs-timing: The timing array, contains timing values for the diff --git a/dts/Bindings/bus/moxtet.txt b/dts/Bindings/bus/moxtet.txt new file mode 100644 index 0000000000..fb50fc8653 --- /dev/null +++ b/dts/Bindings/bus/moxtet.txt @@ -0,0 +1,46 @@ +Turris Mox module status and configuration bus (over SPI) + +Required properties: + - compatible : Should be "cznic,moxtet" + - #address-cells : Has to be 1 + - #size-cells : Has to be 0 + - spi-cpol : Required inverted clock polarity + - spi-cpha : Required shifted clock phase + - interrupts : Must contain reference to the shared interrupt line + - interrupt-controller : Required + - #interrupt-cells : Has to be 1 + +For other required and optional properties of SPI slave nodes please refer to +../spi/spi-bus.txt. + +Required properties of subnodes: + - reg : Should be position on the Moxtet bus (how many Moxtet + modules are between this module and CPU module, so + either 0 or a positive integer) + +The driver finds the devices connected to the bus by itself, but it may be +needed to reference some of them from other parts of the device tree. In that +case the devices can be defined as subnodes of the moxtet node. + +Example: + + moxtet@1 { + compatible = "cznic,moxtet"; + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + spi-max-frequency = <10000000>; + spi-cpol; + spi-cpha; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&gpiosb>; + interrupts = <5 IRQ_TYPE_EDGE_FALLING>; + + moxtet_sfp: gpio@0 { + compatible = "cznic,moxtet-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0>; + } + }; diff --git a/dts/Bindings/bus/qcom,ebi2.txt b/dts/Bindings/bus/qcom,ebi2.txt index 5a7d567f68..5058aa2c63 100644 --- a/dts/Bindings/bus/qcom,ebi2.txt +++ b/dts/Bindings/bus/qcom,ebi2.txt @@ -71,7 +71,7 @@ Optional subnodes: The following optional properties are properties that can be tagged onto any device subnode. We are assuming that there can be only ONE device per -chipselect subnode, else the properties will become ambigous. +chipselect subnode, else the properties will become ambiguous. Optional properties arrays for SLOW chip selects: - qcom,xmem-recovery-cycles: recovery cycles is the time the memory continues to diff --git a/dts/Bindings/bus/sun50i-de2-bus.txt b/dts/Bindings/bus/sun50i-de2-bus.txt deleted file mode 100644 index b9d533717d..0000000000 --- a/dts/Bindings/bus/sun50i-de2-bus.txt +++ /dev/null @@ -1,40 +0,0 @@ -Device tree bindings for Allwinner DE2/3 bus - -The Allwinner A64 DE2 is on a special bus, which needs a SRAM region (SRAM C) -to be claimed for enabling the access. The DE3 on Allwinner H6 is at the same -situation, and the binding also applies. - -Required properties: - - - compatible: Should be one of: - - "allwinner,sun50i-a64-de2" - - "allwinner,sun50i-h6-de3", "allwinner,sun50i-a64-de2" - - reg: A resource specifier for the register space - - #address-cells: Must be set to 1 - - #size-cells: Must be set to 1 - - ranges: Must be set up to map the address space inside the - DE2, for the sub-blocks of DE2. - - allwinner,sram: the SRAM that needs to be claimed - -Example: - - de2@1000000 { - compatible = "allwinner,sun50i-a64-de2"; - reg = <0x1000000 0x400000>; - allwinner,sram = <&de2_sram 1>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x1000000 0x400000>; - - display_clocks: clock@0 { - compatible = "allwinner,sun50i-a64-de2-clk"; - reg = <0x0 0x100000>; - clocks = <&ccu CLK_DE>, - <&ccu CLK_BUS_DE>; - clock-names = "mod", - "bus"; - resets = <&ccu RST_BUS_DE>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - }; diff --git a/dts/Bindings/clock/allwinner,sun4i-a10-ccu.yaml b/dts/Bindings/clock/allwinner,sun4i-a10-ccu.yaml index fa4d143a73..64938fdaea 100644 --- a/dts/Bindings/clock/allwinner,sun4i-a10-ccu.yaml +++ b/dts/Bindings/clock/allwinner,sun4i-a10-ccu.yaml @@ -31,6 +31,7 @@ properties: - allwinner,sun8i-h3-ccu - allwinner,sun8i-h3-r-ccu - allwinner,sun8i-r40-ccu + - allwinner,sun8i-v3-ccu - allwinner,sun8i-v3s-ccu - allwinner,sun9i-a80-ccu - allwinner,sun50i-a64-ccu diff --git a/dts/Bindings/clock/amlogic,axg-audio-clkc.txt b/dts/Bindings/clock/amlogic,axg-audio-clkc.txt index 0f777749f4..b3957d10d2 100644 --- a/dts/Bindings/clock/amlogic,axg-audio-clkc.txt +++ b/dts/Bindings/clock/amlogic,axg-audio-clkc.txt @@ -22,6 +22,7 @@ Required Properties: components. - resets : phandle of the internal reset line - #clock-cells : should be 1. +- #reset-cells : should be 1 on the g12a (and following) soc family Each clock is assigned an identifier and client nodes can use this identifier to specify the clock which they consume. All available clocks are defined as diff --git a/dts/Bindings/clock/amlogic,gxbb-clkc.txt b/dts/Bindings/clock/amlogic,gxbb-clkc.txt index 6eaa520923..7ccecd5c02 100644 --- a/dts/Bindings/clock/amlogic,gxbb-clkc.txt +++ b/dts/Bindings/clock/amlogic,gxbb-clkc.txt @@ -11,6 +11,7 @@ Required Properties: "amlogic,axg-clkc" for AXG SoC. "amlogic,g12a-clkc" for G12A SoC. "amlogic,g12b-clkc" for G12B SoC. + "amlogic,sm1-clkc" for SM1 SoC. - clocks : list of clock phandle, one for each entry clock-names. - clock-names : should contain the following: * "xtal": the platform xtal diff --git a/dts/Bindings/clock/brcm,bcm2835-cprman.txt b/dts/Bindings/clock/brcm,bcm2835-cprman.txt index dd906db34b..9e0b03a651 100644 --- a/dts/Bindings/clock/brcm,bcm2835-cprman.txt +++ b/dts/Bindings/clock/brcm,bcm2835-cprman.txt @@ -12,7 +12,9 @@ clock generators, but a few (like the ARM or HDMI) will source from the PLL dividers directly. Required properties: -- compatible: Should be "brcm,bcm2835-cprman" +- compatible: should be one of the following, + "brcm,bcm2711-cprman" + "brcm,bcm2835-cprman" - #clock-cells: Should be <1>. The permitted clock-specifier values can be found in include/dt-bindings/clock/bcm2835.h - reg: Specifies base physical address and size of the registers diff --git a/dts/Bindings/clock/imx8mn-clock.yaml b/dts/Bindings/clock/imx8mn-clock.yaml new file mode 100644 index 0000000000..622f3658bd --- /dev/null +++ b/dts/Bindings/clock/imx8mn-clock.yaml @@ -0,0 +1,112 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bindings/clock/imx8mn-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX8M Nano Clock Control Module Binding + +maintainers: + - Anson Huang <Anson.Huang@nxp.com> + +description: | + NXP i.MX8M Nano clock control module is an integrated clock controller, which + generates and supplies to all modules. + +properties: + compatible: + const: fsl,imx8mn-ccm + + reg: + maxItems: 1 + + clocks: + items: + - description: 32k osc + - description: 24m osc + - description: ext1 clock input + - description: ext2 clock input + - description: ext3 clock input + - description: ext4 clock input + + clock-names: + items: + - const: osc_32k + - const: osc_24m + - const: clk_ext1 + - const: clk_ext2 + - const: clk_ext3 + - const: clk_ext4 + + '#clock-cells': + const: 1 + description: | + The clock consumer should specify the desired clock by having the clock + ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8mn-clock.h + for the full list of i.MX8M Nano clock IDs. + +required: + - compatible + - reg + - clocks + - clock-names + - '#clock-cells' + +examples: + # Clock Control Module node: + - | + clk: clock-controller@30380000 { + compatible = "fsl,imx8mn-ccm"; + reg = <0x0 0x30380000 0x0 0x10000>; + #clock-cells = <1>; + clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, + <&clk_ext2>, <&clk_ext3>, <&clk_ext4>; + clock-names = "osc_32k", "osc_24m", "clk_ext1", + "clk_ext2", "clk_ext3", "clk_ext4"; + }; + + # Required external clocks for Clock Control Module node: + - | + osc_32k: clock-osc-32k { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-output-names = "osc_32k"; + }; + + osc_24m: clock-osc-24m { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + clock-output-names = "osc_24m"; + }; + + clk_ext1: clock-ext1 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <133000000>; + clock-output-names = "clk_ext1"; + }; + + clk_ext2: clock-ext2 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <133000000>; + clock-output-names = "clk_ext2"; + }; + + clk_ext3: clock-ext3 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <133000000>; + clock-output-names = "clk_ext3"; + }; + + clk_ext4: clock-ext4 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency= <133000000>; + clock-output-names = "clk_ext4"; + }; + +... diff --git a/dts/Bindings/clock/qcom,gcc.txt b/dts/Bindings/clock/qcom,gcc.txt index 8661c3cd3c..d14362ad41 100644 --- a/dts/Bindings/clock/qcom,gcc.txt +++ b/dts/Bindings/clock/qcom,gcc.txt @@ -23,6 +23,7 @@ Required properties : "qcom,gcc-sdm630" "qcom,gcc-sdm660" "qcom,gcc-sdm845" + "qcom,gcc-sm8150" - reg : shall contain base register location and length - #clock-cells : shall contain 1 @@ -38,6 +39,13 @@ Documentation/devicetree/bindings/thermal/qcom-tsens.txt - protected-clocks : Protected clock specifier list as per common clock binding. +For SM8150 only: + - clocks: a list of phandles and clock-specifier pairs, + one for each entry in clock-names. + - clock-names: "bi_tcxo" (required) + "sleep_clk" (optional) + "aud_ref_clock" (optional) + Example: clock-controller@900000 { compatible = "qcom,gcc-msm8960"; @@ -71,3 +79,16 @@ Example of GCC with protected-clocks properties: <GCC_LPASS_Q6_AXI_CLK>, <GCC_LPASS_SWAY_CLK>; }; + +Example of GCC with clocks + gcc: clock-controller@100000 { + compatible = "qcom,gcc-sm8150"; + reg = <0x00100000 0x1f0000>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + clock-names = "bi_tcxo", + "sleep_clk"; + clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, + <&sleep_clk>; + }; diff --git a/dts/Bindings/clock/qcom,rpmh-clk.txt b/dts/Bindings/clock/qcom,rpmh-clk.txt index 3c007653da..365bbde599 100644 --- a/dts/Bindings/clock/qcom,rpmh-clk.txt +++ b/dts/Bindings/clock/qcom,rpmh-clk.txt @@ -6,9 +6,14 @@ some Qualcomm Technologies Inc. SoCs. It accepts clock requests from other hardware subsystems via RSC to control clocks. Required properties : -- compatible : shall contain "qcom,sdm845-rpmh-clk" +- compatible : must be one of: + "qcom,sdm845-rpmh-clk" + "qcom,sm8150-rpmh-clk" - #clock-cells : must contain 1 +- clocks: a list of phandles and clock-specifier pairs, + one for each entry in clock-names. +- clock-names: Parent board clock: "xo". Example : diff --git a/dts/Bindings/clock/emev2-clock.txt b/dts/Bindings/clock/renesas,emev2-smu.txt index 268ca61545..268ca61545 100644 --- a/dts/Bindings/clock/emev2-clock.txt +++ b/dts/Bindings/clock/renesas,emev2-smu.txt diff --git a/dts/Bindings/clock/rockchip,rk3308-cru.txt b/dts/Bindings/clock/rockchip,rk3308-cru.txt new file mode 100644 index 0000000000..9b151c5b0c --- /dev/null +++ b/dts/Bindings/clock/rockchip,rk3308-cru.txt @@ -0,0 +1,60 @@ +* Rockchip RK3308 Clock and Reset Unit + +The RK3308 clock controller generates and supplies clock to various +controllers within the SoC and also implements a reset controller for SoC +peripherals. + +Required Properties: + +- compatible: CRU should be "rockchip,rk3308-cru" +- reg: physical base address of the controller and length of memory mapped + region. +- #clock-cells: should be 1. +- #reset-cells: should be 1. + +Optional Properties: + +- rockchip,grf: phandle to the syscon managing the "general register files" + If missing, pll rates are not changeable, due to the missing pll lock status. + +Each clock is assigned an identifier and client nodes can use this identifier +to specify the clock which they consume. All available clocks are defined as +preprocessor macros in the dt-bindings/clock/rk3308-cru.h headers and can be +used in device tree sources. Similar macros exist for the reset sources in +these files. + +External clocks: + +There are several clocks that are generated outside the SoC. It is expected +that they are defined using standard clock bindings with following +clock-output-names: + - "xin24m" - crystal input - required, + - "xin32k" - rtc clock - optional, + - "mclk_i2s0_8ch_in", "mclk_i2s1_8ch_in", "mclk_i2s2_8ch_in", + "mclk_i2s3_8ch_in", "mclk_i2s0_2ch_in", + "mclk_i2s1_2ch_in" - external I2S or SPDIF clock - optional, + - "mac_clkin" - external MAC clock - optional + +Example: Clock controller node: + + cru: clock-controller@ff500000 { + compatible = "rockchip,rk3308-cru"; + reg = <0x0 0xff500000 0x0 0x1000>; + rockchip,grf = <&grf>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + +Example: UART controller node that consumes the clock generated by the clock + controller: + + uart0: serial@ff0a0000 { + compatible = "rockchip,rk3308-uart", "snps,dw-apb-uart"; + reg = <0x0 0xff0a0000 0x0 0x100>; + interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>; + clock-names = "baudclk", "apb_pclk"; + reg-shift = <2>; + reg-io-width = <4>; + status = "disabled"; + }; diff --git a/dts/Bindings/clock/ti,cdce925.txt b/dts/Bindings/clock/ti,cdce925.txt index 0d01f2d5cc..26544c8520 100644 --- a/dts/Bindings/clock/ti,cdce925.txt +++ b/dts/Bindings/clock/ti,cdce925.txt @@ -24,6 +24,8 @@ Required properties: Optional properties: - xtal-load-pf: Crystal load-capacitor value to fine-tune performance on a board, or to compensate for external influences. +- vdd-supply: A regulator node for Vdd +- vddout-supply: A regulator node for Vddout For all PLL1, PLL2, ... an optional child node can be used to specify spread spectrum clocking parameters for a board. @@ -41,6 +43,8 @@ Example: clocks = <&xtal_27Mhz>; #clock-cells = <1>; xtal-load-pf = <5>; + vdd-supply = <&1v8-reg>; + vddout-supply = <&3v3-reg>; /* PLL options to get SSC 1% centered */ PLL2 { spread-spectrum = <4>; diff --git a/dts/Bindings/connector/usb-connector.txt b/dts/Bindings/connector/usb-connector.txt index cef556d4e5..d357987181 100644 --- a/dts/Bindings/connector/usb-connector.txt +++ b/dts/Bindings/connector/usb-connector.txt @@ -17,6 +17,20 @@ Optional properties: - self-powered: Set this property if the usb device that has its own power source. +Optional properties for usb-b-connector: +- id-gpios: an input gpio for USB ID pin. +- vbus-gpios: an input gpio for USB VBUS pin, used to detect presence of + VBUS 5V. + see gpio/gpio.txt. +- vbus-supply: a phandle to the regulator for USB VBUS if needed when host + mode or dual role mode is supported. + Particularly, if use an output GPIO to control a VBUS regulator, should + model it as a regulator. + see regulator/fixed-regulator.yaml +- pinctrl-names : a pinctrl state named "default" is optional +- pinctrl-0 : pin control group + see pinctrl/pinctrl-bindings.txt + Optional properties for usb-c-connector: - power-role: should be one of "source", "sink" or "dual"(DRP) if typec connector has power support. diff --git a/dts/Bindings/arm/topology.txt b/dts/Bindings/cpu/cpu-topology.txt index b0d80c0fb2..9991818940 100644 --- a/dts/Bindings/arm/topology.txt +++ b/dts/Bindings/cpu/cpu-topology.txt @@ -1,21 +1,19 @@ =========================================== -ARM topology binding description +CPU topology binding description =========================================== =========================================== 1 - Introduction =========================================== -In an ARM system, the hierarchy of CPUs is defined through three entities that +In a SMP system, the hierarchy of CPUs is defined through three entities that are used to describe the layout of physical CPUs in the system: +- socket - cluster - core - thread -The cpu nodes (bindings defined in [1]) represent the devices that -correspond to physical CPUs and are to be mapped to the hierarchy levels. - The bottom hierarchy level sits at core or thread level depending on whether symmetric multi-threading (SMT) is supported or not. @@ -24,33 +22,31 @@ threads existing in the system and map to the hierarchy level "thread" above. In systems where SMT is not supported "cpu" nodes represent all cores present in the system and map to the hierarchy level "core" above. -ARM topology bindings allow one to associate cpu nodes with hierarchical groups +CPU topology bindings allow one to associate cpu nodes with hierarchical groups corresponding to the system hierarchy; syntactically they are defined as device tree nodes. -The remainder of this document provides the topology bindings for ARM, based -on the Devicetree Specification, available from: +Currently, only ARM/RISC-V intend to use this cpu topology binding but it may be +used for any other architecture as well. -https://www.devicetree.org/specifications/ +The cpu nodes, as per bindings defined in [4], represent the devices that +correspond to physical CPUs and are to be mapped to the hierarchy levels. -If not stated otherwise, whenever a reference to a cpu node phandle is made its -value must point to a cpu node compliant with the cpu node bindings as -documented in [1]. A topology description containing phandles to cpu nodes that are not compliant -with bindings standardized in [1] is therefore considered invalid. +with bindings standardized in [4] is therefore considered invalid. =========================================== 2 - cpu-map node =========================================== -The ARM CPU topology is defined within the cpu-map node, which is a direct +The ARM/RISC-V CPU topology is defined within the cpu-map node, which is a direct child of the cpus node and provides a container where the actual topology nodes are listed. - cpu-map node - Usage: Optional - On ARM SMP systems provide CPUs topology to the OS. - ARM uniprocessor systems do not require a topology + Usage: Optional - On SMP systems provide CPUs topology to the OS. + Uniprocessor systems do not require a topology description and therefore should not define a cpu-map node. @@ -63,21 +59,23 @@ nodes are listed. The cpu-map node's child nodes can be: - - one or more cluster nodes + - one or more cluster nodes or + - one or more socket nodes in a multi-socket system Any other configuration is considered invalid. -The cpu-map node can only contain three types of child nodes: +The cpu-map node can only contain 4 types of child nodes: +- socket node - cluster node - core node - thread node whose bindings are described in paragraph 3. -The nodes describing the CPU topology (cluster/core/thread) can only -be defined within the cpu-map node and every core/thread in the system -must be defined within the topology. Any other configuration is +The nodes describing the CPU topology (socket/cluster/core/thread) can +only be defined within the cpu-map node and every core/thread in the +system must be defined within the topology. Any other configuration is invalid and therefore must be ignored. =========================================== @@ -85,26 +83,44 @@ invalid and therefore must be ignored. =========================================== cpu-map child nodes must follow a naming convention where the node name -must be "clusterN", "coreN", "threadN" depending on the node type (ie -cluster/core/thread) (where N = {0, 1, ...} is the node number; nodes which -are siblings within a single common parent node must be given a unique and +must be "socketN", "clusterN", "coreN", "threadN" depending on the node type +(ie socket/cluster/core/thread) (where N = {0, 1, ...} is the node number; nodes +which are siblings within a single common parent node must be given a unique and sequential N value, starting from 0). cpu-map child nodes which do not share a common parent node can have the same name (ie same number N as other cpu-map child nodes at different device tree levels) since name uniqueness will be guaranteed by the device tree hierarchy. =========================================== -3 - cluster/core/thread node bindings +3 - socket/cluster/core/thread node bindings =========================================== -Bindings for cluster/cpu/thread nodes are defined as follows: +Bindings for socket/cluster/cpu/thread nodes are defined as follows: + +- socket node + + Description: must be declared within a cpu-map node, one node + per physical socket in the system. A system can + contain single or multiple physical socket. + The association of sockets and NUMA nodes is beyond + the scope of this bindings, please refer [2] for + NUMA bindings. + + This node is optional for a single socket system. + + The socket node name must be "socketN" as described in 2.1 above. + A socket node can not be a leaf node. + + A socket node's child nodes must be one or more cluster nodes. + + Any other configuration is considered invalid. - cluster node Description: must be declared within a cpu-map node, one node per cluster. A system can contain several layers of - clustering and cluster nodes can be contained in parent - cluster nodes. + clustering within a single physical socket and cluster + nodes can be contained in parent cluster nodes. The cluster node name must be "clusterN" as described in 2.1 above. A cluster node can not be a leaf node. @@ -164,90 +180,93 @@ Bindings for cluster/cpu/thread nodes are defined as follows: 4 - Example dts =========================================== -Example 1 (ARM 64-bit, 16-cpu system, two clusters of clusters): +Example 1 (ARM 64-bit, 16-cpu system, two clusters of clusters in a single +physical socket): cpus { #size-cells = <0>; #address-cells = <2>; cpu-map { - cluster0 { + socket0 { cluster0 { - core0 { - thread0 { - cpu = <&CPU0>; + cluster0 { + core0 { + thread0 { + cpu = <&CPU0>; + }; + thread1 { + cpu = <&CPU1>; + }; }; - thread1 { - cpu = <&CPU1>; - }; - }; - core1 { - thread0 { - cpu = <&CPU2>; - }; - thread1 { - cpu = <&CPU3>; + core1 { + thread0 { + cpu = <&CPU2>; + }; + thread1 { + cpu = <&CPU3>; + }; }; }; - }; - cluster1 { - core0 { - thread0 { - cpu = <&CPU4>; - }; - thread1 { - cpu = <&CPU5>; + cluster1 { + core0 { + thread0 { + cpu = <&CPU4>; + }; + thread1 { + cpu = <&CPU5>; + }; }; - }; - core1 { - thread0 { - cpu = <&CPU6>; - }; - thread1 { - cpu = <&CPU7>; - }; - }; - }; - }; - - cluster1 { - cluster0 { - core0 { - thread0 { - cpu = <&CPU8>; - }; - thread1 { - cpu = <&CPU9>; - }; - }; - core1 { - thread0 { - cpu = <&CPU10>; - }; - thread1 { - cpu = <&CPU11>; + core1 { + thread0 { + cpu = <&CPU6>; + }; + thread1 { + cpu = <&CPU7>; + }; }; }; }; cluster1 { - core0 { - thread0 { - cpu = <&CPU12>; + cluster0 { + core0 { + thread0 { + cpu = <&CPU8>; + }; + thread1 { + cpu = <&CPU9>; + }; }; - thread1 { - cpu = <&CPU13>; + core1 { + thread0 { + cpu = <&CPU10>; + }; + thread1 { + cpu = <&CPU11>; + }; }; }; - core1 { - thread0 { - cpu = <&CPU14>; + + cluster1 { + core0 { + thread0 { + cpu = <&CPU12>; + }; + thread1 { + cpu = <&CPU13>; + }; }; - thread1 { - cpu = <&CPU15>; + core1 { + thread0 { + cpu = <&CPU14>; + }; + thread1 { + cpu = <&CPU15>; + }; }; }; }; @@ -470,6 +489,65 @@ cpus { }; }; +Example 3: HiFive Unleashed (RISC-V 64 bit, 4 core system) + +{ + #address-cells = <2>; + #size-cells = <2>; + compatible = "sifive,fu540g", "sifive,fu500"; + model = "sifive,hifive-unleashed-a00"; + + ... + cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu-map { + socket0 { + cluster0 { + core0 { + cpu = <&CPU1>; + }; + core1 { + cpu = <&CPU2>; + }; + core2 { + cpu0 = <&CPU2>; + }; + core3 { + cpu0 = <&CPU3>; + }; + }; + }; + }; + + CPU1: cpu@1 { + device_type = "cpu"; + compatible = "sifive,rocket0", "riscv"; + reg = <0x1>; + } + + CPU2: cpu@2 { + device_type = "cpu"; + compatible = "sifive,rocket0", "riscv"; + reg = <0x2>; + } + CPU3: cpu@3 { + device_type = "cpu"; + compatible = "sifive,rocket0", "riscv"; + reg = <0x3>; + } + CPU4: cpu@4 { + device_type = "cpu"; + compatible = "sifive,rocket0", "riscv"; + reg = <0x4>; + } + } +}; =============================================================================== [1] ARM Linux kernel documentation Documentation/devicetree/bindings/arm/cpus.yaml +[2] Devicetree NUMA binding description + Documentation/devicetree/bindings/numa.txt +[3] RISC-V Linux kernel documentation + Documentation/devicetree/bindings/riscv/cpus.txt +[4] https://www.devicetree.org/specifications/ diff --git a/dts/Bindings/crypto/allwinner,sun4i-a10-crypto.yaml b/dts/Bindings/crypto/allwinner,sun4i-a10-crypto.yaml new file mode 100644 index 0000000000..80b3e7350a --- /dev/null +++ b/dts/Bindings/crypto/allwinner,sun4i-a10-crypto.yaml @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/crypto/allwinner,sun4i-a10-crypto.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner A10 Security System Device Tree Bindings + +maintainers: + - Chen-Yu Tsai <wens@csie.org> + - Maxime Ripard <maxime.ripard@bootlin.com> + +properties: + compatible: + oneOf: + - const: allwinner,sun4i-a10-crypto + - items: + - const: allwinner,sun5i-a13-crypto + - const: allwinner,sun4i-a10-crypto + - items: + - const: allwinner,sun6i-a31-crypto + - const: allwinner,sun4i-a10-crypto + - items: + - const: allwinner,sun7i-a20-crypto + - const: allwinner,sun4i-a10-crypto + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: Bus Clock + - description: Module Clock + + clock-names: + items: + - const: ahb + - const: mod + + resets: + maxItems: 1 + + reset-names: + const: ahb + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +if: + properties: + compatible: + contains: + const: allwinner,sun6i-a31-crypto + +then: + required: + - resets + - reset-names + +additionalProperties: false + +examples: + - | + crypto: crypto-engine@1c15000 { + compatible = "allwinner,sun4i-a10-crypto"; + reg = <0x01c15000 0x1000>; + interrupts = <86>; + clocks = <&ahb_gates 5>, <&ss_clk>; + clock-names = "ahb", "mod"; + }; + +... diff --git a/dts/Bindings/crypto/sun4i-ss.txt b/dts/Bindings/crypto/sun4i-ss.txt deleted file mode 100644 index f2dc3d9bca..0000000000 --- a/dts/Bindings/crypto/sun4i-ss.txt +++ /dev/null @@ -1,23 +0,0 @@ -* Allwinner Security System found on A20 SoC - -Required properties: -- compatible : Should be "allwinner,sun4i-a10-crypto". -- reg: Should contain the Security System register location and length. -- interrupts: Should contain the IRQ line for the Security System. -- clocks : List of clock specifiers, corresponding to ahb and ss. -- clock-names : Name of the functional clock, should be - * "ahb" : AHB gating clock - * "mod" : SS controller clock - -Optional properties: - - resets : phandle + reset specifier pair - - reset-names : must contain "ahb" - -Example: - crypto: crypto-engine@1c15000 { - compatible = "allwinner,sun4i-a10-crypto"; - reg = <0x01c15000 0x1000>; - interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ahb_gates 5>, <&ss_clk>; - clock-names = "ahb", "mod"; - }; diff --git a/dts/Bindings/display/amlogic,meson-dw-hdmi.txt b/dts/Bindings/display/amlogic,meson-dw-hdmi.txt deleted file mode 100644 index 3a50a7862c..0000000000 --- a/dts/Bindings/display/amlogic,meson-dw-hdmi.txt +++ /dev/null @@ -1,119 +0,0 @@ -Amlogic specific extensions to the Synopsys Designware HDMI Controller -====================================================================== - -The Amlogic Meson Synopsys Designware Integration is composed of : -- A Synopsys DesignWare HDMI Controller IP -- A TOP control block controlling the Clocks and PHY -- A custom HDMI PHY in order to convert video to TMDS signal - ___________________________________ -| HDMI TOP |<= HPD -|___________________________________| -| | | -| Synopsys HDMI | HDMI PHY |=> TMDS -| Controller |________________| -|___________________________________|<=> DDC - -The HDMI TOP block only supports HPD sensing. -The Synopsys HDMI Controller interrupt is routed through the -TOP Block interrupt. -Communication to the TOP Block and the Synopsys HDMI Controller is done -via a pair of dedicated addr+read/write registers. -The HDMI PHY is configured by registers in the HHI register block. - -Pixel data arrives in 4:4:4 format from the VENC block and the VPU HDMI mux -selects either the ENCI encoder for the 576i or 480i formats or the ENCP -encoder for all the other formats including interlaced HD formats. - -The VENC uses a DVI encoder on top of the ENCI or ENCP encoders to generate -DVI timings for the HDMI controller. - -Amlogic Meson GXBB, GXL and GXM SoCs families embeds the Synopsys DesignWare -HDMI TX IP version 2.01a with HDCP and I2C & S/PDIF -audio source interfaces. - -Required properties: -- compatible: value should be different for each SoC family as : - - GXBB (S905) : "amlogic,meson-gxbb-dw-hdmi" - - GXL (S905X, S905D) : "amlogic,meson-gxl-dw-hdmi" - - GXM (S912) : "amlogic,meson-gxm-dw-hdmi" - followed by the common "amlogic,meson-gx-dw-hdmi" - - G12A (S905X2, S905Y2, S905D2) : "amlogic,meson-g12a-dw-hdmi" -- reg: Physical base address and length of the controller's registers. -- interrupts: The HDMI interrupt number -- clocks, clock-names : must have the phandles to the HDMI iahb and isfr clocks, - and the Amlogic Meson venci clocks as described in - Documentation/devicetree/bindings/clock/clock-bindings.txt, - the clocks are soc specific, the clock-names should be "iahb", "isfr", "venci" -- resets, resets-names: must have the phandles to the HDMI apb, glue and phy - resets as described in : - Documentation/devicetree/bindings/reset/reset.txt, - the reset-names should be "hdmitx_apb", "hdmitx", "hdmitx_phy" - -Optional properties: -- hdmi-supply: Optional phandle to an external 5V regulator to power the HDMI - logic, as described in the file ../regulator/regulator.txt - -Required nodes: - -The connections to the HDMI ports are modeled using the OF graph -bindings specified in Documentation/devicetree/bindings/graph.txt. - -The following table lists for each supported model the port number -corresponding to each HDMI output and input. - - Port 0 Port 1 ------------------------------------------ - S905 (GXBB) VENC Input TMDS Output - S905X (GXL) VENC Input TMDS Output - S905D (GXL) VENC Input TMDS Output - S912 (GXM) VENC Input TMDS Output - S905X2 (G12A) VENC Input TMDS Output - S905Y2 (G12A) VENC Input TMDS Output - S905D2 (G12A) VENC Input TMDS Output - -Example: - -hdmi-connector { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_connector_in: endpoint { - remote-endpoint = <&hdmi_tx_tmds_out>; - }; - }; -}; - -hdmi_tx: hdmi-tx@c883a000 { - compatible = "amlogic,meson-gxbb-dw-hdmi", "amlogic,meson-gx-dw-hdmi"; - reg = <0x0 0xc883a000 0x0 0x1c>; - interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>; - resets = <&reset RESET_HDMITX_CAPB3>, - <&reset RESET_HDMI_SYSTEM_RESET>, - <&reset RESET_HDMI_TX>; - reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy"; - clocks = <&clkc CLKID_HDMI_PCLK>, - <&clkc CLKID_CLK81>, - <&clkc CLKID_GCLK_VENCI_INT0>; - clock-names = "isfr", "iahb", "venci"; - #address-cells = <1>; - #size-cells = <0>; - - /* VPU VENC Input */ - hdmi_tx_venc_port: port@0 { - reg = <0>; - - hdmi_tx_in: endpoint { - remote-endpoint = <&hdmi_tx_out>; - }; - }; - - /* TMDS Output */ - hdmi_tx_tmds_port: port@1 { - reg = <1>; - - hdmi_tx_tmds_out: endpoint { - remote-endpoint = <&hdmi_connector_in>; - }; - }; -}; diff --git a/dts/Bindings/display/amlogic,meson-dw-hdmi.yaml b/dts/Bindings/display/amlogic,meson-dw-hdmi.yaml new file mode 100644 index 0000000000..fb74768200 --- /dev/null +++ b/dts/Bindings/display/amlogic,meson-dw-hdmi.yaml @@ -0,0 +1,150 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019 BayLibre, SAS +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/display/amlogic,meson-dw-hdmi.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Amlogic specific extensions to the Synopsys Designware HDMI Controller + +maintainers: + - Neil Armstrong <narmstrong@baylibre.com> + +description: | + The Amlogic Meson Synopsys Designware Integration is composed of + - A Synopsys DesignWare HDMI Controller IP + - A TOP control block controlling the Clocks and PHY + - A custom HDMI PHY in order to convert video to TMDS signal + ___________________________________ + | HDMI TOP |<= HPD + |___________________________________| + | | | + | Synopsys HDMI | HDMI PHY |=> TMDS + | Controller |________________| + |___________________________________|<=> DDC + + The HDMI TOP block only supports HPD sensing. + The Synopsys HDMI Controller interrupt is routed through the + TOP Block interrupt. + Communication to the TOP Block and the Synopsys HDMI Controller is done + via a pair of dedicated addr+read/write registers. + The HDMI PHY is configured by registers in the HHI register block. + + Pixel data arrives in "4:4:4" format from the VENC block and the VPU HDMI mux + selects either the ENCI encoder for the 576i or 480i formats or the ENCP + encoder for all the other formats including interlaced HD formats. + + The VENC uses a DVI encoder on top of the ENCI or ENCP encoders to generate + DVI timings for the HDMI controller. + + Amlogic Meson GXBB, GXL and GXM SoCs families embeds the Synopsys DesignWare + HDMI TX IP version 2.01a with HDCP and I2C & S/PDIF + audio source interfaces. + +properties: + compatible: + oneOf: + - items: + - enum: + - amlogic,meson-gxbb-dw-hdmi # GXBB (S905) + - amlogic,meson-gxl-dw-hdmi # GXL (S905X, S905D) + - amlogic,meson-gxm-dw-hdmi # GXM (S912) + - const: amlogic,meson-gx-dw-hdmi + - enum: + - amlogic,meson-g12a-dw-hdmi # G12A (S905X2, S905Y2, S905D2) + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + minItems: 3 + + clock-names: + items: + - const: isfr + - const: iahb + - const: venci + + resets: + minItems: 3 + + reset-names: + items: + - const: hdmitx_apb + - const: hdmitx + - const: hdmitx_phy + + hdmi-supply: + description: phandle to an external 5V regulator to power the HDMI logic + allOf: + - $ref: /schemas/types.yaml#/definitions/phandle + + port@0: + type: object + description: + A port node pointing to the VENC Input port node. + + port@1: + type: object + description: + A port node pointing to the TMDS Output port node. + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + "#sound-dai-cells": + const: 0 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - resets + - reset-names + - port@0 + - port@1 + - "#address-cells" + - "#size-cells" + +additionalProperties: false + +examples: + - | + hdmi_tx: hdmi-tx@c883a000 { + compatible = "amlogic,meson-gxbb-dw-hdmi", "amlogic,meson-gx-dw-hdmi"; + reg = <0xc883a000 0x1c>; + interrupts = <57>; + resets = <&reset_apb>, <&reset_hdmitx>, <&reset_hdmitx_phy>; + reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy"; + clocks = <&clk_isfr>, <&clk_iahb>, <&clk_venci>; + clock-names = "isfr", "iahb", "venci"; + #address-cells = <1>; + #size-cells = <0>; + + /* VPU VENC Input */ + hdmi_tx_venc_port: port@0 { + reg = <0>; + + hdmi_tx_in: endpoint { + remote-endpoint = <&hdmi_tx_out>; + }; + }; + + /* TMDS Output */ + hdmi_tx_tmds_port: port@1 { + reg = <1>; + + hdmi_tx_tmds_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; + }; + }; + diff --git a/dts/Bindings/display/amlogic,meson-vpu.txt b/dts/Bindings/display/amlogic,meson-vpu.txt deleted file mode 100644 index be40a78050..0000000000 --- a/dts/Bindings/display/amlogic,meson-vpu.txt +++ /dev/null @@ -1,121 +0,0 @@ -Amlogic Meson Display Controller -================================ - -The Amlogic Meson Display controller is composed of several components -that are going to be documented below: - -DMC|---------------VPU (Video Processing Unit)----------------|------HHI------| - | vd1 _______ _____________ _________________ | | -D |-------| |----| | | | | HDMI PLL | -D | vd2 | VIU | | Video Post | | Video Encoders |<---|-----VCLK | -R |-------| |----| Processing | | | | | - | osd2 | | | |---| Enci ----------|----|-----VDAC------| -R |-------| CSC |----| Scalers | | Encp ----------|----|----HDMI-TX----| -A | osd1 | | | Blenders | | Encl ----------|----|---------------| -M |-------|______|----|____________| |________________| | | -___|__________________________________________________________|_______________| - - -VIU: Video Input Unit ---------------------- - -The Video Input Unit is in charge of the pixel scanout from the DDR memory. -It fetches the frames addresses, stride and parameters from the "Canvas" memory. -This part is also in charge of the CSC (Colorspace Conversion). -It can handle 2 OSD Planes and 2 Video Planes. - -VPP: Video Post Processing --------------------------- - -The Video Post Processing is in charge of the scaling and blending of the -various planes into a single pixel stream. -There is a special "pre-blending" used by the video planes with a dedicated -scaler and a "post-blending" to merge with the OSD Planes. -The OSD planes also have a dedicated scaler for one of the OSD. - -VENC: Video Encoders --------------------- - -The VENC is composed of the multiple pixel encoders : - - ENCI : Interlace Video encoder for CVBS and Interlace HDMI - - ENCP : Progressive Video Encoder for HDMI - - ENCL : LCD LVDS Encoder -The VENC Unit gets a Pixel Clocks (VCLK) from a dedicated HDMI PLL and clock -tree and provides the scanout clock to the VPP and VIU. -The ENCI is connected to a single VDAC for Composite Output. -The ENCI and ENCP are connected to an on-chip HDMI Transceiver. - -Device Tree Bindings: ---------------------- - -VPU: Video Processing Unit --------------------------- - -Required properties: -- compatible: value should be different for each SoC family as : - - GXBB (S905) : "amlogic,meson-gxbb-vpu" - - GXL (S905X, S905D) : "amlogic,meson-gxl-vpu" - - GXM (S912) : "amlogic,meson-gxm-vpu" - followed by the common "amlogic,meson-gx-vpu" - - G12A (S905X2, S905Y2, S905D2) : "amlogic,meson-g12a-vpu" -- reg: base address and size of he following memory-mapped regions : - - vpu - - hhi -- reg-names: should contain the names of the previous memory regions -- interrupts: should contain the VENC Vsync interrupt number -- amlogic,canvas: phandle to canvas provider node as described in the file - ../soc/amlogic/amlogic,canvas.txt - -Optional properties: -- power-domains: Optional phandle to associated power domain as described in - the file ../power/power_domain.txt - -Required nodes: - -The connections to the VPU output video ports are modeled using the OF graph -bindings specified in Documentation/devicetree/bindings/graph.txt. - -The following table lists for each supported model the port number -corresponding to each VPU output. - - Port 0 Port 1 ------------------------------------------ - S905 (GXBB) CVBS VDAC HDMI-TX - S905X (GXL) CVBS VDAC HDMI-TX - S905D (GXL) CVBS VDAC HDMI-TX - S912 (GXM) CVBS VDAC HDMI-TX - S905X2 (G12A) CVBS VDAC HDMI-TX - S905Y2 (G12A) CVBS VDAC HDMI-TX - S905D2 (G12A) CVBS VDAC HDMI-TX - -Example: - -tv-connector { - compatible = "composite-video-connector"; - - port { - tv_connector_in: endpoint { - remote-endpoint = <&cvbs_vdac_out>; - }; - }; -}; - -vpu: vpu@d0100000 { - compatible = "amlogic,meson-gxbb-vpu"; - reg = <0x0 0xd0100000 0x0 0x100000>, - <0x0 0xc883c000 0x0 0x1000>, - <0x0 0xc8838000 0x0 0x1000>; - reg-names = "vpu", "hhi", "dmc"; - interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>; - #address-cells = <1>; - #size-cells = <0>; - - /* CVBS VDAC output port */ - port@0 { - reg = <0>; - - cvbs_vdac_out: endpoint { - remote-endpoint = <&tv_connector_in>; - }; - }; -}; diff --git a/dts/Bindings/display/amlogic,meson-vpu.yaml b/dts/Bindings/display/amlogic,meson-vpu.yaml new file mode 100644 index 0000000000..d1205a6697 --- /dev/null +++ b/dts/Bindings/display/amlogic,meson-vpu.yaml @@ -0,0 +1,137 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019 BayLibre, SAS +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/display/amlogic,meson-vpu.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Amlogic Meson Display Controller + +maintainers: + - Neil Armstrong <narmstrong@baylibre.com> + +description: | + The Amlogic Meson Display controller is composed of several components + that are going to be documented below + + DMC|---------------VPU (Video Processing Unit)----------------|------HHI------| + | vd1 _______ _____________ _________________ | | + D |-------| |----| | | | | HDMI PLL | + D | vd2 | VIU | | Video Post | | Video Encoders |<---|-----VCLK | + R |-------| |----| Processing | | | | | + | osd2 | | | |---| Enci ----------|----|-----VDAC------| + R |-------| CSC |----| Scalers | | Encp ----------|----|----HDMI-TX----| + A | osd1 | | | Blenders | | Encl ----------|----|---------------| + M |-------|______|----|____________| |________________| | | + ___|__________________________________________________________|_______________| + + + VIU: Video Input Unit + --------------------- + + The Video Input Unit is in charge of the pixel scanout from the DDR memory. + It fetches the frames addresses, stride and parameters from the "Canvas" memory. + This part is also in charge of the CSC (Colorspace Conversion). + It can handle 2 OSD Planes and 2 Video Planes. + + VPP: Video Post Processing + -------------------------- + + The Video Post Processing is in charge of the scaling and blending of the + various planes into a single pixel stream. + There is a special "pre-blending" used by the video planes with a dedicated + scaler and a "post-blending" to merge with the OSD Planes. + The OSD planes also have a dedicated scaler for one of the OSD. + + VENC: Video Encoders + -------------------- + + The VENC is composed of the multiple pixel encoders + - ENCI : Interlace Video encoder for CVBS and Interlace HDMI + - ENCP : Progressive Video Encoder for HDMI + - ENCL : LCD LVDS Encoder + The VENC Unit gets a Pixel Clocks (VCLK) from a dedicated HDMI PLL and clock + tree and provides the scanout clock to the VPP and VIU. + The ENCI is connected to a single VDAC for Composite Output. + The ENCI and ENCP are connected to an on-chip HDMI Transceiver. + +properties: + compatible: + oneOf: + - items: + - enum: + - amlogic,meson-gxbb-vpu # GXBB (S905) + - amlogic,meson-gxl-vpu # GXL (S905X, S905D) + - amlogic,meson-gxm-vpu # GXM (S912) + - const: amlogic,meson-gx-vpu + - enum: + - amlogic,meson-g12a-vpu # G12A (S905X2, S905Y2, S905D2) + + reg: + maxItems: 2 + + reg-names: + items: + - const: vpu + - const: hhi + + interrupts: + maxItems: 1 + + power-domains: + maxItems: 1 + description: phandle to the associated power domain + + port@0: + type: object + description: + A port node pointing to the CVBS VDAC port node. + + port@1: + type: object + description: + A port node pointing to the HDMI-TX port node. + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +required: + - compatible + - reg + - interrupts + - port@0 + - port@1 + - "#address-cells" + - "#size-cells" + +examples: + - | + vpu: vpu@d0100000 { + compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu"; + reg = <0xd0100000 0x100000>, <0xc883c000 0x1000>; + reg-names = "vpu", "hhi"; + interrupts = <3>; + #address-cells = <1>; + #size-cells = <0>; + + /* CVBS VDAC output port */ + port@0 { + reg = <0>; + + cvbs_vdac_out: endpoint { + remote-endpoint = <&tv_connector_in>; + }; + }; + + /* HDMI TX output port */ + port@1 { + reg = <1>; + + hdmi_tx_out: endpoint { + remote-endpoint = <&hdmi_tx_in>; + }; + }; + }; diff --git a/dts/Bindings/display/arm,pl11x.txt b/dts/Bindings/display/arm,pl11x.txt index 572fa2773e..3f977e72a2 100644 --- a/dts/Bindings/display/arm,pl11x.txt +++ b/dts/Bindings/display/arm,pl11x.txt @@ -39,9 +39,11 @@ Required sub-nodes: - port: describes LCD panel signals, following the common binding for video transmitter interfaces; see - Documentation/devicetree/bindings/media/video-interfaces.txt; - when it is a TFT panel, the port's endpoint must define the - following property: + Documentation/devicetree/bindings/media/video-interfaces.txt + +Deprecated properties: + The port's endbpoint subnode had this, now deprecated property + in the past. Drivers should be able to survive without it: - arm,pl11x,tft-r0g0b0-pads: an array of three 32-bit values, defining the way CLD pads are wired up; first value @@ -80,7 +82,6 @@ Example: port { clcd_pads: endpoint { remote-endpoint = <&clcd_panel>; - arm,pl11x,tft-r0g0b0-pads = <0 8 16>; }; }; diff --git a/dts/Bindings/display/bridge/sii902x.txt b/dts/Bindings/display/bridge/sii902x.txt index 2df44b7d38..6e14e087c0 100644 --- a/dts/Bindings/display/bridge/sii902x.txt +++ b/dts/Bindings/display/bridge/sii902x.txt @@ -26,9 +26,8 @@ Optional properties: - clocks: phandle and clock specifier for each clock listed in the clock-names property - clock-names: "mclk" - Describes SII902x MCLK input. MCLK is used to produce - HDMI audio CTS values. This property is required if - "#sound-dai-cells"-property is present. This property follows + Describes SII902x MCLK input. MCLK can be used to produce + HDMI audio CTS values. This property follows Documentation/devicetree/bindings/clock/clock-bindings.txt consumer binding. diff --git a/dts/Bindings/display/connector/hdmi-connector.txt b/dts/Bindings/display/connector/hdmi-connector.txt index 508aee461e..aeb07c4bd7 100644 --- a/dts/Bindings/display/connector/hdmi-connector.txt +++ b/dts/Bindings/display/connector/hdmi-connector.txt @@ -9,6 +9,7 @@ Optional properties: - label: a symbolic name for the connector - hpd-gpios: HPD GPIO number - ddc-i2c-bus: phandle link to the I2C controller used for DDC EDID probing +- ddc-en-gpios: signal to enable DDC bus Required nodes: - Video port for HDMI input diff --git a/dts/Bindings/display/panel/ampire,am-480272h3tmqw-t01h.txt b/dts/Bindings/display/panel/ampire,am-480272h3tmqw-t01h.txt deleted file mode 100644 index 6812280cb1..0000000000 --- a/dts/Bindings/display/panel/ampire,am-480272h3tmqw-t01h.txt +++ /dev/null @@ -1,26 +0,0 @@ -Ampire AM-480272H3TMQW-T01H 4.3" WQVGA TFT LCD panel - -This binding is compatible with the simple-panel binding, which is specified -in simple-panel.txt in this directory. - -Required properties: -- compatible: should be "ampire,am-480272h3tmqw-t01h" - -Optional properties: -- power-supply: regulator to provide the supply voltage -- enable-gpios: GPIO pin to enable or disable the panel -- backlight: phandle of the backlight device attached to the panel - -Optional nodes: -- Video port for RGB input. - -Example: - panel_rgb: panel-rgb { - compatible = "ampire,am-480272h3tmqw-t01h"; - enable-gpios = <&gpioa 8 1>; - port { - panel_in_rgb: endpoint { - remote-endpoint = <&controller_out_rgb>; - }; - }; - }; diff --git a/dts/Bindings/display/panel/ampire,am-480272h3tmqw-t01h.yaml b/dts/Bindings/display/panel/ampire,am-480272h3tmqw-t01h.yaml new file mode 100644 index 0000000000..c6e33e7f36 --- /dev/null +++ b/dts/Bindings/display/panel/ampire,am-480272h3tmqw-t01h.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/ampire,am-480272h3tmqw-t01h.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Ampire AM-480272H3TMQW-T01H 4.3" WQVGA TFT LCD panel + +maintainers: + - Yannick Fertre <yannick.fertre@st.com> + - Thierry Reding <treding@nvidia.com> + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + const: ampire,am-480272h3tmqw-t01h + + power-supply: true + enable-gpios: true + backlight: true + port: true + +required: + - compatible + +additionalProperties: false + +examples: + - | + panel_rgb: panel { + compatible = "ampire,am-480272h3tmqw-t01h"; + enable-gpios = <&gpioa 8 1>; + port { + panel_in_rgb: endpoint { + remote-endpoint = <&controller_out_rgb>; + }; + }; + }; + +... diff --git a/dts/Bindings/display/panel/arm,versatile-tft-panel.txt b/dts/Bindings/display/panel/arm,versatile-tft-panel.txt index 248141c3c7..0601a9e347 100644 --- a/dts/Bindings/display/panel/arm,versatile-tft-panel.txt +++ b/dts/Bindings/display/panel/arm,versatile-tft-panel.txt @@ -10,7 +10,7 @@ Required properties: - compatible: should be "arm,versatile-tft-panel" Required subnodes: -- port: see display/panel/panel-common.txt, graph.txt +- port: see display/panel/panel-common.yaml, graph.txt Example: diff --git a/dts/Bindings/display/panel/armadeus,st0700-adapt.txt b/dts/Bindings/display/panel/armadeus,st0700-adapt.txt deleted file mode 100644 index a30d63db3c..0000000000 --- a/dts/Bindings/display/panel/armadeus,st0700-adapt.txt +++ /dev/null @@ -1,9 +0,0 @@ -Armadeus ST0700 Adapt. A Santek ST0700I5Y-RBSLW 7.0" WVGA (800x480) TFT with -an adapter board. - -Required properties: -- compatible: "armadeus,st0700-adapt" -- power-supply: see panel-common.txt - -Optional properties: -- backlight: see panel-common.txt diff --git a/dts/Bindings/display/panel/armadeus,st0700-adapt.yaml b/dts/Bindings/display/panel/armadeus,st0700-adapt.yaml new file mode 100644 index 0000000000..a6ade47066 --- /dev/null +++ b/dts/Bindings/display/panel/armadeus,st0700-adapt.yaml @@ -0,0 +1,33 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/armadeus,st0700-adapt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Armadeus ST0700 Adapter + +description: + A Santek ST0700I5Y-RBSLW 7.0" WVGA (800x480) TFT with an adapter board. + +maintainers: + - '"Sébastien Szymanski" <sebastien.szymanski@armadeus.com>' + - Thierry Reding <thierry.reding@gmail.com> + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + const: armadeus,st0700-adapt + + power-supply: true + backlight: true + port: true + +additionalProperties: false + +required: + - compatible + - power-supply + +... diff --git a/dts/Bindings/display/panel/bananapi,s070wv20-ct16.txt b/dts/Bindings/display/panel/bananapi,s070wv20-ct16.txt deleted file mode 100644 index 35bc0c839f..0000000000 --- a/dts/Bindings/display/panel/bananapi,s070wv20-ct16.txt +++ /dev/null @@ -1,12 +0,0 @@ -Banana Pi 7" (S070WV20-CT16) TFT LCD Panel - -Required properties: -- compatible: should be "bananapi,s070wv20-ct16" -- power-supply: see ./panel-common.txt - -Optional properties: -- enable-gpios: see ./simple-panel.txt -- backlight: see ./simple-panel.txt - -This binding is compatible with the simple-panel binding, which is specified -in ./simple-panel.txt. diff --git a/dts/Bindings/display/panel/bananapi,s070wv20-ct16.yaml b/dts/Bindings/display/panel/bananapi,s070wv20-ct16.yaml new file mode 100644 index 0000000000..bbf127fb28 --- /dev/null +++ b/dts/Bindings/display/panel/bananapi,s070wv20-ct16.yaml @@ -0,0 +1,31 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/bananapi,s070wv20-ct16.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Banana Pi 7" (S070WV20-CT16) TFT LCD Panel + +maintainers: + - Chen-Yu Tsai <wens@csie.org> + - Thierry Reding <thierry.reding@gmail.com> + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + const: bananapi,s070wv20-ct16 + + power-supply: true + backlight: true + enable-gpios: true + port: true + +additionalProperties: false + +required: + - compatible + - power-supply + +... diff --git a/dts/Bindings/display/panel/boe,himax8279d.txt b/dts/Bindings/display/panel/boe,himax8279d.txt new file mode 100644 index 0000000000..3caea2172b --- /dev/null +++ b/dts/Bindings/display/panel/boe,himax8279d.txt @@ -0,0 +1,24 @@ +Boe Himax8279d 1200x1920 TFT LCD panel + +Required properties: +- compatible: should be "boe,himax8279d8p" and one of: "boe,himax8279d10p" +- reg: DSI virtual channel of the peripheral +- enable-gpios: panel enable gpio +- pp33-gpios: a GPIO phandle for the 3.3v pin that provides the supply voltage +- pp18-gpios: a GPIO phandle for the 1.8v pin that provides the supply voltage + +Optional properties: +- backlight: phandle of the backlight device attached to the panel + +Example: + + &mipi_dsi { + panel { + compatible = "boe,himax8279d8p", "boe,himax8279d10p"; + reg = <0>; + backlight = <&backlight>; + enable-gpios = <&gpio 45 GPIO_ACTIVE_HIGH>; + pp33-gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; + pp18-gpios = <&gpio 36 GPIO_ACTIVE_HIGH>; + }; + }; diff --git a/dts/Bindings/display/panel/dlc,dlc0700yzg-1.txt b/dts/Bindings/display/panel/dlc,dlc0700yzg-1.txt deleted file mode 100644 index bf06bb025b..0000000000 --- a/dts/Bindings/display/panel/dlc,dlc0700yzg-1.txt +++ /dev/null @@ -1,13 +0,0 @@ -DLC Display Co. DLC0700YZG-1 7.0" WSVGA TFT LCD panel - -Required properties: -- compatible: should be "dlc,dlc0700yzg-1" -- power-supply: See simple-panel.txt - -Optional properties: -- reset-gpios: See panel-common.txt -- enable-gpios: See simple-panel.txt -- backlight: See simple-panel.txt - -This binding is compatible with the simple-panel binding, which is specified -in simple-panel.txt in this directory. diff --git a/dts/Bindings/display/panel/dlc,dlc0700yzg-1.yaml b/dts/Bindings/display/panel/dlc,dlc0700yzg-1.yaml new file mode 100644 index 0000000000..287e2feb65 --- /dev/null +++ b/dts/Bindings/display/panel/dlc,dlc0700yzg-1.yaml @@ -0,0 +1,31 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/dlc,dlc0700yzg-1.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: DLC Display Co. DLC0700YZG-1 7.0" WSVGA TFT LCD panel + +maintainers: + - Philipp Zabel <p.zabel@pengutronix.de> + - Thierry Reding <thierry.reding@gmail.com> + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + const: dlc,dlc0700yzg-1 + + reset-gpios: true + enable-gpios: true + backlight: true + port: true + +additionalProperties: false + +required: + - compatible + - power-supply + +... diff --git a/dts/Bindings/display/panel/edt,et-series.txt b/dts/Bindings/display/panel/edt,et-series.txt index be8684327e..b7ac1c725f 100644 --- a/dts/Bindings/display/panel/edt,et-series.txt +++ b/dts/Bindings/display/panel/edt,et-series.txt @@ -40,7 +40,7 @@ simple-panel.txt | Identifier | compatbile | description | +=================+=====================+=====================================+ | ETM0700G0DH6 | edt,etm070080dh6 | WVGA TFT Display with capacitive | -| | | Touchscreen | +| | edt,etm0700g0dh6 | Touchscreen | +-----------------+---------------------+-------------------------------------+ | ETM0700G0BDH6 | edt,etm070080bdh6 | Same as ETM0700G0DH6 but with | | | | inverted pixel clock. | diff --git a/dts/Bindings/display/panel/giantplus,gpm940b0.txt b/dts/Bindings/display/panel/giantplus,gpm940b0.txt new file mode 100644 index 0000000000..3dab52f92c --- /dev/null +++ b/dts/Bindings/display/panel/giantplus,gpm940b0.txt @@ -0,0 +1,12 @@ +GiantPlus 3.0" (320x240 pixels) 24-bit TFT LCD panel + +Required properties: +- compatible: should be "giantplus,gpm940b0" +- power-supply: as specified in the base binding + +Optional properties: +- backlight: as specified in the base binding +- enable-gpios: as specified in the base binding + +This binding is compatible with the simple-panel binding, which is specified +in simple-panel.txt in this directory. diff --git a/dts/Bindings/display/panel/innolux,ee101ia-01d.txt b/dts/Bindings/display/panel/innolux,ee101ia-01d.txt deleted file mode 100644 index e5ca4ccd55..0000000000 --- a/dts/Bindings/display/panel/innolux,ee101ia-01d.txt +++ /dev/null @@ -1,7 +0,0 @@ -Innolux Corporation 10.1" EE101IA-01D WXGA (1280x800) LVDS panel - -Required properties: -- compatible: should be "innolux,ee101ia-01d" - -This binding is compatible with the lvds-panel binding, which is specified -in panel-lvds.txt in this directory. diff --git a/dts/Bindings/display/panel/innolux,ee101ia-01d.yaml b/dts/Bindings/display/panel/innolux,ee101ia-01d.yaml new file mode 100644 index 0000000000..a69681e724 --- /dev/null +++ b/dts/Bindings/display/panel/innolux,ee101ia-01d.yaml @@ -0,0 +1,31 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/innolux,ee101ia-01d.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Innolux Corporation 10.1" EE101IA-01D WXGA (1280x800) LVDS panel + +maintainers: + - Heiko Stuebner <heiko.stuebner@bq.com> + - Thierry Reding <thierry.reding@gmail.com> + +allOf: + - $ref: lvds.yaml# + +properties: + compatible: + items: + - const: innolux,ee101ia-01d + - {} # panel-lvds, but not listed here to avoid false select + + backlight: true + enable-gpios: true + power-supply: true + width-mm: true + height-mm: true + panel-timing: true + port: true + +additionalProperties: false +... diff --git a/dts/Bindings/display/panel/kingdisplay,kd035g6-54nt.txt b/dts/Bindings/display/panel/kingdisplay,kd035g6-54nt.txt new file mode 100644 index 0000000000..fa9596082e --- /dev/null +++ b/dts/Bindings/display/panel/kingdisplay,kd035g6-54nt.txt @@ -0,0 +1,42 @@ +King Display KD035G6-54NT 3.5" (320x240 pixels) 24-bit TFT LCD panel + +Required properties: +- compatible: should be "kingdisplay,kd035g6-54nt" +- power-supply: See panel-common.txt +- reset-gpios: See panel-common.txt + +Optional properties: +- backlight: see panel-common.txt + +The generic bindings for the SPI slaves documented in [1] also apply. + +The device node can contain one 'port' child node with one child +'endpoint' node, according to the bindings defined in [2]. This +node should describe panel's video bus. + +[1]: Documentation/devicetree/bindings/spi/spi-bus.txt +[2]: Documentation/devicetree/bindings/graph.txt + +Example: + +&spi { + panel@0 { + compatible = "kingdisplay,kd035g6-54nt"; + reg = <0>; + + spi-max-frequency = <3125000>; + spi-3wire; + spi-cs-high; + + reset-gpios = <&gpe 2 GPIO_ACTIVE_LOW>; + + backlight = <&backlight>; + power-supply = <&ldo6>; + + port { + panel_input: endpoint { + remote-endpoint = <&panel_output>; + }; + }; + }; +}; diff --git a/dts/Bindings/display/panel/lvds.yaml b/dts/Bindings/display/panel/lvds.yaml new file mode 100644 index 0000000000..d0083301ac --- /dev/null +++ b/dts/Bindings/display/panel/lvds.yaml @@ -0,0 +1,107 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/lvds.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LVDS Display Panel + +maintainers: + - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> + - Thierry Reding <thierry.reding@gmail.com> + +description: |+ + LVDS is a physical layer specification defined in ANSI/TIA/EIA-644-A. Multiple + incompatible data link layers have been used over time to transmit image data + to LVDS panels. This bindings supports display panels compatible with the + following specifications. + + [JEIDA] "Digital Interface Standards for Monitor", JEIDA-59-1999, February + 1999 (Version 1.0), Japan Electronic Industry Development Association (JEIDA) + [LDI] "Open LVDS Display Interface", May 1999 (Version 0.95), National + Semiconductor + [VESA] "VESA Notebook Panel Standard", October 2007 (Version 1.0), Video + Electronics Standards Association (VESA) + + Device compatible with those specifications have been marketed under the + FPD-Link and FlatLink brands. + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + contains: + const: panel-lvds + description: + Shall contain "panel-lvds" in addition to a mandatory panel-specific + compatible string defined in individual panel bindings. The "panel-lvds" + value shall never be used on its own. + + data-mapping: + enum: + - jeida-18 + - jeida-24 + - vesa-24 + description: | + The color signals mapping order. + + LVDS data mappings are defined as follows. + + - "jeida-18" - 18-bit data mapping compatible with the [JEIDA], [LDI] and + [VESA] specifications. Data are transferred as follows on 3 LVDS lanes. + + Slot 0 1 2 3 4 5 6 + ________________ _________________ + Clock \_______________________/ + ______ ______ ______ ______ ______ ______ ______ + DATA0 ><__G0__><__R5__><__R4__><__R3__><__R2__><__R1__><__R0__>< + DATA1 ><__B1__><__B0__><__G5__><__G4__><__G3__><__G2__><__G1__>< + DATA2 ><_CTL2_><_CTL1_><_CTL0_><__B5__><__B4__><__B3__><__B2__>< + + - "jeida-24" - 24-bit data mapping compatible with the [DSIM] and [LDI] + specifications. Data are transferred as follows on 4 LVDS lanes. + + Slot 0 1 2 3 4 5 6 + ________________ _________________ + Clock \_______________________/ + ______ ______ ______ ______ ______ ______ ______ + DATA0 ><__G2__><__R7__><__R6__><__R5__><__R4__><__R3__><__R2__>< + DATA1 ><__B3__><__B2__><__G7__><__G6__><__G5__><__G4__><__G3__>< + DATA2 ><_CTL2_><_CTL1_><_CTL0_><__B7__><__B6__><__B5__><__B4__>< + DATA3 ><_CTL3_><__B1__><__B0__><__G1__><__G0__><__R1__><__R0__>< + + - "vesa-24" - 24-bit data mapping compatible with the [VESA] specification. + Data are transferred as follows on 4 LVDS lanes. + + Slot 0 1 2 3 4 5 6 + ________________ _________________ + Clock \_______________________/ + ______ ______ ______ ______ ______ ______ ______ + DATA0 ><__G0__><__R5__><__R4__><__R3__><__R2__><__R1__><__R0__>< + DATA1 ><__B1__><__B0__><__G5__><__G4__><__G3__><__G2__><__G1__>< + DATA2 ><_CTL2_><_CTL1_><_CTL0_><__B5__><__B4__><__B3__><__B2__>< + DATA3 ><_CTL3_><__B7__><__B6__><__G7__><__G6__><__R7__><__R6__>< + + Control signals are mapped as follows. + + CTL0: HSync + CTL1: VSync + CTL2: Data Enable + CTL3: 0 + + data-mirror: + type: boolean + description: + If set, reverse the bit order described in the data mappings below on all + data lanes, transmitting bits for slots 6 to 0 instead of 0 to 6. + +required: + - compatible + - data-mapping + - width-mm + - height-mm + - panel-timing + - port + +... diff --git a/dts/Bindings/display/panel/mitsubishi,aa104xd12.txt b/dts/Bindings/display/panel/mitsubishi,aa104xd12.txt deleted file mode 100644 index ced0121aed..0000000000 --- a/dts/Bindings/display/panel/mitsubishi,aa104xd12.txt +++ /dev/null @@ -1,47 +0,0 @@ -Mitsubishi AA204XD12 LVDS Display Panel -======================================= - -The AA104XD12 is a 10.4" XGA TFT-LCD display panel. - -These DT bindings follow the LVDS panel bindings defined in panel-lvds.txt -with the following device-specific properties. - - -Required properties: - -- compatible: Shall contain "mitsubishi,aa121td01" and "panel-lvds", in that - order. -- vcc-supply: Reference to the regulator powering the panel VCC pins. - - -Example -------- - -panel { - compatible = "mitsubishi,aa104xd12", "panel-lvds"; - vcc-supply = <&vcc_3v3>; - - width-mm = <210>; - height-mm = <158>; - - data-mapping = "jeida-24"; - - panel-timing { - /* 1024x768 @65Hz */ - clock-frequency = <65000000>; - hactive = <1024>; - vactive = <768>; - hsync-len = <136>; - hfront-porch = <20>; - hback-porch = <160>; - vfront-porch = <3>; - vback-porch = <29>; - vsync-len = <6>; - }; - - port { - panel_in: endpoint { - remote-endpoint = <&lvds_encoder>; - }; - }; -}; diff --git a/dts/Bindings/display/panel/mitsubishi,aa104xd12.yaml b/dts/Bindings/display/panel/mitsubishi,aa104xd12.yaml new file mode 100644 index 0000000000..b5e7ee230f --- /dev/null +++ b/dts/Bindings/display/panel/mitsubishi,aa104xd12.yaml @@ -0,0 +1,75 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/mitsubishi,aa104xd12.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mitsubishi AA104XD12 10.4" XGA LVDS Display Panel + +maintainers: + - Laurent Pinchart <laurent.pinchart@ideasonboard.com> + - Thierry Reding <thierry.reding@gmail.com> + +allOf: + - $ref: lvds.yaml# + +properties: + compatible: + items: + - const: mitsubishi,aa104xd12 + - {} # panel-lvds, but not listed here to avoid false select + + vcc-supply: + description: Reference to the regulator powering the panel VCC pins. + + data-mapping: + const: jeida-24 + + width-mm: + const: 210 + + height-mm: + const: 158 + + panel-timing: true + port: true + +additionalProperties: false + +required: + - compatible + - vcc-supply + +examples: + - |+ + + panel { + compatible = "mitsubishi,aa104xd12", "panel-lvds"; + vcc-supply = <&vcc_3v3>; + + width-mm = <210>; + height-mm = <158>; + + data-mapping = "jeida-24"; + + panel-timing { + /* 1024x768 @65Hz */ + clock-frequency = <65000000>; + hactive = <1024>; + vactive = <768>; + hsync-len = <136>; + hfront-porch = <20>; + hback-porch = <160>; + vfront-porch = <3>; + vback-porch = <29>; + vsync-len = <6>; + }; + + port { + panel_in: endpoint { + remote-endpoint = <&lvds_encoder>; + }; + }; + }; + +... diff --git a/dts/Bindings/display/panel/mitsubishi,aa121td01.txt b/dts/Bindings/display/panel/mitsubishi,aa121td01.txt deleted file mode 100644 index d6e1097504..0000000000 --- a/dts/Bindings/display/panel/mitsubishi,aa121td01.txt +++ /dev/null @@ -1,47 +0,0 @@ -Mitsubishi AA121TD01 LVDS Display Panel -======================================= - -The AA121TD01 is a 12.1" WXGA TFT-LCD display panel. - -These DT bindings follow the LVDS panel bindings defined in panel-lvds.txt -with the following device-specific properties. - - -Required properties: - -- compatible: Shall contain "mitsubishi,aa121td01" and "panel-lvds", in that - order. -- vcc-supply: Reference to the regulator powering the panel VCC pins. - - -Example -------- - -panel { - compatible = "mitsubishi,aa121td01", "panel-lvds"; - vcc-supply = <&vcc_3v3>; - - width-mm = <261>; - height-mm = <163>; - - data-mapping = "jeida-24"; - - panel-timing { - /* 1280x800 @60Hz */ - clock-frequency = <71000000>; - hactive = <1280>; - vactive = <800>; - hsync-len = <70>; - hfront-porch = <20>; - hback-porch = <70>; - vsync-len = <5>; - vfront-porch = <3>; - vback-porch = <15>; - }; - - port { - panel_in: endpoint { - remote-endpoint = <&lvds_encoder>; - }; - }; -}; diff --git a/dts/Bindings/display/panel/mitsubishi,aa121td01.yaml b/dts/Bindings/display/panel/mitsubishi,aa121td01.yaml new file mode 100644 index 0000000000..977c50a85b --- /dev/null +++ b/dts/Bindings/display/panel/mitsubishi,aa121td01.yaml @@ -0,0 +1,74 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/mitsubishi,aa121td01.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mitsubishi AA121TD01 12.1" WXGA LVDS Display Panel + +maintainers: + - Laurent Pinchart <laurent.pinchart@ideasonboard.com> + - Thierry Reding <thierry.reding@gmail.com> + +allOf: + - $ref: lvds.yaml# + +properties: + compatible: + items: + - const: mitsubishi,aa121td01 + - {} # panel-lvds, but not listed here to avoid false select + + vcc-supply: + description: Reference to the regulator powering the panel VCC pins. + + data-mapping: + const: jeida-24 + + width-mm: + const: 261 + + height-mm: + const: 163 + + panel-timing: true + port: true + +additionalProperties: false + +required: + - compatible + - vcc-supply + +examples: + - |+ + panel { + compatible = "mitsubishi,aa121td01", "panel-lvds"; + vcc-supply = <&vcc_3v3>; + + width-mm = <261>; + height-mm = <163>; + + data-mapping = "jeida-24"; + + panel-timing { + /* 1280x800 @60Hz */ + clock-frequency = <71000000>; + hactive = <1280>; + vactive = <800>; + hsync-len = <70>; + hfront-porch = <20>; + hback-porch = <70>; + vsync-len = <5>; + vfront-porch = <3>; + vback-porch = <15>; + }; + + port { + panel_in: endpoint { + remote-endpoint = <&lvds_encoder>; + }; + }; + }; + +... diff --git a/dts/Bindings/display/panel/nec,nl8048hl11.yaml b/dts/Bindings/display/panel/nec,nl8048hl11.yaml new file mode 100644 index 0000000000..aa788eaa2f --- /dev/null +++ b/dts/Bindings/display/panel/nec,nl8048hl11.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/nec,nl8048hl11.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NEC NL8048HL11 4.1" WVGA TFT LCD panel + +description: + The NEC NL8048HL11 is a 4.1" WVGA TFT LCD panel with a 24-bit RGB parallel + data interface and an SPI control interface. + +maintainers: + - Laurent Pinchart <laurent.pinchart@ideasonboard.com> + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + const: nec,nl8048hl11 + + label: true + port: true + reg: true + reset-gpios: true + + spi-max-frequency: + maximum: 10000000 + +required: + - compatible + - reg + - reset-gpios + - port + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + + spi0 { + #address-cells = <1>; + #size-cells = <0>; + + lcd_panel: panel@0 { + compatible = "nec,nl8048hl11"; + reg = <0>; + spi-max-frequency = <10000000>; + + reset-gpios = <&gpio7 7 GPIO_ACTIVE_LOW>; + + port { + lcd_in: endpoint { + remote-endpoint = <&dpi_out>; + }; + }; + }; + }; + +... diff --git a/dts/Bindings/display/panel/ortustech,com37h3m05dtc.txt b/dts/Bindings/display/panel/ortustech,com37h3m05dtc.txt new file mode 100644 index 0000000000..c16907c02f --- /dev/null +++ b/dts/Bindings/display/panel/ortustech,com37h3m05dtc.txt @@ -0,0 +1,12 @@ +OrtusTech COM37H3M05DTC Blanview 3.7" VGA portrait TFT-LCD panel + +Required properties: +- compatible: should be "ortustech,com37h3m05dtc" + +Optional properties: +- enable-gpios: GPIO pin to enable or disable the panel +- backlight: phandle of the backlight device attached to the panel +- power-supply: phandle of the regulator that provides the supply voltage + +This binding is compatible with the simple-panel binding, which is specified +in simple-panel.txt in this directory. diff --git a/dts/Bindings/display/panel/ortustech,com37h3m99dtc.txt b/dts/Bindings/display/panel/ortustech,com37h3m99dtc.txt new file mode 100644 index 0000000000..06a73c3f46 --- /dev/null +++ b/dts/Bindings/display/panel/ortustech,com37h3m99dtc.txt @@ -0,0 +1,12 @@ +OrtusTech COM37H3M99DTC Blanview 3.7" VGA portrait TFT-LCD panel + +Required properties: +- compatible: should be "ortustech,com37h3m99dtc" + +Optional properties: +- enable-gpios: GPIO pin to enable or disable the panel +- backlight: phandle of the backlight device attached to the panel +- power-supply: phandle of the regulator that provides the supply voltage + +This binding is compatible with the simple-panel binding, which is specified +in simple-panel.txt in this directory. diff --git a/dts/Bindings/display/panel/panel-common.txt b/dts/Bindings/display/panel/panel-common.txt deleted file mode 100644 index 5d2519af4b..0000000000 --- a/dts/Bindings/display/panel/panel-common.txt +++ /dev/null @@ -1,101 +0,0 @@ -Common Properties for Display Panel -=================================== - -This document defines device tree properties common to several classes of -display panels. It doesn't constitue a device tree binding specification by -itself but is meant to be referenced by device tree bindings. - -When referenced from panel device tree bindings the properties defined in this -document are defined as follows. The panel device tree bindings are -responsible for defining whether each property is required or optional. - - -Descriptive Properties ----------------------- - -- width-mm, -- height-mm: The width-mm and height-mm specify the width and height of the - physical area where images are displayed. These properties are expressed in - millimeters and rounded to the closest unit. - -- label: The label property specifies a symbolic name for the panel as a - string suitable for use by humans. It typically contains a name inscribed on - the system (e.g. as an affixed label) or specified in the system's - documentation (e.g. in the user's manual). - - If no such name exists, and unless the property is mandatory according to - device tree bindings, it shall rather be omitted than constructed of - non-descriptive information. For instance an LCD panel in a system that - contains a single panel shall not be labelled "LCD" if that name is not - inscribed on the system or used in a descriptive fashion in system - documentation. - - -Display Timings ---------------- - -- panel-timing: Most display panels are restricted to a single resolution and - require specific display timings. The panel-timing subnode expresses those - timings as specified in the timing subnode section of the display timing - bindings defined in - Documentation/devicetree/bindings/display/panel/display-timing.txt. - - -Connectivity ------------- - -- ports: Panels receive video data through one or multiple connections. While - the nature of those connections is specific to the panel type, the - connectivity is expressed in a standard fashion using ports as specified in - the device graph bindings defined in - Documentation/devicetree/bindings/graph.txt. - -- ddc-i2c-bus: Some panels expose EDID information through an I2C-compatible - bus such as DDC2 or E-DDC. For such panels the ddc-i2c-bus contains a - phandle to the system I2C controller connected to that bus. - - -Control I/Os ------------- - -Many display panels can be controlled through pins driven by GPIOs. The nature -and timing of those control signals are device-specific and left for panel -device tree bindings to specify. The following GPIO specifiers can however be -used for panels that implement compatible control signals. - -- enable-gpios: Specifier for a GPIO connected to the panel enable control - signal. The enable signal is active high and enables operation of the panel. - This property can also be used for panels implementing an active low power - down signal, which is a negated version of the enable signal. Active low - enable signals (or active high power down signals) can be supported by - inverting the GPIO specifier polarity flag. - - Note that the enable signal control panel operation only and must not be - confused with a backlight enable signal. - -- reset-gpios: Specifier for a GPIO coonnected to the panel reset control - signal. The reset signal is active low and resets the panel internal logic - while active. Active high reset signals can be supported by inverting the - GPIO specifier polarity flag. - -Power ------ - -- power-supply: display panels require power to be supplied. While several - panels need more than one power supply with panel-specific constraints - governing the order and timings of the power supplies, in many cases a single - power supply is sufficient, either because the panel has a single power rail, - or because all its power rails can be driven by the same supply. In that case - the power-supply property specifies the supply powering the panel as a phandle - to a regulator. - -Backlight ---------- - -Most display panels include a backlight. Some of them also include a backlight -controller exposed through a control bus such as I2C or DSI. Others expose -backlight control through GPIO, PWM or other signals connected to an external -backlight controller. - -- backlight: For panels whose backlight is controlled by an external backlight - controller, this property contains a phandle that references the controller. diff --git a/dts/Bindings/display/panel/panel-common.yaml b/dts/Bindings/display/panel/panel-common.yaml new file mode 100644 index 0000000000..ef8d8cdfce --- /dev/null +++ b/dts/Bindings/display/panel/panel-common.yaml @@ -0,0 +1,149 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/panel-common.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Common Properties for Display Panels + +maintainers: + - Thierry Reding <thierry.reding@gmail.com> + - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> + +description: | + This document defines device tree properties common to several classes of + display panels. It doesn't constitue a device tree binding specification by + itself but is meant to be referenced by device tree bindings. + + When referenced from panel device tree bindings the properties defined in this + document are defined as follows. The panel device tree bindings are + responsible for defining whether each property is required or optional. + +properties: + # Descriptive Properties + width-mm: + description: + Specifies the width of the physical area where images are displayed. This + property is expressed in millimeters and rounded to the closest unit. + + height-mm: + description: + Specifies the height of the physical area where images are displayed. This + property is expressed in millimeters and rounded to the closest unit. + + label: + description: | + The label property specifies a symbolic name for the panel as a + string suitable for use by humans. It typically contains a name inscribed + on the system (e.g. as an affixed label) or specified in the system's + documentation (e.g. in the user's manual). + + If no such name exists, and unless the property is mandatory according to + device tree bindings, it shall rather be omitted than constructed of + non-descriptive information. For instance an LCD panel in a system that + contains a single panel shall not be labelled "LCD" if that name is not + inscribed on the system or used in a descriptive fashion in system + documentation. + + rotation: + description: + Display rotation in degrees counter clockwise (0,90,180,270) + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [ 0, 90, 180, 270 ] + + # Display Timings + panel-timing: + type: object + description: + Most display panels are restricted to a single resolution and + require specific display timings. The panel-timing subnode expresses those + timings as specified in the timing subnode section of the display timing + bindings defined in + Documentation/devicetree/bindings/display/panel/display-timing.txt. + + # Connectivity + port: + type: object + + ports: + type: object + description: + Panels receive video data through one or multiple connections. While + the nature of those connections is specific to the panel type, the + connectivity is expressed in a standard fashion using ports as specified + in the device graph bindings defined in + Documentation/devicetree/bindings/graph.txt. + + ddc-i2c-bus: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Some panels expose EDID information through an I2C-compatible + bus such as DDC2 or E-DDC. For such panels the ddc-i2c-bus contains a + phandle to the system I2C controller connected to that bus. + + no-hpd: + type: boolean + description: + This panel is supposed to communicate that it's ready via HPD + (hot plug detect) signal, but the signal isn't hooked up so we should + hardcode the max delay from the panel spec when powering up the panel. + + # Control I/Os + + # Many display panels can be controlled through pins driven by GPIOs. The nature + # and timing of those control signals are device-specific and left for panel + # device tree bindings to specify. The following GPIO specifiers can however be + # used for panels that implement compatible control signals. + + enable-gpios: + maxItems: 1 + description: | + Specifier for a GPIO connected to the panel enable control signal. The + enable signal is active high and enables operation of the panel. This + property can also be used for panels implementing an active low power down + signal, which is a negated version of the enable signal. Active low enable + signals (or active high power down signals) can be supported by inverting + the GPIO specifier polarity flag. + + Note that the enable signal control panel operation only and must not be + confused with a backlight enable signal. + + reset-gpios: + maxItems: 1 + description: + Specifier for a GPIO connected to the panel reset control signal. + The reset signal is active low and resets the panel internal logic + while active. Active high reset signals can be supported by inverting the + GPIO specifier polarity flag. + + # Power + power-supply: + description: + Display panels require power to be supplied. While several panels need + more than one power supply with panel-specific constraints governing the + order and timings of the power supplies, in many cases a single power + supply is sufficient, either because the panel has a single power rail, or + because all its power rails can be driven by the same supply. In that case + the power-supply property specifies the supply powering the panel as a + phandle to a regulator. + + # Backlight + + # Most display panels include a backlight. Some of them also include a backlight + # controller exposed through a control bus such as I2C or DSI. Others expose + # backlight control through GPIO, PWM or other signals connected to an external + # backlight controller. + + backlight: + $ref: /schemas/types.yaml#/definitions/phandle + description: + For panels whose backlight is controlled by an external backlight + controller, this property contains a phandle that references the + controller. + +dependencies: + width-mm: [ height-mm ] + height-mm: [ width-mm ] + +... diff --git a/dts/Bindings/display/panel/panel-lvds.txt b/dts/Bindings/display/panel/panel-lvds.txt deleted file mode 100644 index 250850a215..0000000000 --- a/dts/Bindings/display/panel/panel-lvds.txt +++ /dev/null @@ -1,121 +0,0 @@ -LVDS Display Panel -================== - -LVDS is a physical layer specification defined in ANSI/TIA/EIA-644-A. Multiple -incompatible data link layers have been used over time to transmit image data -to LVDS panels. This bindings supports display panels compatible with the -following specifications. - -[JEIDA] "Digital Interface Standards for Monitor", JEIDA-59-1999, February -1999 (Version 1.0), Japan Electronic Industry Development Association (JEIDA) -[LDI] "Open LVDS Display Interface", May 1999 (Version 0.95), National -Semiconductor -[VESA] "VESA Notebook Panel Standard", October 2007 (Version 1.0), Video -Electronics Standards Association (VESA) - -Device compatible with those specifications have been marketed under the -FPD-Link and FlatLink brands. - - -Required properties: - -- compatible: Shall contain "panel-lvds" in addition to a mandatory - panel-specific compatible string defined in individual panel bindings. The - "panel-lvds" value shall never be used on its own. -- width-mm: See panel-common.txt. -- height-mm: See panel-common.txt. -- data-mapping: The color signals mapping order, "jeida-18", "jeida-24" - or "vesa-24". - -Optional properties: - -- label: See panel-common.txt. -- gpios: See panel-common.txt. -- backlight: See panel-common.txt. -- power-supply: See panel-common.txt. -- data-mirror: If set, reverse the bit order described in the data mappings - below on all data lanes, transmitting bits for slots 6 to 0 instead of - 0 to 6. - -Required nodes: - -- panel-timing: See panel-common.txt. -- ports: See panel-common.txt. These bindings require a single port subnode - corresponding to the panel LVDS input. - - -LVDS data mappings are defined as follows. - -- "jeida-18" - 18-bit data mapping compatible with the [JEIDA], [LDI] and - [VESA] specifications. Data are transferred as follows on 3 LVDS lanes. - -Slot 0 1 2 3 4 5 6 - ________________ _________________ -Clock \_______________________/ - ______ ______ ______ ______ ______ ______ ______ -DATA0 ><__G0__><__R5__><__R4__><__R3__><__R2__><__R1__><__R0__>< -DATA1 ><__B1__><__B0__><__G5__><__G4__><__G3__><__G2__><__G1__>< -DATA2 ><_CTL2_><_CTL1_><_CTL0_><__B5__><__B4__><__B3__><__B2__>< - -- "jeida-24" - 24-bit data mapping compatible with the [DSIM] and [LDI] - specifications. Data are transferred as follows on 4 LVDS lanes. - -Slot 0 1 2 3 4 5 6 - ________________ _________________ -Clock \_______________________/ - ______ ______ ______ ______ ______ ______ ______ -DATA0 ><__G2__><__R7__><__R6__><__R5__><__R4__><__R3__><__R2__>< -DATA1 ><__B3__><__B2__><__G7__><__G6__><__G5__><__G4__><__G3__>< -DATA2 ><_CTL2_><_CTL1_><_CTL0_><__B7__><__B6__><__B5__><__B4__>< -DATA3 ><_CTL3_><__B1__><__B0__><__G1__><__G0__><__R1__><__R0__>< - -- "vesa-24" - 24-bit data mapping compatible with the [VESA] specification. - Data are transferred as follows on 4 LVDS lanes. - -Slot 0 1 2 3 4 5 6 - ________________ _________________ -Clock \_______________________/ - ______ ______ ______ ______ ______ ______ ______ -DATA0 ><__G0__><__R5__><__R4__><__R3__><__R2__><__R1__><__R0__>< -DATA1 ><__B1__><__B0__><__G5__><__G4__><__G3__><__G2__><__G1__>< -DATA2 ><_CTL2_><_CTL1_><_CTL0_><__B5__><__B4__><__B3__><__B2__>< -DATA3 ><_CTL3_><__B7__><__B6__><__G7__><__G6__><__R7__><__R6__>< - -Control signals are mapped as follows. - -CTL0: HSync -CTL1: VSync -CTL2: Data Enable -CTL3: 0 - - -Example -------- - -panel { - compatible = "mitsubishi,aa121td01", "panel-lvds"; - - width-mm = <261>; - height-mm = <163>; - - data-mapping = "jeida-24"; - - panel-timing { - /* 1280x800 @60Hz */ - clock-frequency = <71000000>; - hactive = <1280>; - vactive = <800>; - hsync-len = <70>; - hfront-porch = <20>; - hback-porch = <70>; - vsync-len = <5>; - vfront-porch = <3>; - vback-porch = <15>; - }; - - port { - panel_in: endpoint { - remote-endpoint = <&lvds_encoder>; - }; - }; -}; diff --git a/dts/Bindings/display/panel/panel.txt b/dts/Bindings/display/panel/panel.txt deleted file mode 100644 index e2e6867852..0000000000 --- a/dts/Bindings/display/panel/panel.txt +++ /dev/null @@ -1,4 +0,0 @@ -Common display properties -------------------------- - -- rotation: Display rotation in degrees counter clockwise (0,90,180,270) diff --git a/dts/Bindings/display/panel/pda,91-00156-a0.txt b/dts/Bindings/display/panel/pda,91-00156-a0.txt deleted file mode 100644 index 1639fb17a9..0000000000 --- a/dts/Bindings/display/panel/pda,91-00156-a0.txt +++ /dev/null @@ -1,14 +0,0 @@ -PDA 91-00156-A0 5.0" WVGA TFT LCD panel - -Required properties: -- compatible: should be "pda,91-00156-a0" -- power-supply: this panel requires a single power supply. A phandle to a -regulator needs to be specified here. Compatible with panel-common binding which -is specified in the panel-common.txt in this directory. -- backlight: this panel's backlight is controlled by an external backlight -controller. A phandle to this controller needs to be specified here. -Compatible with panel-common binding which is specified in the panel-common.txt -in this directory. - -This binding is compatible with the simple-panel binding, which is specified -in simple-panel.txt in this directory. diff --git a/dts/Bindings/display/panel/pda,91-00156-a0.yaml b/dts/Bindings/display/panel/pda,91-00156-a0.yaml new file mode 100644 index 0000000000..ccd3623b49 --- /dev/null +++ b/dts/Bindings/display/panel/pda,91-00156-a0.yaml @@ -0,0 +1,31 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/pda,91-00156-a0.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: PDA 91-00156-A0 5.0" WVGA TFT LCD panel + +maintainers: + - Cristian Birsan <cristian.birsan@microchip.com> + - Thierry Reding <thierry.reding@gmail.com> + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + const: pda,91-00156-a0 + + power-supply: true + backlight: true + port: true + +additionalProperties: false + +required: + - compatible + - power-supply + - backlight + +... diff --git a/dts/Bindings/display/panel/raspberrypi,7inch-touchscreen.txt b/dts/Bindings/display/panel/raspberrypi,7inch-touchscreen.txt deleted file mode 100644 index e9e19c0592..0000000000 --- a/dts/Bindings/display/panel/raspberrypi,7inch-touchscreen.txt +++ /dev/null @@ -1,49 +0,0 @@ -This binding covers the official 7" (800x480) Raspberry Pi touchscreen -panel. - -This DSI panel contains: - -- TC358762 DSI->DPI bridge -- Atmel microcontroller on I2C for power sequencing the DSI bridge and - controlling backlight -- Touchscreen controller on I2C for touch input - -and this binding covers the DSI display parts but not its touch input. - -Required properties: -- compatible: Must be "raspberrypi,7inch-touchscreen-panel" -- reg: Must be "45" -- port: See panel-common.txt - -Example: - -dsi1: dsi@7e700000 { - #address-cells = <1>; - #size-cells = <0>; - <...> - - port { - dsi_out_port: endpoint { - remote-endpoint = <&panel_dsi_port>; - }; - }; -}; - -i2c_dsi: i2c { - compatible = "i2c-gpio"; - #address-cells = <1>; - #size-cells = <0>; - gpios = <&gpio 28 0 - &gpio 29 0>; - - lcd@45 { - compatible = "raspberrypi,7inch-touchscreen-panel"; - reg = <0x45>; - - port { - panel_dsi_port: endpoint { - remote-endpoint = <&dsi_out_port>; - }; - }; - }; -}; diff --git a/dts/Bindings/display/panel/raspberrypi,7inch-touchscreen.yaml b/dts/Bindings/display/panel/raspberrypi,7inch-touchscreen.yaml new file mode 100644 index 0000000000..22a083f7bc --- /dev/null +++ b/dts/Bindings/display/panel/raspberrypi,7inch-touchscreen.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/raspberrypi,7inch-touchscreen.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: The official 7" (800x480) Raspberry Pi touchscreen + +maintainers: + - Eric Anholt <eric@anholt.net> + - Thierry Reding <thierry.reding@gmail.com> + +description: |+ + This DSI panel contains: + + - TC358762 DSI->DPI bridge + - Atmel microcontroller on I2C for power sequencing the DSI bridge and + controlling backlight + - Touchscreen controller on I2C for touch input + + and this binding covers the DSI display parts but not its touch input. + +properties: + compatible: + const: raspberrypi,7inch-touchscreen-panel + + reg: + const: 0x45 + + port: true + +required: + - compatible + - reg + - port + +additionalProperties: false + +examples: + - |+ + dsi1: dsi { + #address-cells = <1>; + #size-cells = <0>; + + port { + dsi_out_port: endpoint { + remote-endpoint = <&panel_dsi_port>; + }; + }; + }; + + i2c_dsi: i2c { + compatible = "i2c-gpio"; + #address-cells = <1>; + #size-cells = <0>; + scl-gpios = <&gpio 28 0>; + sda-gpios = <&gpio 29 0>; + + lcd@45 { + compatible = "raspberrypi,7inch-touchscreen-panel"; + reg = <0x45>; + + port { + panel_dsi_port: endpoint { + remote-endpoint = <&dsi_out_port>; + }; + }; + }; + }; + +... diff --git a/dts/Bindings/display/panel/raydium,rm67191.txt b/dts/Bindings/display/panel/raydium,rm67191.txt new file mode 100644 index 0000000000..10424695aa --- /dev/null +++ b/dts/Bindings/display/panel/raydium,rm67191.txt @@ -0,0 +1,41 @@ +Raydium RM67171 OLED LCD panel with MIPI-DSI protocol + +Required properties: +- compatible: "raydium,rm67191" +- reg: virtual channel for MIPI-DSI protocol + must be <0> +- dsi-lanes: number of DSI lanes to be used + must be <3> or <4> +- port: input port node with endpoint definition as + defined in Documentation/devicetree/bindings/graph.txt; + the input port should be connected to a MIPI-DSI device + driver + +Optional properties: +- reset-gpios: a GPIO spec for the RST_B GPIO pin +- v3p3-supply: phandle to 3.3V regulator that powers the VDD_3V3 pin +- v1p8-supply: phandle to 1.8V regulator that powers the VDD_1V8 pin +- width-mm: see panel-common.txt +- height-mm: see panel-common.txt +- video-mode: 0 - burst-mode + 1 - non-burst with sync event + 2 - non-burst with sync pulse + +Example: + + panel@0 { + compatible = "raydium,rm67191"; + reg = <0>; + pinctrl-0 = <&pinctrl_mipi_dsi_0_1_en>; + pinctrl-names = "default"; + reset-gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; + dsi-lanes = <4>; + width-mm = <68>; + height-mm = <121>; + + port { + panel_in: endpoint { + remote-endpoint = <&mipi_out>; + }; + }; + }; diff --git a/dts/Bindings/display/panel/rocktech,jh057n00900.txt b/dts/Bindings/display/panel/rocktech,jh057n00900.txt index 1b5763200c..a372c5d846 100644 --- a/dts/Bindings/display/panel/rocktech,jh057n00900.txt +++ b/dts/Bindings/display/panel/rocktech,jh057n00900.txt @@ -5,6 +5,9 @@ Required properties: - reg: DSI virtual channel of the peripheral - reset-gpios: panel reset gpio - backlight: phandle of the backlight device attached to the panel +- vcc-supply: phandle of the regulator that provides the vcc supply voltage. +- iovcc-supply: phandle of the regulator that provides the iovcc supply + voltage. Example: @@ -14,5 +17,7 @@ Example: reg = <0>; backlight = <&backlight>; reset-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>; + vcc-supply = <®_2v8_p>; + iovcc-supply = <®_1v8_p>; }; }; diff --git a/dts/Bindings/display/panel/sgd,gktw70sdae4se.txt b/dts/Bindings/display/panel/sgd,gktw70sdae4se.txt deleted file mode 100644 index d06644b555..0000000000 --- a/dts/Bindings/display/panel/sgd,gktw70sdae4se.txt +++ /dev/null @@ -1,41 +0,0 @@ -Solomon Goldentek Display GKTW70SDAE4SE LVDS Display Panel -========================================================== - -The GKTW70SDAE4SE is a 7" WVGA TFT-LCD display panel. - -These DT bindings follow the LVDS panel bindings defined in panel-lvds.txt -with the following device-specific properties. - -Required properties: - -- compatible: Shall contain "sgd,gktw70sdae4se" and "panel-lvds", in that order. - -Example -------- - -panel { - compatible = "sgd,gktw70sdae4se", "panel-lvds"; - - width-mm = <153>; - height-mm = <86>; - - data-mapping = "jeida-18"; - - panel-timing { - clock-frequency = <32000000>; - hactive = <800>; - vactive = <480>; - hback-porch = <39>; - hfront-porch = <39>; - vback-porch = <29>; - vfront-porch = <13>; - hsync-len = <47>; - vsync-len = <2>; - }; - - port { - panel_in: endpoint { - remote-endpoint = <&lvds_encoder>; - }; - }; -}; diff --git a/dts/Bindings/display/panel/sgd,gktw70sdae4se.yaml b/dts/Bindings/display/panel/sgd,gktw70sdae4se.yaml new file mode 100644 index 0000000000..e63a570ae5 --- /dev/null +++ b/dts/Bindings/display/panel/sgd,gktw70sdae4se.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/sgd,gktw70sdae4se.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Solomon Goldentek Display GKTW70SDAE4SE 7" WVGA LVDS Display Panel + +maintainers: + - Neil Armstrong <narmstrong@baylibre.com> + - Thierry Reding <thierry.reding@gmail.com> + +allOf: + - $ref: lvds.yaml# + +properties: + compatible: + items: + - const: sgd,gktw70sdae4se + - {} # panel-lvds, but not listed here to avoid false select + + data-mapping: + const: jeida-18 + + width-mm: + const: 153 + + height-mm: + const: 86 + + panel-timing: true + port: true + +additionalProperties: false + +required: + - compatible + +examples: + - |+ + panel { + compatible = "sgd,gktw70sdae4se", "panel-lvds"; + + width-mm = <153>; + height-mm = <86>; + + data-mapping = "jeida-18"; + + panel-timing { + clock-frequency = <32000000>; + hactive = <800>; + vactive = <480>; + hback-porch = <39>; + hfront-porch = <39>; + vback-porch = <29>; + vfront-porch = <13>; + hsync-len = <47>; + vsync-len = <2>; + }; + + port { + panel_in: endpoint { + remote-endpoint = <&lvds_encoder>; + }; + }; + }; + +... diff --git a/dts/Bindings/display/panel/sharp,ld-d5116z01b.txt b/dts/Bindings/display/panel/sharp,ld-d5116z01b.txt new file mode 100644 index 0000000000..fd9cf39bde --- /dev/null +++ b/dts/Bindings/display/panel/sharp,ld-d5116z01b.txt @@ -0,0 +1,26 @@ +Sharp LD-D5116Z01B 12.3" WUXGA+ eDP panel + +Required properties: +- compatible: should be "sharp,ld-d5116z01b" +- power-supply: regulator to provide the VCC supply voltage (3.3 volts) + +This binding is compatible with the simple-panel binding. + +The device node can contain one 'port' child node with one child +'endpoint' node, according to the bindings defined in [1]. This +node should describe panel's video bus. + +[1]: Documentation/devicetree/bindings/media/video-interfaces.txt + +Example: + + panel: panel { + compatible = "sharp,ld-d5116z01b"; + power-supply = <&vlcd_3v3>; + + port { + panel_ep: endpoint { + remote-endpoint = <&bridge_out_ep>; + }; + }; + }; diff --git a/dts/Bindings/display/panel/sharp,lq070y3dg3b.txt b/dts/Bindings/display/panel/sharp,lq070y3dg3b.txt new file mode 100644 index 0000000000..95534b55ee --- /dev/null +++ b/dts/Bindings/display/panel/sharp,lq070y3dg3b.txt @@ -0,0 +1,12 @@ +Sharp LQ070Y3DG3B 7.0" WVGA landscape TFT LCD panel + +Required properties: +- compatible: should be "sharp,lq070y3dg3b" + +Optional properties: +- enable-gpios: GPIO pin to enable or disable the panel +- backlight: phandle of the backlight device attached to the panel +- power-supply: phandle of the regulator that provides the supply voltage + +This binding is compatible with the simple-panel binding, which is specified +in simple-panel.txt in this directory. diff --git a/dts/Bindings/display/panel/sharp,ls020b1dd01d.txt b/dts/Bindings/display/panel/sharp,ls020b1dd01d.txt new file mode 100644 index 0000000000..e45edbc565 --- /dev/null +++ b/dts/Bindings/display/panel/sharp,ls020b1dd01d.txt @@ -0,0 +1,12 @@ +Sharp 2.0" (240x160 pixels) 16-bit TFT LCD panel + +Required properties: +- compatible: should be "sharp,ls020b1dd01d" +- power-supply: as specified in the base binding + +Optional properties: +- backlight: as specified in the base binding +- enable-gpios: as specified in the base binding + +This binding is compatible with the simple-panel binding, which is specified +in simple-panel.txt in this directory. diff --git a/dts/Bindings/display/panel/simple-panel.txt b/dts/Bindings/display/panel/simple-panel.txt index b2b872c710..e11208fb7d 100644 --- a/dts/Bindings/display/panel/simple-panel.txt +++ b/dts/Bindings/display/panel/simple-panel.txt @@ -1,28 +1 @@ -Simple display panel -==================== - -panel node ----------- - -Required properties: -- power-supply: See panel-common.txt - -Optional properties: -- ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing -- enable-gpios: GPIO pin to enable or disable the panel -- backlight: phandle of the backlight device attached to the panel -- no-hpd: This panel is supposed to communicate that it's ready via HPD - (hot plug detect) signal, but the signal isn't hooked up so we should - hardcode the max delay from the panel spec when powering up the panel. - -Example: - - panel: panel { - compatible = "cptt,claa101wb01"; - ddc-i2c-bus = <&panelddc>; - - power-supply = <&vdd_pnl_reg>; - enable-gpios = <&gpio 90 0>; - - backlight = <&backlight>; - }; +See panel-common.yaml in this directory. diff --git a/dts/Bindings/display/panel/tfc,s9700rtwv43tr-01b.txt b/dts/Bindings/display/panel/tfc,s9700rtwv43tr-01b.txt deleted file mode 100644 index dfb572f085..0000000000 --- a/dts/Bindings/display/panel/tfc,s9700rtwv43tr-01b.txt +++ /dev/null @@ -1,15 +0,0 @@ -TFC S9700RTWV43TR-01B 7" Three Five Corp 800x480 LCD panel with -resistive touch - -The panel is found on TI AM335x-evm. - -Required properties: -- compatible: should be "tfc,s9700rtwv43tr-01b" -- power-supply: See panel-common.txt - -Optional properties: -- enable-gpios: GPIO pin to enable or disable the panel, if there is one -- backlight: phandle of the backlight device attached to the panel - -This binding is compatible with the simple-panel binding, which is specified -in simple-panel.txt in this directory. diff --git a/dts/Bindings/display/panel/tfc,s9700rtwv43tr-01b.yaml b/dts/Bindings/display/panel/tfc,s9700rtwv43tr-01b.yaml new file mode 100644 index 0000000000..9e5994417c --- /dev/null +++ b/dts/Bindings/display/panel/tfc,s9700rtwv43tr-01b.yaml @@ -0,0 +1,33 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/tfc,s9700rtwv43tr-01b.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TFC S9700RTWV43TR-01B 7" Three Five Corp 800x480 LCD panel with resistive touch + +maintainers: + - Jyri Sarha <jsarha@ti.com> + - Thierry Reding <thierry.reding@gmail.com> + +description: |+ + The panel is found on TI AM335x-evm. + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + const: tfc,s9700rtwv43tr-01b + + enable-gpios: true + backlight: true + port: true + +additionalProperties: false + +required: + - compatible + - power-supply + +... diff --git a/dts/Bindings/display/panel/ti,nspire.yaml b/dts/Bindings/display/panel/ti,nspire.yaml new file mode 100644 index 0000000000..5c5a3b519e --- /dev/null +++ b/dts/Bindings/display/panel/ti,nspire.yaml @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/ti,nspire.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments NSPIRE Display Panels + +maintainers: + - Linus Walleij <linus.walleij@linaro.org> + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + enum: + - ti,nspire-cx-lcd-panel + - ti,nspire-classic-lcd-panel + port: true + +required: + - compatible + +additionalProperties: false + +examples: + - | + panel { + compatible = "ti,nspire-cx-lcd-panel"; + port { + panel_in: endpoint { + remote-endpoint = <&pads>; + }; + }; + }; diff --git a/dts/Bindings/display/panel/tpo,tpg110.txt b/dts/Bindings/display/panel/tpo,tpg110.txt deleted file mode 100644 index 40f3d7c713..0000000000 --- a/dts/Bindings/display/panel/tpo,tpg110.txt +++ /dev/null @@ -1,70 +0,0 @@ -TPO TPG110 Panel -================ - -This panel driver is a component that acts as an intermediary -between an RGB output and a variety of panels. The panel -driver is strapped up in electronics to the desired resolution -and other properties, and has a control interface over 3WIRE -SPI. By talking to the TPG110 over SPI, the strapped properties -can be discovered and the hardware is therefore mostly -self-describing. - - +--------+ -SPI -> | TPO | -> physical display -RGB -> | TPG110 | - +--------+ - -If some electrical strap or alternate resolution is desired, -this can be set up by taking software control of the display -over the SPI interface. The interface can also adjust -for properties of the display such as gamma correction and -certain electrical driving levels. - -The TPG110 does not know the physical dimensions of the panel -connected, so this needs to be specified in the device tree. - -It requires a GPIO line for control of its reset line. - -The serial protocol has line names that resemble I2C but the -protocol is not I2C but 3WIRE SPI. - -Required properties: -- compatible : one of: - "ste,nomadik-nhk15-display", "tpo,tpg110" - "tpo,tpg110" -- grestb-gpios : panel reset GPIO -- width-mm : see display/panel/panel-common.txt -- height-mm : see display/panel/panel-common.txt - -The device needs to be a child of an SPI bus, see -spi/spi-bus.txt. The SPI child must set the following -properties: -- spi-3wire -- spi-max-frequency = <3000000>; -as these are characteristics of this device. - -The device node can contain one 'port' child node with one child -'endpoint' node, according to the bindings defined in -media/video-interfaces.txt. This node should describe panel's video bus. - -Example -------- - -panel: display@0 { - compatible = "tpo,tpg110"; - reg = <0>; - spi-3wire; - /* 320 ns min period ~= 3 MHz */ - spi-max-frequency = <3000000>; - /* Width and height from data sheet */ - width-mm = <116>; - height-mm = <87>; - grestb-gpios = <&foo_gpio 5 GPIO_ACTIVE_LOW>; - backlight = <&bl>; - - port { - nomadik_clcd_panel: endpoint { - remote-endpoint = <&foo>; - }; - }; -}; diff --git a/dts/Bindings/display/panel/tpo,tpg110.yaml b/dts/Bindings/display/panel/tpo,tpg110.yaml new file mode 100644 index 0000000000..a51660b73f --- /dev/null +++ b/dts/Bindings/display/panel/tpo,tpg110.yaml @@ -0,0 +1,101 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/tpo,tpg110.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TPO TPG110 Panel + +maintainers: + - Linus Walleij <linus.walleij@linaro.org> + - Thierry Reding <thierry.reding@gmail.com> + +description: |+ + This panel driver is a component that acts as an intermediary + between an RGB output and a variety of panels. The panel + driver is strapped up in electronics to the desired resolution + and other properties, and has a control interface over 3WIRE + SPI. By talking to the TPG110 over SPI, the strapped properties + can be discovered and the hardware is therefore mostly + self-describing. + + +--------+ + SPI -> | TPO | -> physical display + RGB -> | TPG110 | + +--------+ + + If some electrical strap or alternate resolution is desired, + this can be set up by taking software control of the display + over the SPI interface. The interface can also adjust + for properties of the display such as gamma correction and + certain electrical driving levels. + + The TPG110 does not know the physical dimensions of the panel + connected, so this needs to be specified in the device tree. + + It requires a GPIO line for control of its reset line. + + The serial protocol has line names that resemble I2C but the + protocol is not I2C but 3WIRE SPI. + + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + oneOf: + - items: + - enum: + - ste,nomadik-nhk15-display + - const: tpo,tpg110 + - const: tpo,tpg110 + + reg: true + + grestb-gpios: + maxItems: 1 + description: panel reset GPIO + + spi-3wire: true + + spi-max-frequency: + const: 3000000 + +required: + - compatible + - reg + - grestb-gpios + - width-mm + - height-mm + - spi-3wire + - spi-max-frequency + - port + +examples: + - |+ + spi { + #address-cells = <1>; + #size-cells = <0>; + + panel: display@0 { + compatible = "tpo,tpg110"; + reg = <0>; + spi-3wire; + /* 320 ns min period ~= 3 MHz */ + spi-max-frequency = <3000000>; + /* Width and height from data sheet */ + width-mm = <116>; + height-mm = <87>; + grestb-gpios = <&foo_gpio 5 1>; + backlight = <&bl>; + + port { + nomadik_clcd_panel: endpoint { + remote-endpoint = <&foo>; + }; + }; + }; + }; + +... diff --git a/dts/Bindings/display/rockchip/dw_mipi_dsi_rockchip.txt b/dts/Bindings/display/rockchip/dw_mipi_dsi_rockchip.txt index 6bb59ab39f..ce4c1fc911 100644 --- a/dts/Bindings/display/rockchip/dw_mipi_dsi_rockchip.txt +++ b/dts/Bindings/display/rockchip/dw_mipi_dsi_rockchip.txt @@ -14,6 +14,8 @@ Required properties: - rockchip,grf: this soc should set GRF regs to mux vopl/vopb. - ports: contain a port node with endpoint definitions as defined in [2]. For vopb,set the reg = <0> and set the reg = <1> for vopl. +- video port 0 for the VOP input, the remote endpoint maybe vopb or vopl +- video port 1 for either a panel or subsequent encoder Optional properties: - power-domains: a phandle to mipi dsi power domain node. @@ -40,11 +42,12 @@ Example: ports { #address-cells = <1>; #size-cells = <0>; - reg = <1>; - mipi_in: port { + mipi_in: port@0 { + reg = <0>; #address-cells = <1>; #size-cells = <0>; + mipi_in_vopb: endpoint@0 { reg = <0>; remote-endpoint = <&vopb_out_mipi>; @@ -54,6 +57,16 @@ Example: remote-endpoint = <&vopl_out_mipi>; }; }; + + mipi_out: port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + mipi_out_panel: endpoint { + remote-endpoint = <&panel_in_mipi>; + }; + }; }; panel { @@ -64,5 +77,11 @@ Example: pinctrl-names = "default"; pinctrl-0 = <&lcd_en>; backlight = <&backlight>; + + port { + panel_in_mipi: endpoint { + remote-endpoint = <&mipi_out_panel>; + }; + }; }; }; diff --git a/dts/Bindings/display/rockchip/rockchip-lvds.txt b/dts/Bindings/display/rockchip/rockchip-lvds.txt index da6939efdb..7849ff0392 100644 --- a/dts/Bindings/display/rockchip/rockchip-lvds.txt +++ b/dts/Bindings/display/rockchip/rockchip-lvds.txt @@ -32,17 +32,6 @@ Their connections are modeled using the OF graph bindings specified in - video port 0 for the VOP input, the remote endpoint maybe vopb or vopl - video port 1 for either a panel or subsequent encoder -the lvds panel described by - Documentation/devicetree/bindings/display/panel/simple-panel.txt - -Panel required properties: -- ports for remote LVDS output - -Panel optional properties: -- data-mapping: should be "vesa-24","jeida-24" or "jeida-18". -This describes decribed by: - Documentation/devicetree/bindings/display/panel/panel-lvds.txt - Example: lvds_panel: lvds-panel { diff --git a/dts/Bindings/display/ssd1307fb.txt b/dts/Bindings/display/ssd1307fb.txt index b67f8caa21..27333b9551 100644 --- a/dts/Bindings/display/ssd1307fb.txt +++ b/dts/Bindings/display/ssd1307fb.txt @@ -27,6 +27,15 @@ Optional properties: - solomon,prechargep2: Length of precharge period (phase 2) in clock cycles. This needs to be the higher, the higher the capacitance of the OLED's pixels is + - solomon,dclk-div: Clock divisor 1 to 16 + - solomon,dclk-frq: Clock frequency 0 to 15, higher value means higher + frequency + - solomon,lookup-table: 8 bit value array of current drive pulse widths for + BANK0, and colors A, B, and C. Each value in range + of 31 to 63 for pulse widths of 32 to 64. Color D + is always width 64. + - solomon,area-color-enable: Display uses color mode + - solomon,low-power. Display runs in low power mode [0]: Documentation/devicetree/bindings/pwm/pwm.txt @@ -46,4 +55,5 @@ ssd1306: oled@3c { solomon,com-lrremap; solomon,com-invdir; solomon,com-offset = <32>; + solomon,lookup-table = /bits/ 8 <0x3f 0x3f 0x3f 0x3f>; }; diff --git a/dts/Bindings/dma/allwinner,sun4i-a10-dma.yaml b/dts/Bindings/dma/allwinner,sun4i-a10-dma.yaml new file mode 100644 index 0000000000..15abc0f942 --- /dev/null +++ b/dts/Bindings/dma/allwinner,sun4i-a10-dma.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/allwinner,sun4i-a10-dma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner A10 DMA Controller Device Tree Bindings + +maintainers: + - Chen-Yu Tsai <wens@csie.org> + - Maxime Ripard <maxime.ripard@bootlin.com> + +allOf: + - $ref: "dma-controller.yaml#" + +properties: + "#dma-cells": + const: 2 + description: + The first cell is either 0 or 1, the former to use the normal + DMA, 1 for dedicated DMA. The second cell is the request line + number. + + compatible: + const: allwinner,sun4i-a10-dma + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - "#dma-cells" + - compatible + - reg + - interrupts + - clocks + +additionalProperties: false + +examples: + - | + dma: dma-controller@1c02000 { + compatible = "allwinner,sun4i-a10-dma"; + reg = <0x01c02000 0x1000>; + interrupts = <27>; + clocks = <&ahb_gates 6>; + #dma-cells = <2>; + }; + +... diff --git a/dts/Bindings/dma/allwinner,sun50i-a64-dma.yaml b/dts/Bindings/dma/allwinner,sun50i-a64-dma.yaml new file mode 100644 index 0000000000..4cb9d6b931 --- /dev/null +++ b/dts/Bindings/dma/allwinner,sun50i-a64-dma.yaml @@ -0,0 +1,88 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/allwinner,sun50i-a64-dma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner A64 DMA Controller Device Tree Bindings + +maintainers: + - Chen-Yu Tsai <wens@csie.org> + - Maxime Ripard <maxime.ripard@bootlin.com> + +allOf: + - $ref: "dma-controller.yaml#" + +properties: + "#dma-cells": + const: 1 + description: The cell is the request line number. + + compatible: + enum: + - allwinner,sun50i-a64-dma + - allwinner,sun50i-h6-dma + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 2 + + clock-names: + items: + - const: bus + - const: mbus + + resets: + maxItems: 1 + +required: + - "#dma-cells" + - compatible + - reg + - interrupts + - clocks + - resets + - dma-channels + +if: + properties: + compatible: + const: allwinner,sun50i-h6-dma + +then: + properties: + clocks: + maxItems: 2 + + required: + - clock-names + +else: + properties: + clocks: + maxItems: 1 + +# FIXME: We should set it, but it would report all the generic +# properties as additional properties. +# additionalProperties: false + +examples: + - | + dma: dma-controller@1c02000 { + compatible = "allwinner,sun50i-a64-dma"; + reg = <0x01c02000 0x1000>; + interrupts = <0 50 4>; + clocks = <&ccu 30>; + dma-channels = <8>; + dma-requests = <27>; + resets = <&ccu 7>; + #dma-cells = <1>; + }; + +... diff --git a/dts/Bindings/dma/allwinner,sun6i-a31-dma.yaml b/dts/Bindings/dma/allwinner,sun6i-a31-dma.yaml new file mode 100644 index 0000000000..740b7f9b53 --- /dev/null +++ b/dts/Bindings/dma/allwinner,sun6i-a31-dma.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/allwinner,sun6i-a31-dma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner A31 DMA Controller Device Tree Bindings + +maintainers: + - Chen-Yu Tsai <wens@csie.org> + - Maxime Ripard <maxime.ripard@bootlin.com> + +allOf: + - $ref: "dma-controller.yaml#" + +properties: + "#dma-cells": + const: 1 + description: The cell is the request line number. + + compatible: + oneOf: + - const: allwinner,sun6i-a31-dma + - const: allwinner,sun8i-a23-dma + - const: allwinner,sun8i-a83t-dma + - const: allwinner,sun8i-h3-dma + - const: allwinner,sun8i-v3s-dma + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + resets: + maxItems: 1 + +required: + - "#dma-cells" + - compatible + - reg + - interrupts + - clocks + - resets + +additionalProperties: false + +examples: + - | + dma: dma-controller@1c02000 { + compatible = "allwinner,sun6i-a31-dma"; + reg = <0x01c02000 0x1000>; + interrupts = <0 50 4>; + clocks = <&ahb1_gates 6>; + resets = <&ahb1_rst 6>; + #dma-cells = <1>; + }; + +... diff --git a/dts/Bindings/dma/dma-common.yaml b/dts/Bindings/dma/dma-common.yaml new file mode 100644 index 0000000000..ed0a49a6f0 --- /dev/null +++ b/dts/Bindings/dma/dma-common.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/dma-common.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: DMA Engine Generic Binding + +maintainers: + - Vinod Koul <vkoul@kernel.org> + +description: + Generic binding to provide a way for a driver using DMA Engine to + retrieve the DMA request or channel information that goes from a + hardware device to a DMA controller. + +select: false + +properties: + "#dma-cells": + minimum: 1 + # Should be enough + maximum: 255 + description: + Used to provide DMA controller specific information. + + dma-channel-mask: + $ref: /schemas/types.yaml#definitions/uint32 + description: + Bitmask of available DMA channels in ascending order that are + not reserved by firmware and are available to the + kernel. i.e. first channel corresponds to LSB. + + dma-channels: + $ref: /schemas/types.yaml#definitions/uint32 + description: + Number of DMA channels supported by the controller. + + dma-requests: + $ref: /schemas/types.yaml#definitions/uint32 + description: + Number of DMA request signals supported by the controller. + +required: + - "#dma-cells" diff --git a/dts/Bindings/dma/dma-controller.yaml b/dts/Bindings/dma/dma-controller.yaml new file mode 100644 index 0000000000..c39f6de766 --- /dev/null +++ b/dts/Bindings/dma/dma-controller.yaml @@ -0,0 +1,35 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/dma-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: DMA Controller Generic Binding + +maintainers: + - Vinod Koul <vkoul@kernel.org> + +allOf: + - $ref: "dma-common.yaml#" + +# Everything else is described in the common file +properties: + $nodename: + pattern: "^dma-controller(@.*)?$" + +examples: + - | + dma: dma-controller@48000000 { + compatible = "ti,omap-sdma"; + reg = <0x48000000 0x1000>; + interrupts = <0 12 0x4 + 0 13 0x4 + 0 14 0x4 + 0 15 0x4>; + #dma-cells = <1>; + dma-channels = <32>; + dma-requests = <127>; + dma-channel-mask = <0xfffe>; + }; + +... diff --git a/dts/Bindings/dma/dma-router.yaml b/dts/Bindings/dma/dma-router.yaml new file mode 100644 index 0000000000..5b5f073931 --- /dev/null +++ b/dts/Bindings/dma/dma-router.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/dma-router.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: DMA Router Generic Binding + +maintainers: + - Vinod Koul <vkoul@kernel.org> + +allOf: + - $ref: "dma-common.yaml#" + +description: + DMA routers are transparent IP blocks used to route DMA request + lines from devices to the DMA controller. Some SoCs (like TI DRA7x) + have more peripherals integrated with DMA requests than what the DMA + controller can handle directly. + +properties: + $nodename: + pattern: "^dma-router(@.*)?$" + + dma-masters: + $ref: /schemas/types.yaml#definitions/phandle-array + description: + Array of phandles to the DMA controllers the router can direct + the signal to. + + dma-requests: + description: + Number of incoming request lines the router can handle. + +required: + - "#dma-cells" + - dma-masters + +examples: + - | + sdma_xbar: dma-router@4a002b78 { + compatible = "ti,dra7-dma-crossbar"; + reg = <0x4a002b78 0xfc>; + #dma-cells = <1>; + dma-requests = <205>; + ti,dma-safe-map = <0>; + dma-masters = <&sdma>; + }; + +... diff --git a/dts/Bindings/dma/dma.txt b/dts/Bindings/dma/dma.txt index eeb4e4d177..90a67a016a 100644 --- a/dts/Bindings/dma/dma.txt +++ b/dts/Bindings/dma/dma.txt @@ -1,113 +1 @@ -* Generic DMA Controller and DMA request bindings - -Generic binding to provide a way for a driver using DMA Engine to retrieve the -DMA request or channel information that goes from a hardware device to a DMA -controller. - - -* DMA controller - -Required property: -- #dma-cells: Must be at least 1. Used to provide DMA controller - specific information. See DMA client binding below for - more details. - -Optional properties: -- dma-channels: Number of DMA channels supported by the controller. -- dma-requests: Number of DMA request signals supported by the - controller. -- dma-channel-mask: Bitmask of available DMA channels in ascending order - that are not reserved by firmware and are available to - the kernel. i.e. first channel corresponds to LSB. - -Example: - - dma: dma@48000000 { - compatible = "ti,omap-sdma"; - reg = <0x48000000 0x1000>; - interrupts = <0 12 0x4 - 0 13 0x4 - 0 14 0x4 - 0 15 0x4>; - #dma-cells = <1>; - dma-channels = <32>; - dma-requests = <127>; - dma-channel-mask = <0xfffe> - }; - -* DMA router - -DMA routers are transparent IP blocks used to route DMA request lines from -devices to the DMA controller. Some SoCs (like TI DRA7x) have more peripherals -integrated with DMA requests than what the DMA controller can handle directly. - -Required property: -- dma-masters: phandle of the DMA controller or list of phandles for - the DMA controllers the router can direct the signal to. -- #dma-cells: Must be at least 1. Used to provide DMA router specific - information. See DMA client binding below for more - details. - -Optional properties: -- dma-requests: Number of incoming request lines the router can handle. -- In the node pointed by the dma-masters: - - dma-requests: The router driver might need to look for this in order - to configure the routing. - -Example: - sdma_xbar: dma-router@4a002b78 { - compatible = "ti,dra7-dma-crossbar"; - reg = <0x4a002b78 0xfc>; - #dma-cells = <1>; - dma-requests = <205>; - ti,dma-safe-map = <0>; - dma-masters = <&sdma>; - }; - -* DMA client - -Client drivers should specify the DMA property using a phandle to the controller -followed by DMA controller specific data. - -Required property: -- dmas: List of one or more DMA specifiers, each consisting of - - A phandle pointing to DMA controller node - - A number of integer cells, as determined by the - #dma-cells property in the node referenced by phandle - containing DMA controller specific information. This - typically contains a DMA request line number or a - channel number, but can contain any data that is - required for configuring a channel. -- dma-names: Contains one identifier string for each DMA specifier in - the dmas property. The specific strings that can be used - are defined in the binding of the DMA client device. - Multiple DMA specifiers can be used to represent - alternatives and in this case the dma-names for those - DMA specifiers must be identical (see examples). - -Examples: - -1. A device with one DMA read channel, one DMA write channel: - - i2c1: i2c@1 { - ... - dmas = <&dma 2 /* read channel */ - &dma 3>; /* write channel */ - dma-names = "rx", "tx"; - ... - }; - -2. A single read-write channel with three alternative DMA controllers: - - dmas = <&dma1 5 - &dma2 7 - &dma3 2>; - dma-names = "rx-tx", "rx-tx", "rx-tx"; - -3. A device with three channels, one of which has two alternatives: - - dmas = <&dma1 2 /* read channel */ - &dma1 3 /* write channel */ - &dma2 0 /* error read */ - &dma3 0>; /* alternative error read */ - dma-names = "rx", "tx", "error", "error"; +This file has been moved to dma-controller.yaml. diff --git a/dts/Bindings/dma/nbpfaxi.txt b/dts/Bindings/dma/renesas,nbpfaxi.txt index d2e1e62e34..d2e1e62e34 100644 --- a/dts/Bindings/dma/nbpfaxi.txt +++ b/dts/Bindings/dma/renesas,nbpfaxi.txt diff --git a/dts/Bindings/dma/shdma.txt b/dts/Bindings/dma/renesas,shdma.txt index a91920a494..a91920a494 100644 --- a/dts/Bindings/dma/shdma.txt +++ b/dts/Bindings/dma/renesas,shdma.txt diff --git a/dts/Bindings/dma/sun4i-dma.txt b/dts/Bindings/dma/sun4i-dma.txt deleted file mode 100644 index 8ad556aca7..0000000000 --- a/dts/Bindings/dma/sun4i-dma.txt +++ /dev/null @@ -1,45 +0,0 @@ -Allwinner A10 DMA Controller - -This driver follows the generic DMA bindings defined in dma.txt. - -Required properties: - -- compatible: Must be "allwinner,sun4i-a10-dma" -- reg: Should contain the registers base address and length -- interrupts: Should contain a reference to the interrupt used by this device -- clocks: Should contain a reference to the parent AHB clock -- #dma-cells : Should be 2, first cell denoting normal or dedicated dma, - second cell holding the request line number. - -Example: - dma: dma-controller@1c02000 { - compatible = "allwinner,sun4i-a10-dma"; - reg = <0x01c02000 0x1000>; - interrupts = <27>; - clocks = <&ahb_gates 6>; - #dma-cells = <2>; - }; - -Clients: - -DMA clients connected to the Allwinner A10 DMA controller must use the -format described in the dma.txt file, using a three-cell specifier for -each channel: a phandle plus two integer cells. -The three cells in order are: - -1. A phandle pointing to the DMA controller. -2. Whether it is using normal (0) or dedicated (1) channels -3. The port ID as specified in the datasheet - -Example: - spi2: spi@1c17000 { - compatible = "allwinner,sun4i-a10-spi"; - reg = <0x01c17000 0x1000>; - interrupts = <0 12 4>; - clocks = <&ahb_gates 22>, <&spi2_clk>; - clock-names = "ahb", "mod"; - dmas = <&dma 1 29>, <&dma 1 28>; - dma-names = "rx", "tx"; - #address-cells = <1>; - #size-cells = <0>; - }; diff --git a/dts/Bindings/dma/sun6i-dma.txt b/dts/Bindings/dma/sun6i-dma.txt deleted file mode 100644 index cae31f4e77..0000000000 --- a/dts/Bindings/dma/sun6i-dma.txt +++ /dev/null @@ -1,81 +0,0 @@ -Allwinner A31 DMA Controller - -This driver follows the generic DMA bindings defined in dma.txt. - -Required properties: - -- compatible: Must be one of - "allwinner,sun6i-a31-dma" - "allwinner,sun8i-a23-dma" - "allwinner,sun8i-a83t-dma" - "allwinner,sun8i-h3-dma" - "allwinner,sun8i-v3s-dma" -- reg: Should contain the registers base address and length -- interrupts: Should contain a reference to the interrupt used by this device -- clocks: Should contain a reference to the parent AHB clock -- resets: Should contain a reference to the reset controller asserting - this device in reset -- #dma-cells : Should be 1, a single cell holding a line request number - -Example: - dma: dma-controller@1c02000 { - compatible = "allwinner,sun6i-a31-dma"; - reg = <0x01c02000 0x1000>; - interrupts = <0 50 4>; - clocks = <&ahb1_gates 6>; - resets = <&ahb1_rst 6>; - #dma-cells = <1>; - }; - ------------------------------------------------------------------------------- -For A64 and H6 DMA controller: - -Required properties: -- compatible: Must be one of - "allwinner,sun50i-a64-dma" - "allwinner,sun50i-h6-dma" -- dma-channels: Number of DMA channels supported by the controller. - Refer to Documentation/devicetree/bindings/dma/dma.txt -- clocks: In addition to parent AHB clock, it should also contain mbus - clock (H6 only) -- clock-names: Should contain "bus" and "mbus" (H6 only) -- all properties above, i.e. reg, interrupts, clocks, resets and #dma-cells - -Optional properties: -- dma-requests: Number of DMA request signals supported by the controller. - Refer to Documentation/devicetree/bindings/dma/dma.txt - -Example: - dma: dma-controller@1c02000 { - compatible = "allwinner,sun50i-a64-dma"; - reg = <0x01c02000 0x1000>; - interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ccu CLK_BUS_DMA>; - dma-channels = <8>; - dma-requests = <27>; - resets = <&ccu RST_BUS_DMA>; - #dma-cells = <1>; - }; ------------------------------------------------------------------------------- - -Clients: - -DMA clients connected to the A31 DMA controller must use the format -described in the dma.txt file, using a two-cell specifier for each -channel: a phandle plus one integer cells. -The two cells in order are: - -1. A phandle pointing to the DMA controller. -2. The port ID as specified in the datasheet - -Example: -spi2: spi@1c6a000 { - compatible = "allwinner,sun6i-a31-spi"; - reg = <0x01c6a000 0x1000>; - interrupts = <0 67 4>; - clocks = <&ahb1_gates 22>, <&spi2_clk>; - clock-names = "ahb", "mod"; - dmas = <&dma 25>, <&dma 25>; - dma-names = "rx", "tx"; - resets = <&ahb1_rst 22>; -}; diff --git a/dts/Bindings/dsp/fsl,dsp.yaml b/dts/Bindings/dsp/fsl,dsp.yaml new file mode 100644 index 0000000000..3248595dc9 --- /dev/null +++ b/dts/Bindings/dsp/fsl,dsp.yaml @@ -0,0 +1,88 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dsp/fsl,dsp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX8 DSP core + +maintainers: + - Daniel Baluta <daniel.baluta@nxp.com> + +description: | + Some boards from i.MX8 family contain a DSP core used for + advanced pre- and post- audio processing. + +properties: + compatible: + enum: + - fsl,imx8qxp-dsp + + reg: + description: Should contain register location and length + + clocks: + items: + - description: ipg clock + - description: ocram clock + - description: core clock + + clock-names: + items: + - const: ipg + - const: ocram + - const: core + + power-domains: + description: + List of phandle and PM domain specifier as documented in + Documentation/devicetree/bindings/power/power_domain.txt + maxItems: 4 + + mboxes: + description: + List of <&phandle type channel> - 2 channels for TXDB, 2 channels for RXDB + (see mailbox/fsl,mu.txt) + maxItems: 4 + + mbox-names: + items: + - const: txdb0 + - const: txdb1 + - const: rxdb0 + - const: rxdb1 + + memory-region: + description: + phandle to a node describing reserved memory (System RAM memory) + used by DSP (see bindings/reserved-memory/reserved-memory.txt) + maxItems: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - power-domains + - mboxes + - mbox-names + - memory-region + +examples: + - | + #include <dt-bindings/firmware/imx/rsrc.h> + #include <dt-bindings/clock/imx8-clock.h> + dsp@596e8000 { + compatible = "fsl,imx8qxp-dsp"; + reg = <0x596e8000 0x88000>; + clocks = <&adma_lpcg IMX_ADMA_LPCG_DSP_IPG_CLK>, + <&adma_lpcg IMX_ADMA_LPCG_OCRAM_IPG_CLK>, + <&adma_lpcg IMX_ADMA_LPCG_DSP_CORE_CLK>; + clock-names = "ipg", "ocram", "core"; + power-domains = <&pd IMX_SC_R_MU_13A>, + <&pd IMX_SC_R_MU_13B>, + <&pd IMX_SC_R_DSP>, + <&pd IMX_SC_R_DSP_RAM>; + mbox-names = "txdb0", "txdb1", "rxdb0", "rxdb1"; + mboxes = <&lsio_mu13 2 0>, <&lsio_mu13 2 1>, <&lsio_mu13 3 0>, <&lsio_mu13 3 1>; + }; diff --git a/dts/Bindings/eeprom/at25.txt b/dts/Bindings/eeprom/at25.txt index b3bde97dc1..42577dd113 100644 --- a/dts/Bindings/eeprom/at25.txt +++ b/dts/Bindings/eeprom/at25.txt @@ -3,6 +3,7 @@ EEPROMs (SPI) compatible with Atmel at25. Required properties: - compatible : Should be "<vendor>,<type>", and generic value "atmel,at25". Example "<vendor>,<type>" values: + "anvo,anv32e61w" "microchip,25lc040" "st,m95m02" "st,m95256" diff --git a/dts/Bindings/example-schema.yaml b/dts/Bindings/example-schema.yaml index 9175d67f35..c43819c278 100644 --- a/dts/Bindings/example-schema.yaml +++ b/dts/Bindings/example-schema.yaml @@ -5,7 +5,7 @@ # All the top-level keys are standard json-schema keywords except for # 'maintainers' and 'select' -# $id is a unique idenifier based on the filename. There may or may not be a +# $id is a unique identifier based on the filename. There may or may not be a # file present at the URL. $id: "http://devicetree.org/schemas/example-schema.yaml#" # $schema is the meta-schema this schema should be validated with. diff --git a/dts/Bindings/extcon/extcon-arizona.txt b/dts/Bindings/extcon/extcon-arizona.txt index 7f3d94ae81..208daaff0b 100644 --- a/dts/Bindings/extcon/extcon-arizona.txt +++ b/dts/Bindings/extcon/extcon-arizona.txt @@ -72,5 +72,5 @@ codec: wm8280@0 { 1 2 1 /* MICDET2 MICBIAS2 GPIO=high */ >; - wlf,gpsw = <0>; + wlf,gpsw = <ARIZONA_GPSW_OPEN>; }; diff --git a/dts/Bindings/extcon/extcon-fsa9480.txt b/dts/Bindings/extcon/extcon-fsa9480.txt index d592c21245..624bd76f46 100644 --- a/dts/Bindings/extcon/extcon-fsa9480.txt +++ b/dts/Bindings/extcon/extcon-fsa9480.txt @@ -5,7 +5,9 @@ controlled using I2C and enables USB data, stereo and mono audio, video, microphone, and UART data to use a common connector port. Required properties: - - compatible : Must be "fcs,fsa9480" + - compatible : Must be one of + "fcs,fsa9480" + "fcs,fsa880" - reg : Specifies i2c slave address. Must be 0x25. - interrupts : Should contain one entry specifying interrupt signal of interrupt parent to which interrupt pin of the chip is connected. diff --git a/dts/Bindings/fieldbus/arcx,anybus-controller.txt b/dts/Bindings/fieldbus/arcx,anybus-controller.txt deleted file mode 100644 index b1f9474f36..0000000000 --- a/dts/Bindings/fieldbus/arcx,anybus-controller.txt +++ /dev/null @@ -1,71 +0,0 @@ -* Arcx Anybus-S controller - -This chip communicates with the SoC over a parallel bus. It is -expected that its Device Tree node is specified as the child of a node -corresponding to the parallel bus used for communication. - -Required properties: --------------------- - - - compatible : The following chip-specific string: - "arcx,anybus-controller" - - - reg : three areas: - index 0: bus memory area where the cpld registers are located. - index 1: bus memory area of the first host's dual-port ram. - index 2: bus memory area of the second host's dual-port ram. - - - reset-gpios : the GPIO pin connected to the reset line of the controller. - - - interrupts : two interrupts: - index 0: interrupt connected to the first host - index 1: interrupt connected to the second host - Generic interrupt client node bindings are described in - interrupt-controller/interrupts.txt - -Optional: use of subnodes -------------------------- - -The card connected to a host may need additional properties. These can be -specified in subnodes to the controller node. - -The subnodes are identified by the standard 'reg' property. Which information -exactly can be specified depends on the bindings for the function driver -for the subnode. - -Required controller node properties when using subnodes: -- #address-cells: should be one. -- #size-cells: should be zero. - -Required subnode properties: -- reg: Must contain the host index of the card this subnode describes: - <0> for the first host on the controller - <1> for the second host on the controller - Note that only a single card can be plugged into a host, so the host - index uniquely describes the card location. - -Example of usage: ------------------ - -This example places the bridge on top of the i.MX WEIM parallel bus, see: -Documentation/devicetree/bindings/bus/imx-weim.txt - -&weim { - controller@0,0 { - compatible = "arcx,anybus-controller"; - reg = <0 0 0x100>, <0 0x400000 0x800>, <1 0x400000 0x800>; - reset-gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; - interrupt-parent = <&gpio1>; - interrupts = <1 IRQ_TYPE_LEVEL_LOW>, <5 IRQ_TYPE_LEVEL_LOW>; - /* fsl,weim-cs-timing is a i.MX WEIM bus specific property */ - fsl,weim-cs-timing = <0x024400b1 0x00001010 0x20081100 - 0x00000000 0xa0000240 0x00000000>; - /* optional subnode for a card plugged into the first host */ - #address-cells = <1>; - #size-cells = <0>; - card@0 { - reg = <0>; - /* card specific properties go here */ - }; - }; -}; diff --git a/dts/Bindings/firmware/cznic,turris-mox-rwtm.txt b/dts/Bindings/firmware/cznic,turris-mox-rwtm.txt new file mode 100644 index 0000000000..338169dea7 --- /dev/null +++ b/dts/Bindings/firmware/cznic,turris-mox-rwtm.txt @@ -0,0 +1,19 @@ +Turris Mox rWTM firmware driver + +Required properties: + - compatible : Should be "cznic,turris-mox-rwtm" + - mboxes : Must contain a reference to associated mailbox + +This device tree node should be used on Turris Mox, or potentially another A3700 +compatible device running the Mox's rWTM firmware in the secure processor (for +example it is possible to flash this firmware into EspressoBin). + +Example: + + firmware { + turris-mox-rwtm { + compatible = "cznic,turris-mox-rwtm"; + mboxes = <&rwtm 0>; + status = "okay"; + }; + }; diff --git a/dts/Bindings/firmware/qcom,scm.txt b/dts/Bindings/firmware/qcom,scm.txt index 41f133a4e2..3f29ea04b5 100644 --- a/dts/Bindings/firmware/qcom,scm.txt +++ b/dts/Bindings/firmware/qcom,scm.txt @@ -9,14 +9,16 @@ Required properties: - compatible: must contain one of the following: * "qcom,scm-apq8064" * "qcom,scm-apq8084" + * "qcom,scm-ipq4019" * "qcom,scm-msm8660" * "qcom,scm-msm8916" * "qcom,scm-msm8960" * "qcom,scm-msm8974" * "qcom,scm-msm8996" * "qcom,scm-msm8998" - * "qcom,scm-ipq4019" + * "qcom,scm-sc7180" * "qcom,scm-sdm845" + * "qcom,scm-sm8150" and: * "qcom,scm" - clocks: Specifies clocks needed by the SCM interface, if any: diff --git a/dts/Bindings/fpga/altera-fpga2sdram-bridge.txt b/dts/Bindings/fpga/altera-fpga2sdram-bridge.txt index 817a8d4bf9..5dd0ff0f7b 100644 --- a/dts/Bindings/fpga/altera-fpga2sdram-bridge.txt +++ b/dts/Bindings/fpga/altera-fpga2sdram-bridge.txt @@ -3,10 +3,7 @@ Altera FPGA To SDRAM Bridge Driver Required properties: - compatible : Should contain "altr,socfpga-fpga2sdram-bridge" -Optional properties: -- bridge-enable : 0 if driver should disable bridge at startup - 1 if driver should enable bridge at startup - Default is to leave bridge in current state. +See Documentation/devicetree/bindings/fpga/fpga-bridge.txt for generic bindings. Example: fpga_bridge3: fpga-bridge@ffc25080 { diff --git a/dts/Bindings/fpga/altera-freeze-bridge.txt b/dts/Bindings/fpga/altera-freeze-bridge.txt index f8e288c71b..8b26fbcff3 100644 --- a/dts/Bindings/fpga/altera-freeze-bridge.txt +++ b/dts/Bindings/fpga/altera-freeze-bridge.txt @@ -10,10 +10,7 @@ Required properties: - compatible : Should contain "altr,freeze-bridge-controller" - regs : base address and size for freeze bridge module -Optional properties: -- bridge-enable : 0 if driver should disable bridge at startup - 1 if driver should enable bridge at startup - Default is to leave bridge in current state. +See Documentation/devicetree/bindings/fpga/fpga-bridge.txt for generic bindings. Example: freeze-controller@100000450 { diff --git a/dts/Bindings/fpga/altera-hps2fpga-bridge.txt b/dts/Bindings/fpga/altera-hps2fpga-bridge.txt index 6406f9337e..68cce3945b 100644 --- a/dts/Bindings/fpga/altera-hps2fpga-bridge.txt +++ b/dts/Bindings/fpga/altera-hps2fpga-bridge.txt @@ -9,10 +9,7 @@ Required properties: - resets : Phandle and reset specifier for this bridge's reset - clocks : Clocks used by this module. -Optional properties: -- bridge-enable : 0 if driver should disable bridge at startup. - 1 if driver should enable bridge at startup. - Default is to leave bridge in its current state. +See Documentation/devicetree/bindings/fpga/fpga-bridge.txt for generic bindings. Example: fpga_bridge0: fpga-bridge@ff400000 { diff --git a/dts/Bindings/fpga/fpga-bridge.txt b/dts/Bindings/fpga/fpga-bridge.txt new file mode 100644 index 0000000000..72e0691728 --- /dev/null +++ b/dts/Bindings/fpga/fpga-bridge.txt @@ -0,0 +1,13 @@ +FPGA Bridge Device Tree Binding + +Optional properties: +- bridge-enable : 0 if driver should disable bridge at startup + 1 if driver should enable bridge at startup + Default is to leave bridge in current state. + +Example: + fpga_bridge3: fpga-bridge@ffc25080 { + compatible = "altr,socfpga-fpga2sdram-bridge"; + reg = <0xffc25080 0x4>; + bridge-enable = <0>; + }; diff --git a/dts/Bindings/fpga/xilinx-pr-decoupler.txt b/dts/Bindings/fpga/xilinx-pr-decoupler.txt index 8dcfba926b..4284d293fa 100644 --- a/dts/Bindings/fpga/xilinx-pr-decoupler.txt +++ b/dts/Bindings/fpga/xilinx-pr-decoupler.txt @@ -18,12 +18,8 @@ Required properties: - clocks : input clock to IP - clock-names : should contain "aclk" -Optional properties: -- bridge-enable : 0 if driver should disable bridge at startup - 1 if driver should enable bridge at startup - Default is to leave bridge in current state. - -See Documentation/devicetree/bindings/fpga/fpga-region.txt for generic bindings. +See Documentation/devicetree/bindings/fpga/fpga-region.txt and +Documentation/devicetree/bindings/fpga/fpga-bridge.txt for generic bindings. Example: fpga-bridge@100000450 { diff --git a/dts/Bindings/gpio/gpio-aspeed.txt b/dts/Bindings/gpio/gpio-aspeed.txt index 7e9b586770..b2033fc3a7 100644 --- a/dts/Bindings/gpio/gpio-aspeed.txt +++ b/dts/Bindings/gpio/gpio-aspeed.txt @@ -2,7 +2,8 @@ Aspeed GPIO controller Device Tree Bindings ------------------------------------------- Required properties: -- compatible : Either "aspeed,ast2400-gpio" or "aspeed,ast2500-gpio" +- compatible : Either "aspeed,ast2400-gpio", "aspeed,ast2500-gpio", + or "aspeed,ast2600-gpio". - #gpio-cells : Should be two - First cell is the GPIO line number @@ -17,7 +18,9 @@ Required properties: Optional properties: -- clocks : A phandle to the clock to use for debounce timings +- clocks : A phandle to the clock to use for debounce timings +- ngpios : Number of GPIOs controlled by this controller. Should be set + when there are multiple GPIO controllers on a SoC (ast2600). The gpio and interrupt properties are further described in their respective bindings documentation: diff --git a/dts/Bindings/gpio/gpio-davinci.txt b/dts/Bindings/gpio/gpio-davinci.txt index bc6b4b62df..cd91d61eac 100644 --- a/dts/Bindings/gpio/gpio-davinci.txt +++ b/dts/Bindings/gpio/gpio-davinci.txt @@ -6,6 +6,7 @@ Required Properties: 66AK2E SoCs "ti,k2g-gpio", "ti,keystone-gpio": for 66AK2G "ti,am654-gpio", "ti,keystone-gpio": for TI K3 AM654 + "ti,j721e-gpio", "ti,keystone-gpio": for J721E SoCs - reg: Physical base address of the controller and the size of memory mapped registers. diff --git a/dts/Bindings/gpio/gpio-moxtet.txt b/dts/Bindings/gpio/gpio-moxtet.txt new file mode 100644 index 0000000000..410759de9f --- /dev/null +++ b/dts/Bindings/gpio/gpio-moxtet.txt @@ -0,0 +1,18 @@ +Turris Mox Moxtet GPIO expander via Moxtet bus + +Required properties: + - compatible : Should be "cznic,moxtet-gpio". + - gpio-controller : Marks the device node as a GPIO controller. + - #gpio-cells : Should be two. For consumer use see gpio.txt. + +Other properties are required for a Moxtet bus device, please refer to +Documentation/devicetree/bindings/bus/moxtet.txt. + +Example: + + moxtet_sfp: gpio@0 { + compatible = "cznic,moxtet-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0>; + } diff --git a/dts/Bindings/gpio/gpio-mpc8xxx.txt b/dts/Bindings/gpio/gpio-mpc8xxx.txt index 69d46162d0..cd28e932bf 100644 --- a/dts/Bindings/gpio/gpio-mpc8xxx.txt +++ b/dts/Bindings/gpio/gpio-mpc8xxx.txt @@ -4,7 +4,7 @@ Required properties: - compatible : Should be "fsl,<soc>-gpio" The following <soc>s are known to be supported: mpc5121, mpc5125, mpc8349, mpc8572, mpc8610, pq3, qoriq, - ls1021a, ls1043a, ls2080a. + ls1021a, ls1043a, ls2080a, ls1028a, ls1088a. - reg : Address and length of the register set for the device - interrupts : Should be the port interrupt shared by all 32 pins. - #gpio-cells : Should be two. The first cell is the pin number and @@ -37,3 +37,17 @@ gpio0: gpio@2300000 { interrupt-controller; #interrupt-cells = <2>; }; + + +Example of gpio-controller node for a ls1028a/ls1088a SoC: + +gpio1: gpio@2300000 { + compatible = "fsl,ls1028a-gpio", "fsl,ls1088a-gpio", "fsl,qoriq-gpio"; + reg = <0x0 0x2300000 0x0 0x10000>; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + little-endian; +}; diff --git a/dts/Bindings/gpio/sgpio-aspeed.txt b/dts/Bindings/gpio/sgpio-aspeed.txt new file mode 100644 index 0000000000..d4d83916c0 --- /dev/null +++ b/dts/Bindings/gpio/sgpio-aspeed.txt @@ -0,0 +1,45 @@ +Aspeed SGPIO controller Device Tree Bindings +-------------------------------------------- + +This SGPIO controller is for ASPEED AST2500 SoC, it supports up to 80 full +featured Serial GPIOs. Each of the Serial GPIO pins can be programmed to +support the following options: +- Support interrupt option for each input port and various interrupt + sensitivity option (level-high, level-low, edge-high, edge-low) +- Support reset tolerance option for each output port +- Directly connected to APB bus and its shift clock is from APB bus clock + divided by a programmable value. +- Co-work with external signal-chained TTL components (74LV165/74LV595) + +Required properties: + +- compatible : Should be one of + "aspeed,ast2400-sgpio", "aspeed,ast2500-sgpio" +- #gpio-cells : Should be 2, see gpio.txt +- reg : Address and length of the register set for the device +- gpio-controller : Marks the device node as a GPIO controller +- interrupts : Interrupt specifier, see interrupt-controller/interrupts.txt +- interrupt-controller : Mark the GPIO controller as an interrupt-controller +- ngpios : number of GPIO lines, see gpio.txt + (should be multiple of 8, up to 80 pins) +- clocks : A phandle to the APB clock for SGPM clock division +- bus-frequency : SGPM CLK frequency + +The sgpio and interrupt properties are further described in their respective +bindings documentation: + +- Documentation/devicetree/bindings/gpio/gpio.txt +- Documentation/devicetree/bindings/interrupt-controller/interrupts.txt + + Example: + sgpio: sgpio@1e780200 { + #gpio-cells = <2>; + compatible = "aspeed,ast2500-sgpio"; + gpio-controller; + interrupts = <40>; + reg = <0x1e780200 0x0100>; + clocks = <&syscon ASPEED_CLK_APB>; + interrupt-controller; + ngpios = <8>; + bus-frequency = <12000000>; + }; diff --git a/dts/Bindings/gpu/arm,mali-bifrost.txt b/dts/Bindings/gpu/arm,mali-bifrost.txt deleted file mode 100644 index b8be9dbc68..0000000000 --- a/dts/Bindings/gpu/arm,mali-bifrost.txt +++ /dev/null @@ -1,92 +0,0 @@ -ARM Mali Bifrost GPU -==================== - -Required properties: - -- compatible : - * Since Mali Bifrost GPU model/revision is fully discoverable by reading - some determined registers, must contain the following: - + "arm,mali-bifrost" - * which must be preceded by one of the following vendor specifics: - + "amlogic,meson-g12a-mali" - -- reg : Physical base address of the device and length of the register area. - -- interrupts : Contains the three IRQ lines required by Mali Bifrost devices, - in the following defined order. - -- interrupt-names : Contains the names of IRQ resources in this exact defined - order: "job", "mmu", "gpu". - -Optional properties: - -- clocks : Phandle to clock for the Mali Bifrost device. - -- mali-supply : Phandle to regulator for the Mali device. Refer to - Documentation/devicetree/bindings/regulator/regulator.txt for details. - -- operating-points-v2 : Refer to Documentation/devicetree/bindings/opp/opp.txt - for details. - -- resets : Phandle of the GPU reset line. - -Vendor-specific bindings ------------------------- - -The Mali GPU is integrated very differently from one SoC to -another. In order to accommodate those differences, you have the option -to specify one more vendor-specific compatible, among: - -- "amlogic,meson-g12a-mali" - Required properties: - - resets : Should contain phandles of : - + GPU reset line - + GPU APB glue reset line - -Example for a Mali-G31: - -gpu@ffa30000 { - compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost"; - reg = <0xffe40000 0x10000>; - interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "job", "mmu", "gpu"; - clocks = <&clk CLKID_MALI>; - mali-supply = <&vdd_gpu>; - operating-points-v2 = <&gpu_opp_table>; - resets = <&reset RESET_DVALIN_CAPB3>, <&reset RESET_DVALIN>; -}; - -gpu_opp_table: opp_table0 { - compatible = "operating-points-v2"; - - opp@533000000 { - opp-hz = /bits/ 64 <533000000>; - opp-microvolt = <1250000>; - }; - opp@450000000 { - opp-hz = /bits/ 64 <450000000>; - opp-microvolt = <1150000>; - }; - opp@400000000 { - opp-hz = /bits/ 64 <400000000>; - opp-microvolt = <1125000>; - }; - opp@350000000 { - opp-hz = /bits/ 64 <350000000>; - opp-microvolt = <1075000>; - }; - opp@266000000 { - opp-hz = /bits/ 64 <266000000>; - opp-microvolt = <1025000>; - }; - opp@160000000 { - opp-hz = /bits/ 64 <160000000>; - opp-microvolt = <925000>; - }; - opp@100000000 { - opp-hz = /bits/ 64 <100000000>; - opp-microvolt = <912500>; - }; -}; diff --git a/dts/Bindings/gpu/arm,mali-bifrost.yaml b/dts/Bindings/gpu/arm,mali-bifrost.yaml new file mode 100644 index 0000000000..5f1fd6d7ee --- /dev/null +++ b/dts/Bindings/gpu/arm,mali-bifrost.yaml @@ -0,0 +1,116 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpu/arm,mali-bifrost.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARM Mali Bifrost GPU + +maintainers: + - Rob Herring <robh@kernel.org> + +properties: + $nodename: + pattern: '^gpu@[a-f0-9]+$' + + compatible: + items: + - enum: + - amlogic,meson-g12a-mali + - const: arm,mali-bifrost # Mali Bifrost GPU model/revision is fully discoverable + + reg: + maxItems: 1 + + interrupts: + items: + - description: Job interrupt + - description: MMU interrupt + - description: GPU interrupt + + interrupt-names: + items: + - const: job + - const: mmu + - const: gpu + + clocks: + maxItems: 1 + + mali-supply: + maxItems: 1 + + operating-points-v2: true + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + +allOf: + - if: + properties: + compatible: + contains: + const: amlogic,meson-g12a-mali + then: + properties: + resets: + minItems: 2 + required: + - resets + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + gpu@ffe40000 { + compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost"; + reg = <0xffe40000 0x10000>; + interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "job", "mmu", "gpu"; + clocks = <&clk 1>; + mali-supply = <&vdd_gpu>; + operating-points-v2 = <&gpu_opp_table>; + resets = <&reset 0>, <&reset 1>; + }; + + gpu_opp_table: opp_table0 { + compatible = "operating-points-v2"; + + opp@533000000 { + opp-hz = /bits/ 64 <533000000>; + opp-microvolt = <1250000>; + }; + opp@450000000 { + opp-hz = /bits/ 64 <450000000>; + opp-microvolt = <1150000>; + }; + opp@400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <1125000>; + }; + opp@350000000 { + opp-hz = /bits/ 64 <350000000>; + opp-microvolt = <1075000>; + }; + opp@266000000 { + opp-hz = /bits/ 64 <266000000>; + opp-microvolt = <1025000>; + }; + opp@160000000 { + opp-hz = /bits/ 64 <160000000>; + opp-microvolt = <925000>; + }; + opp@100000000 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <912500>; + }; + }; + +... diff --git a/dts/Bindings/gpu/arm,mali-midgard.txt b/dts/Bindings/gpu/arm,mali-midgard.txt deleted file mode 100644 index 9b298edec5..0000000000 --- a/dts/Bindings/gpu/arm,mali-midgard.txt +++ /dev/null @@ -1,119 +0,0 @@ -ARM Mali Midgard GPU -==================== - -Required properties: - -- compatible : - * Must contain one of the following: - + "arm,mali-t604" - + "arm,mali-t624" - + "arm,mali-t628" - + "arm,mali-t720" - + "arm,mali-t760" - + "arm,mali-t820" - + "arm,mali-t830" - + "arm,mali-t860" - + "arm,mali-t880" - * which must be preceded by one of the following vendor specifics: - + "allwinner,sun50i-h6-mali" - + "amlogic,meson-gxm-mali" - + "samsung,exynos5433-mali" - + "rockchip,rk3288-mali" - + "rockchip,rk3399-mali" - -- reg : Physical base address of the device and length of the register area. - -- interrupts : Contains the three IRQ lines required by Mali Midgard devices. - -- interrupt-names : Contains the names of IRQ resources in the order they were - provided in the interrupts property. Must contain: "job", "mmu", "gpu". - - -Optional properties: - -- clocks : Phandle to clock for the Mali Midgard device. - -- clock-names : Specify the names of the clocks specified in clocks - when multiple clocks are present. - * core: clock driving the GPU itself (When only one clock is present, - assume it's this clock.) - * bus: bus clock for the GPU - -- mali-supply : Phandle to regulator for the Mali device. Refer to - Documentation/devicetree/bindings/regulator/regulator.txt for details. - -- operating-points-v2 : Refer to Documentation/devicetree/bindings/opp/opp.txt - for details. - -- #cooling-cells: Refer to Documentation/devicetree/bindings/thermal/thermal.txt - for details. - -- resets : Phandle of the GPU reset line. - -Vendor-specific bindings ------------------------- - -The Mali GPU is integrated very differently from one SoC to -another. In order to accommodate those differences, you have the option -to specify one more vendor-specific compatible, among: - -- "allwinner,sun50i-h6-mali" - Required properties: - - clocks : phandles to core and bus clocks - - clock-names : must contain "core" and "bus" - - resets: phandle to GPU reset line - -- "amlogic,meson-gxm-mali" - Required properties: - - resets : Should contain phandles of : - + GPU reset line - + GPU APB glue reset line - -Example for a Mali-T760: - -gpu@ffa30000 { - compatible = "rockchip,rk3288-mali", "arm,mali-t760"; - reg = <0xffa30000 0x10000>; - interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "job", "mmu", "gpu"; - clocks = <&cru ACLK_GPU>; - mali-supply = <&vdd_gpu>; - operating-points-v2 = <&gpu_opp_table>; - power-domains = <&power RK3288_PD_GPU>; - #cooling-cells = <2>; -}; - -gpu_opp_table: opp_table0 { - compatible = "operating-points-v2"; - - opp@533000000 { - opp-hz = /bits/ 64 <533000000>; - opp-microvolt = <1250000>; - }; - opp@450000000 { - opp-hz = /bits/ 64 <450000000>; - opp-microvolt = <1150000>; - }; - opp@400000000 { - opp-hz = /bits/ 64 <400000000>; - opp-microvolt = <1125000>; - }; - opp@350000000 { - opp-hz = /bits/ 64 <350000000>; - opp-microvolt = <1075000>; - }; - opp@266000000 { - opp-hz = /bits/ 64 <266000000>; - opp-microvolt = <1025000>; - }; - opp@160000000 { - opp-hz = /bits/ 64 <160000000>; - opp-microvolt = <925000>; - }; - opp@100000000 { - opp-hz = /bits/ 64 <100000000>; - opp-microvolt = <912500>; - }; -}; diff --git a/dts/Bindings/gpu/arm,mali-midgard.yaml b/dts/Bindings/gpu/arm,mali-midgard.yaml new file mode 100644 index 0000000000..47bc1ac364 --- /dev/null +++ b/dts/Bindings/gpu/arm,mali-midgard.yaml @@ -0,0 +1,168 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpu/arm,mali-midgard.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARM Mali Midgard GPU + +maintainers: + - Rob Herring <robh@kernel.org> + +properties: + $nodename: + pattern: '^gpu@[a-f0-9]+$' + compatible: + oneOf: + - items: + - enum: + - allwinner,sun50i-h6-mali + - const: arm,mali-t720 + - items: + - enum: + - amlogic,meson-gxm-mali + - const: arm,mali-t820 + - items: + - enum: + - rockchip,rk3288-mali + - const: arm,mali-t760 + - items: + - enum: + - rockchip,rk3399-mali + - const: arm,mali-t860 + - items: + - enum: + - samsung,exynos5250-mali + - const: arm,mali-t604 + - items: + - enum: + - samsung,exynos5433-mali + - const: arm,mali-t760 + + # "arm,mali-t624" + # "arm,mali-t628" + # "arm,mali-t830" + # "arm,mali-t880" + + reg: + maxItems: 1 + + interrupts: + items: + - description: Job interrupt + - description: MMU interrupt + - description: GPU interrupt + + interrupt-names: + items: + - const: job + - const: mmu + - const: gpu + + clocks: + minItems: 1 + maxItems: 2 + + clock-names: + minItems: 1 + items: + - const: core + - const: bus + + mali-supply: + maxItems: 1 + + resets: + minItems: 1 + maxItems: 2 + + operating-points-v2: true + + "#cooling-cells": + const: 2 + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + +allOf: + - if: + properties: + compatible: + contains: + const: allwinner,sun50i-h6-mali + then: + properties: + clocks: + minItems: 2 + required: + - clock-names + - resets + - if: + properties: + compatible: + contains: + const: amlogic,meson-gxm-mali + then: + properties: + resets: + minItems: 2 + required: + - resets + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + gpu@ffa30000 { + compatible = "rockchip,rk3288-mali", "arm,mali-t760"; + reg = <0xffa30000 0x10000>; + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "job", "mmu", "gpu"; + clocks = <&cru 0>; + mali-supply = <&vdd_gpu>; + operating-points-v2 = <&gpu_opp_table>; + power-domains = <&power 0>; + #cooling-cells = <2>; + }; + + gpu_opp_table: opp_table0 { + compatible = "operating-points-v2"; + + opp@533000000 { + opp-hz = /bits/ 64 <533000000>; + opp-microvolt = <1250000>; + }; + opp@450000000 { + opp-hz = /bits/ 64 <450000000>; + opp-microvolt = <1150000>; + }; + opp@400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <1125000>; + }; + opp@350000000 { + opp-hz = /bits/ 64 <350000000>; + opp-microvolt = <1075000>; + }; + opp@266000000 { + opp-hz = /bits/ 64 <266000000>; + opp-microvolt = <1025000>; + }; + opp@160000000 { + opp-hz = /bits/ 64 <160000000>; + opp-microvolt = <925000>; + }; + opp@100000000 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <912500>; + }; + }; + +... diff --git a/dts/Bindings/gpu/arm,mali-utgard.txt b/dts/Bindings/gpu/arm,mali-utgard.txt deleted file mode 100644 index b352a6851a..0000000000 --- a/dts/Bindings/gpu/arm,mali-utgard.txt +++ /dev/null @@ -1,124 +0,0 @@ -ARM Mali Utgard GPU -=================== - -Required properties: - - compatible - * Must be one of the following: - + "arm,mali-300" - + "arm,mali-400" - + "arm,mali-450" - * And, optionally, one of the vendor specific compatible: - + allwinner,sun4i-a10-mali - + allwinner,sun7i-a20-mali - + allwinner,sun8i-h3-mali - + allwinner,sun50i-a64-mali - + allwinner,sun50i-h5-mali - + amlogic,meson8-mali - + amlogic,meson8b-mali - + amlogic,meson-gxbb-mali - + amlogic,meson-gxl-mali - + samsung,exynos4210-mali - + rockchip,rk3036-mali - + rockchip,rk3066-mali - + rockchip,rk3188-mali - + rockchip,rk3228-mali - + rockchip,rk3328-mali - + stericsson,db8500-mali - - - reg: Physical base address and length of the GPU registers - - - interrupts: an entry for each entry in interrupt-names. - See ../interrupt-controller/interrupts.txt for details. - - - interrupt-names: - * ppX: Pixel Processor X interrupt (X from 0 to 7) - * ppmmuX: Pixel Processor X MMU interrupt (X from 0 to 7) - * pp: Pixel Processor broadcast interrupt (mali-450 only) - * gp: Geometry Processor interrupt - * gpmmu: Geometry Processor MMU interrupt - - - clocks: an entry for each entry in clock-names - - clock-names: - * bus: bus clock for the GPU - * core: clock driving the GPU itself - -Optional properties: - - interrupt-names and interrupts: - * pmu: Power Management Unit interrupt, if implemented in hardware - - - memory-region: - Memory region to allocate from, as defined in - Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt - - - mali-supply: - Phandle to regulator for the Mali device, as defined in - Documentation/devicetree/bindings/regulator/regulator.txt for details. - - - operating-points-v2: - Operating Points for the GPU, as defined in - Documentation/devicetree/bindings/opp/opp.txt - - - power-domains: - A power domain consumer specifier as defined in - Documentation/devicetree/bindings/power/power_domain.txt - -Vendor-specific bindings ------------------------- - -The Mali GPU is integrated very differently from one SoC to -another. In order to accomodate those differences, you have the option -to specify one more vendor-specific compatible, among: - - - allwinner,sun4i-a10-mali - Required properties: - * resets: phandle to the reset line for the GPU - - - allwinner,sun7i-a20-mali - Required properties: - * resets: phandle to the reset line for the GPU - - - allwinner,sun50i-a64-mali - Required properties: - * resets: phandle to the reset line for the GPU - - - allwinner,sun50i-h5-mali - Required properties: - * resets: phandle to the reset line for the GPU - - - amlogic,meson8-mali and amlogic,meson8b-mali - Required properties: - * resets: phandle to the reset line for the GPU - - - Rockchip variants: - Required properties: - * resets: phandle to the reset line for the GPU - - - stericsson,db8500-mali - Required properties: - * interrupt-names and interrupts: - + combined: combined interrupt of all of the above lines - -Example: - -mali: gpu@1c40000 { - compatible = "allwinner,sun7i-a20-mali", "arm,mali-400"; - reg = <0x01c40000 0x10000>; - interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "gp", - "gpmmu", - "pp0", - "ppmmu0", - "pp1", - "ppmmu1", - "pmu"; - clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>; - clock-names = "bus", "core"; - resets = <&ccu RST_BUS_GPU>; -}; - diff --git a/dts/Bindings/gpu/arm,mali-utgard.yaml b/dts/Bindings/gpu/arm,mali-utgard.yaml new file mode 100644 index 0000000000..c5d93c5839 --- /dev/null +++ b/dts/Bindings/gpu/arm,mali-utgard.yaml @@ -0,0 +1,168 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpu/arm,mali-utgard.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARM Mali Utgard GPU + +maintainers: + - Rob Herring <robh@kernel.org> + - Maxime Ripard <maxime.ripard@free-electrons.com> + - Heiko Stuebner <heiko@sntech.de> + +properties: + $nodename: + pattern: '^gpu@[a-f0-9]+$' + compatible: + oneOf: + - items: + - const: allwinner,sun8i-a23-mali + - const: allwinner,sun7i-a20-mali + - const: arm,mali-400 + - items: + - enum: + - allwinner,sun4i-a10-mali + - allwinner,sun7i-a20-mali + - allwinner,sun8i-h3-mali + - allwinner,sun50i-a64-mali + - rockchip,rk3036-mali + - rockchip,rk3066-mali + - rockchip,rk3188-mali + - rockchip,rk3228-mali + - samsung,exynos4210-mali + - stericsson,db8500-mali + - const: arm,mali-400 + - items: + - enum: + - allwinner,sun50i-h5-mali + - amlogic,meson8-mali + - amlogic,meson8b-mali + - amlogic,meson-gxbb-mali + - amlogic,meson-gxl-mali + - hisilicon,hi6220-mali + - rockchip,rk3328-mali + - const: arm,mali-450 + + # "arm,mali-300" + + reg: + maxItems: 1 + + interrupts: + minItems: 4 + maxItems: 20 + + interrupt-names: + allOf: + - additionalItems: true + minItems: 4 + maxItems: 20 + items: + # At least enforce the first 2 interrupts + - const: gp + - const: gpmmu + - items: + # Not ideal as any order and combination are allowed + enum: + - gp # Geometry Processor interrupt + - gpmmu # Geometry Processor MMU interrupt + - pp # Pixel Processor broadcast interrupt (mali-450 only) + - pp0 # Pixel Processor X interrupt (X from 0 to 7) + - ppmmu0 # Pixel Processor X MMU interrupt (X from 0 to 7) + - pp1 + - ppmmu1 + - pp2 + - ppmmu2 + - pp3 + - ppmmu3 + - pp4 + - ppmmu4 + - pp5 + - ppmmu5 + - pp6 + - ppmmu6 + - pp7 + - ppmmu7 + - pmu # Power Management Unit interrupt (optional) + - combined # stericsson,db8500-mali only + + clocks: + maxItems: 2 + + clock-names: + items: + - const: bus + - const: core + + memory-region: true + + mali-supply: + maxItems: 1 + + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + + operating-points-v2: true + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + +allOf: + - if: + properties: + compatible: + contains: + enum: + - allwinner,sun4i-a10-mali + - allwinner,sun7i-a20-mali + - allwinner,sun50i-a64-mali + - allwinner,sun50i-h5-mali + - amlogic,meson8-mali + - amlogic,meson8b-mali + - hisilicon,hi6220-mali + - rockchip,rk3036-mali + - rockchip,rk3066-mali + - rockchip,rk3188-mali + - rockchip,rk3228-mali + - rockchip,rk3328-mali + then: + required: + - resets + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + mali: gpu@1c40000 { + compatible = "allwinner,sun7i-a20-mali", "arm,mali-400"; + reg = <0x01c40000 0x10000>; + interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "gp", + "gpmmu", + "pp0", + "ppmmu0", + "pp1", + "ppmmu1", + "pmu"; + clocks = <&ccu 1>, <&ccu 2>; + clock-names = "bus", "core"; + resets = <&ccu 1>; + }; + +... diff --git a/dts/Bindings/hwmon/as370.txt b/dts/Bindings/hwmon/as370.txt new file mode 100644 index 0000000000..d102fe7651 --- /dev/null +++ b/dts/Bindings/hwmon/as370.txt @@ -0,0 +1,11 @@ +Bindings for Synaptics AS370 PVT sensors + +Required properties: +- compatible : "syna,as370-hwmon" +- reg : address and length of the register set. + +Example: + hwmon@ea0810 { + compatible = "syna,as370-hwmon"; + reg = <0xea0810 0xc>; + }; diff --git a/dts/Bindings/hwmon/ibm,cffps1.txt b/dts/Bindings/hwmon/ibm,cffps1.txt index f68a0a68fc..1036f65fb7 100644 --- a/dts/Bindings/hwmon/ibm,cffps1.txt +++ b/dts/Bindings/hwmon/ibm,cffps1.txt @@ -1,8 +1,10 @@ -Device-tree bindings for IBM Common Form Factor Power Supply Version 1 ----------------------------------------------------------------------- +Device-tree bindings for IBM Common Form Factor Power Supply Versions 1 and 2 +----------------------------------------------------------------------------- Required properties: - - compatible = "ibm,cffps1"; + - compatible : Must be one of the following: + "ibm,cffps1" + "ibm,cffps2" - reg = < I2C bus address >; : Address of the power supply on the I2C bus. diff --git a/dts/Bindings/hwmon/lm75.txt b/dts/Bindings/hwmon/lm75.txt index 586b5ed70b..273616702c 100644 --- a/dts/Bindings/hwmon/lm75.txt +++ b/dts/Bindings/hwmon/lm75.txt @@ -15,6 +15,7 @@ Required properties: "maxim,max31725", "maxim,max31726", "maxim,mcp980x", + "nxp,pct2075", "st,stds75", "st,stlm75", "microchip,tcn75", diff --git a/dts/Bindings/i2c/brcm,bcm2835-i2c.txt b/dts/Bindings/i2c/brcm,bcm2835-i2c.txt index e9de375675..c9a6587fe4 100644 --- a/dts/Bindings/i2c/brcm,bcm2835-i2c.txt +++ b/dts/Bindings/i2c/brcm,bcm2835-i2c.txt @@ -1,7 +1,9 @@ Broadcom BCM2835 I2C controller Required properties: -- compatible : Should be "brcm,bcm2835-i2c". +- compatible : Should be one of: + "brcm,bcm2711-i2c" + "brcm,bcm2835-i2c" - reg: Should contain register location and length. - interrupts: Should contain interrupt. - clocks : The clock feeding the I2C controller. diff --git a/dts/Bindings/i2c/i2c-mux-gpmux.txt b/dts/Bindings/i2c/i2c-mux-gpmux.txt index 2907dab562..8b444b94e9 100644 --- a/dts/Bindings/i2c/i2c-mux-gpmux.txt +++ b/dts/Bindings/i2c/i2c-mux-gpmux.txt @@ -42,7 +42,7 @@ Optional properties: This means that no unrelated I2C transactions are allowed on the parent I2C adapter for the complete multiplexed I2C transaction. The properties of mux-locked and parent-locked multiplexers are discussed - in more detail in Documentation/i2c/i2c-topology. + in more detail in Documentation/i2c/i2c-topology.rst. For each i2c child node, an I2C child bus will be created. They will be numbered based on their order in the device tree. diff --git a/dts/Bindings/i2c/marvell,mv64xxx-i2c.yaml b/dts/Bindings/i2c/marvell,mv64xxx-i2c.yaml index 001f2b7aba..c779000515 100644 --- a/dts/Bindings/i2c/marvell,mv64xxx-i2c.yaml +++ b/dts/Bindings/i2c/marvell,mv64xxx-i2c.yaml @@ -26,6 +26,9 @@ properties: - items: - const: allwinner,sun50i-a64-i2c - const: allwinner,sun6i-a31-i2c + - items: + - const: allwinner,sun50i-h6-i2c + - const: allwinner,sun6i-a31-i2c - const: marvell,mv64xxx-i2c - const: marvell,mv78230-i2c diff --git a/dts/Bindings/i2c/i2c-rcar.txt b/dts/Bindings/i2c/renesas,i2c.txt index 3ee5e8f6ee..3ee5e8f6ee 100644 --- a/dts/Bindings/i2c/i2c-rcar.txt +++ b/dts/Bindings/i2c/renesas,i2c.txt diff --git a/dts/Bindings/i2c/i2c-emev2.txt b/dts/Bindings/i2c/renesas,iic-emev2.txt index 5ed1ea1c7e..5ed1ea1c7e 100644 --- a/dts/Bindings/i2c/i2c-emev2.txt +++ b/dts/Bindings/i2c/renesas,iic-emev2.txt diff --git a/dts/Bindings/i2c/i2c-sh_mobile.txt b/dts/Bindings/i2c/renesas,iic.txt index 202602e6e8..202602e6e8 100644 --- a/dts/Bindings/i2c/i2c-sh_mobile.txt +++ b/dts/Bindings/i2c/renesas,iic.txt diff --git a/dts/Bindings/i2c/i2c-riic.txt b/dts/Bindings/i2c/renesas,riic.txt index e26fe3ad86..e26fe3ad86 100644 --- a/dts/Bindings/i2c/i2c-riic.txt +++ b/dts/Bindings/i2c/renesas,riic.txt diff --git a/dts/Bindings/iio/adc/adi,ad7192.yaml b/dts/Bindings/iio/adc/adi,ad7192.yaml new file mode 100644 index 0000000000..676ec42e14 --- /dev/null +++ b/dts/Bindings/iio/adc/adi,ad7192.yaml @@ -0,0 +1,121 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019 Analog Devices Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bindings/iio/adc/adi,ad7192.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AD7192 ADC device driver + +maintainers: + - Michael Hennerich <michael.hennerich@analog.com> + +description: | + Bindings for the Analog Devices AD7192 ADC device. Datasheet can be + found here: + https://www.analog.com/media/en/technical-documentation/data-sheets/AD7192.pdf + +properties: + compatible: + enum: + - adi,ad7190 + - adi,ad7192 + - adi,ad7193 + - adi,ad7195 + + reg: + maxItems: 1 + + spi-cpol: true + + spi-cpha: true + + clocks: + maxItems: 1 + description: phandle to the master clock (mclk) + + clock-names: + items: + - const: mclk + + interrupts: + maxItems: 1 + + dvdd-supply: + description: DVdd voltage supply + items: + - const: dvdd + + avdd-supply: + description: AVdd voltage supply + items: + - const: avdd + + adi,rejection-60-Hz-enable: + description: | + This bit enables a notch at 60 Hz when the first notch of the sinc + filter is at 50 Hz. When REJ60 is set, a filter notch is placed at + 60 Hz when the sinc filter first notch is at 50 Hz. This allows + simultaneous 50 Hz/ 60 Hz rejection. + type: boolean + + adi,refin2-pins-enable: + description: | + External reference applied between the P1/REFIN2(+) and P0/REFIN2(−) pins. + type: boolean + + adi,buffer-enable: + description: | + Enables the buffer on the analog inputs. If cleared, the analog inputs + are unbuffered, lowering the power consumption of the device. If this + bit is set, the analog inputs are buffered, allowing the user to place + source impedances on the front end without contributing gain errors to + the system. + type: boolean + + adi,burnout-currents-enable: + description: | + When this bit is set to 1, the 500 nA current sources in the signal + path are enabled. When BURN = 0, the burnout currents are disabled. + The burnout currents can be enabled only when the buffer is active + and when chop is disabled. + type: boolean + + bipolar: + description: see Documentation/devicetree/bindings/iio/adc/adc.txt + type: boolean + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + - dvdd-supply + - avdd-supply + - spi-cpol + - spi-cpha + +examples: + - | + spi0 { + adc@0 { + compatible = "adi,ad7192"; + reg = <0>; + spi-max-frequency = <1000000>; + spi-cpol; + spi-cpha; + clocks = <&ad7192_mclk>; + clock-names = "mclk"; + #interrupt-cells = <2>; + interrupts = <25 0x2>; + interrupt-parent = <&gpio>; + dvdd-supply = <&dvdd>; + avdd-supply = <&avdd>; + + adi,refin2-pins-enable; + adi,rejection-60-Hz-enable; + adi,buffer-enable; + adi,burnout-currents-enable; + }; + }; diff --git a/dts/Bindings/iio/adc/adi,ad7606.txt b/dts/Bindings/iio/adc/adi,ad7606.txt deleted file mode 100644 index d865246019..0000000000 --- a/dts/Bindings/iio/adc/adi,ad7606.txt +++ /dev/null @@ -1,66 +0,0 @@ -Analog Devices AD7606 Simultaneous Sampling ADC - -Required properties for the AD7606: - -- compatible: Must be one of - * "adi,ad7605-4" - * "adi,ad7606-8" - * "adi,ad7606-6" - * "adi,ad7606-4" - * "adi,ad7616" -- reg: SPI chip select number for the device -- spi-max-frequency: Max SPI frequency to use - see: Documentation/devicetree/bindings/spi/spi-bus.txt -- spi-cpha: See Documentation/devicetree/bindings/spi/spi-bus.txt -- avcc-supply: phandle to the Avcc power supply -- interrupts: IRQ line for the ADC - see: Documentation/devicetree/bindings/interrupt-controller/interrupts.txt -- adi,conversion-start-gpios: must be the device tree identifier of the CONVST pin. - This logic input is used to initiate conversions on the analog - input channels. As the line is active high, it should be marked - GPIO_ACTIVE_HIGH. - -Optional properties: - -- reset-gpios: must be the device tree identifier of the RESET pin. If specified, - it will be asserted during driver probe. As the line is active high, - it should be marked GPIO_ACTIVE_HIGH. -- standby-gpios: must be the device tree identifier of the STBY pin. This pin is used - to place the AD7606 into one of two power-down modes, Standby mode or - Shutdown mode. As the line is active low, it should be marked - GPIO_ACTIVE_LOW. -- adi,first-data-gpios: must be the device tree identifier of the FRSTDATA pin. - The FRSTDATA output indicates when the first channel, V1, is - being read back on either the parallel, byte or serial interface. - As the line is active high, it should be marked GPIO_ACTIVE_HIGH. -- adi,range-gpios: must be the device tree identifier of the RANGE pin. The polarity on - this pin determines the input range of the analog input channels. If - this pin is tied to a logic high, the analog input range is ±10V for - all channels. If this pin is tied to a logic low, the analog input range - is ±5V for all channels. As the line is active high, it should be marked - GPIO_ACTIVE_HIGH. -- adi,oversampling-ratio-gpios: must be the device tree identifier of the over-sampling - mode pins. As the line is active high, it should be marked - GPIO_ACTIVE_HIGH. - -Example: - - adc@0 { - compatible = "adi,ad7606-8"; - reg = <0>; - spi-max-frequency = <1000000>; - spi-cpol; - - avcc-supply = <&adc_vref>; - - interrupts = <25 IRQ_TYPE_EDGE_FALLING>; - interrupt-parent = <&gpio>; - - adi,conversion-start-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>; - reset-gpios = <&gpio 27 GPIO_ACTIVE_HIGH>; - adi,first-data-gpios = <&gpio 22 GPIO_ACTIVE_HIGH>; - adi,oversampling-ratio-gpios = <&gpio 18 GPIO_ACTIVE_HIGH - &gpio 23 GPIO_ACTIVE_HIGH - &gpio 26 GPIO_ACTIVE_HIGH>; - standby-gpios = <&gpio 24 GPIO_ACTIVE_LOW>; - }; diff --git a/dts/Bindings/iio/adc/adi,ad7606.yaml b/dts/Bindings/iio/adc/adi,ad7606.yaml new file mode 100644 index 0000000000..cc544fdc38 --- /dev/null +++ b/dts/Bindings/iio/adc/adi,ad7606.yaml @@ -0,0 +1,138 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/adi,ad7606.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AD7606 Simultaneous Sampling ADC + +maintainers: + - Beniamin Bia <beniamin.bia@analog.com> + - Stefan Popa <stefan.popa@analog.com> + +description: | + Analog Devices AD7606 Simultaneous Sampling ADC + https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606_7606-6_7606-4.pdf + https://www.analog.com/media/en/technical-documentation/data-sheets/AD7606B.pdf + https://www.analog.com/media/en/technical-documentation/data-sheets/AD7616.pdf + +properties: + compatible: + enum: + - adi,ad7605-4 + - adi,ad7606-8 + - adi,ad7606-6 + - adi,ad7606-4 + - adi,ad7606b + - adi,ad7616 + + reg: + maxItems: 1 + + spi-cpha: true + + avcc-supply: + description: + Phandle to the Avcc power supply + maxItems: 1 + + interrupts: + maxItems: 1 + + adi,conversion-start-gpios: + description: + Must be the device tree identifier of the CONVST pin. + This logic input is used to initiate conversions on the analog + input channels. As the line is active high, it should be marked + GPIO_ACTIVE_HIGH. + maxItems: 1 + + reset-gpios: + description: + Must be the device tree identifier of the RESET pin. If specified, + it will be asserted during driver probe. As the line is active high, + it should be marked GPIO_ACTIVE_HIGH. + maxItems: 1 + + standby-gpios: + description: + Must be the device tree identifier of the STBY pin. This pin is used + to place the AD7606 into one of two power-down modes, Standby mode or + Shutdown mode. As the line is active low, it should be marked + GPIO_ACTIVE_LOW. + maxItems: 1 + + adi,first-data-gpios: + description: + Must be the device tree identifier of the FRSTDATA pin. + The FRSTDATA output indicates when the first channel, V1, is + being read back on either the parallel, byte or serial interface. + As the line is active high, it should be marked GPIO_ACTIVE_HIGH. + maxItems: 1 + + adi,range-gpios: + description: + Must be the device tree identifier of the RANGE pin. The polarity on + this pin determines the input range of the analog input channels. If + this pin is tied to a logic high, the analog input range is ±10V for + all channels. If this pin is tied to a logic low, the analog input range + is ±5V for all channels. As the line is active high, it should be marked + GPIO_ACTIVE_HIGH. + maxItems: 1 + + adi,oversampling-ratio-gpios: + description: + Must be the device tree identifier of the over-sampling + mode pins. As the line is active high, it should be marked + GPIO_ACTIVE_HIGH. + maxItems: 1 + + adi,sw-mode: + description: + Software mode of operation, so far available only for ad7616 and ad7606b. + It is enabled when all three oversampling mode pins are connected to + high level. The device is configured by the corresponding registers. If the + adi,oversampling-ratio-gpios property is defined, then the driver will set the + oversampling gpios to high. Otherwise, it is assumed that the pins are hardwired + to VDD. + type: boolean + +required: + - compatible + - reg + - spi-cpha + - avcc-supply + - interrupts + - adi,conversion-start-gpios + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/irq.h> + spi0 { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "adi,ad7606-8"; + reg = <0>; + spi-max-frequency = <1000000>; + spi-cpol; + spi-cpha; + + avcc-supply = <&adc_vref>; + + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; + interrupt-parent = <&gpio>; + + adi,conversion-start-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio 27 GPIO_ACTIVE_HIGH>; + adi,first-data-gpios = <&gpio 22 GPIO_ACTIVE_HIGH>; + adi,oversampling-ratio-gpios = <&gpio 18 GPIO_ACTIVE_HIGH + &gpio 23 GPIO_ACTIVE_HIGH + &gpio 26 GPIO_ACTIVE_HIGH>; + standby-gpios = <&gpio 24 GPIO_ACTIVE_LOW>; + adi,sw-mode; + }; + }; +... diff --git a/dts/Bindings/hwmon/ads1015.txt b/dts/Bindings/iio/adc/ads1015.txt index 918a507d11..918a507d11 100644 --- a/dts/Bindings/hwmon/ads1015.txt +++ b/dts/Bindings/iio/adc/ads1015.txt diff --git a/dts/Bindings/iio/adc/allwinner,sun8i-a33-ths.yaml b/dts/Bindings/iio/adc/allwinner,sun8i-a33-ths.yaml new file mode 100644 index 0000000000..d74962c0f5 --- /dev/null +++ b/dts/Bindings/iio/adc/allwinner,sun8i-a33-ths.yaml @@ -0,0 +1,43 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/allwinner,sun8i-a33-ths.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner A33 Thermal Sensor Device Tree Bindings + +maintainers: + - Chen-Yu Tsai <wens@csie.org> + - Maxime Ripard <maxime.ripard@bootlin.com> + +properties: + "#io-channel-cells": + const: 0 + + "#thermal-sensor-cells": + const: 0 + + compatible: + const: allwinner,sun8i-a33-ths + + reg: + maxItems: 1 + +required: + - "#io-channel-cells" + - "#thermal-sensor-cells" + - compatible + - reg + +additionalProperties: false + +examples: + - | + ths: ths@1c25000 { + compatible = "allwinner,sun8i-a33-ths"; + reg = <0x01c25000 0x100>; + #thermal-sensor-cells = <0>; + #io-channel-cells = <0>; + }; + +... diff --git a/dts/Bindings/iio/adc/st,stm32-adc.txt b/dts/Bindings/iio/adc/st,stm32-adc.txt index 93a0bd2efc..4c0da8c74b 100644 --- a/dts/Bindings/iio/adc/st,stm32-adc.txt +++ b/dts/Bindings/iio/adc/st,stm32-adc.txt @@ -47,6 +47,12 @@ Required properties: Optional properties: - A pinctrl state named "default" for each ADC channel may be defined to set inX ADC pins in mode of operation for analog input on external pin. +- booster-supply: Phandle to the embedded booster regulator that can be used + to supply ADC analog input switches on stm32h7 and stm32mp1. +- vdd-supply: Phandle to the vdd input voltage. It can be used to supply ADC + analog input switches on stm32mp1. +- st,syscfg: Phandle to system configuration controller. It can be used to + control the analog circuitry on stm32mp1. Contents of a stm32 adc child node: ----------------------------------- diff --git a/dts/Bindings/iio/chemical/plantower,pms7003.txt b/dts/Bindings/iio/chemical/plantower,pms7003.txt deleted file mode 100644 index c52ea2126e..0000000000 --- a/dts/Bindings/iio/chemical/plantower,pms7003.txt +++ /dev/null @@ -1,26 +0,0 @@ -* Plantower PMS7003 particulate matter sensor - -Required properties: -- compatible: must one of: - "plantower,pms1003" - "plantower,pms3003" - "plantower,pms5003" - "plantower,pms6003" - "plantower,pms7003" - "plantower,pmsa003" -- vcc-supply: phandle to the regulator that provides power to the sensor - -Optional properties: -- plantower,set-gpios: phandle to the GPIO connected to the SET line -- reset-gpios: phandle to the GPIO connected to the RESET line - -Refer to serial/slave-device.txt for generic serial attached device bindings. - -Example: - -&uart0 { - air-pollution-sensor { - compatible = "plantower,pms7003"; - vcc-supply = <®_vcc5v0>; - }; -}; diff --git a/dts/Bindings/iio/chemical/plantower,pms7003.yaml b/dts/Bindings/iio/chemical/plantower,pms7003.yaml new file mode 100644 index 0000000000..a551d3101f --- /dev/null +++ b/dts/Bindings/iio/chemical/plantower,pms7003.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/chemical/plantower,pms7003.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Plantower PMS7003 air pollution sensor + +maintainers: + - Tomasz Duszynski <tduszyns@gmail.com> + +description: | + Air pollution sensor capable of measuring mass concentration of dust + particles. + +properties: + compatible: + enum: + - plantower,pms1003 + - plantower,pms3003 + - plantower,pms5003 + - plantower,pms6003 + - plantower,pms7003 + - plantower,pmsa003 + + vcc-supply: + description: regulator that provides power to the sensor + maxItems: 1 + + plantower,set-gpios: + description: GPIO connected to the SET line + maxItems: 1 + + reset-gpios: + description: GPIO connected to the RESET line + maxItems: 1 + +required: + - compatible + - vcc-supply + +examples: + - | + serial { + air-pollution-sensor { + compatible = "plantower,pms7003"; + vcc-supply = <®_vcc5v0>; + }; + }; + +... diff --git a/dts/Bindings/iio/imu/adi,adis16460.yaml b/dts/Bindings/iio/imu/adi,adis16460.yaml new file mode 100644 index 0000000000..0c53009ba7 --- /dev/null +++ b/dts/Bindings/iio/imu/adi,adis16460.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/imu/adi,adis16460.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices ADIS16460 and similar IMUs + +maintainers: + - Dragos Bogdan <dragos.bogdan@analog.com> + +description: | + Analog Devices ADIS16460 and similar IMUs + https://www.analog.com/media/en/technical-documentation/data-sheets/ADIS16460.pdf + +properties: + compatible: + enum: + - adi,adis16460 + + reg: + maxItems: 1 + + spi-cpha: true + + spi-cpol: true + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/irq.h> + spi0 { + #address-cells = <1>; + #size-cells = <0>; + + imu@0 { + compatible = "adi,adis16460"; + reg = <0>; + spi-max-frequency = <5000000>; + spi-cpol; + spi-cpha; + interrupt-parent = <&gpio0>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + }; + }; diff --git a/dts/Bindings/iio/imu/st_lsm6dsx.txt b/dts/Bindings/iio/imu/st_lsm6dsx.txt index efec9ece03..6d0c050d89 100644 --- a/dts/Bindings/iio/imu/st_lsm6dsx.txt +++ b/dts/Bindings/iio/imu/st_lsm6dsx.txt @@ -11,6 +11,9 @@ Required properties: "st,asm330lhh" "st,lsm6dsox" "st,lsm6dsr" + "st,lsm6ds3tr-c" + "st,ism330dhcx" + "st,lsm9ds1-imu" - reg: i2c address of the sensor / spi cs line Optional properties: diff --git a/dts/Bindings/iio/light/noa1305.yaml b/dts/Bindings/iio/light/noa1305.yaml new file mode 100644 index 0000000000..17e7f140b6 --- /dev/null +++ b/dts/Bindings/iio/light/noa1305.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/light/noa1305.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ON Semiconductor NOA1305 Ambient Light Sensor + +maintainers: + - Martyn Welch <martyn.welch@collabora.com> + +description: | + Ambient sensing with an i2c interface. + + https://www.onsemi.com/pub/Collateral/NOA1305-D.PDF + +properties: + compatible: + enum: + - onnn,noa1305 + + reg: + maxItems: 1 + + vin-supply: + description: Regulator that provides power to the sensor + +required: + - compatible + - reg + +examples: + - | + i2c { + + #address-cells = <1>; + #size-cells = <0>; + + light@39 { + compatible = "onnn,noa1305"; + reg = <0x39>; + }; + }; +... diff --git a/dts/Bindings/iio/light/isl29501.txt b/dts/Bindings/iio/light/renesas,isl29501.txt index 46957997fe..46957997fe 100644 --- a/dts/Bindings/iio/light/isl29501.txt +++ b/dts/Bindings/iio/light/renesas,isl29501.txt diff --git a/dts/Bindings/iio/light/stk33xx.yaml b/dts/Bindings/iio/light/stk33xx.yaml new file mode 100644 index 0000000000..aae8a6d627 --- /dev/null +++ b/dts/Bindings/iio/light/stk33xx.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/light/stk33xx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: | + Sensortek STK33xx I2C Ambient Light and Proximity sensor + +maintainers: + - Jonathan Cameron <jic23@kernel.org> + +description: | + Ambient light and proximity sensor over an i2c interface. + +properties: + compatible: + enum: + - sensortek,stk3310 + - sensortek,stk3311 + - sensortek,stk3335 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + + i2c { + + #address-cells = <1>; + #size-cells = <0>; + + stk3310@48 { + compatible = "sensortek,stk3310"; + reg = <0x48>; + interrupt-parent = <&gpio1>; + interrupts = <5 IRQ_TYPE_LEVEL_LOW>; + }; + }; +... diff --git a/dts/Bindings/iio/mount-matrix.txt b/dts/Bindings/iio/mount-matrix.txt new file mode 100644 index 0000000000..c3344ab509 --- /dev/null +++ b/dts/Bindings/iio/mount-matrix.txt @@ -0,0 +1,203 @@ +For discussion. Unclear are: +* is the definition of +/- values practical or counterintuitive? +* are the definitions unambiguous and easy to follow? +* are the examples correct? +* should we have HOWTO engineer a correct matrix for a new device (without comparing to a different one)? + +==== + + +Mounting matrix + +The mounting matrix is a device tree property used to orient any device +that produce three-dimensional data in relation to the world where it is +deployed. + +The purpose of the mounting matrix is to translate the sensor frame of +reference into the device frame of reference using a translation matrix as +defined in linear algebra. + +The typical usecase is that where a component has an internal representation +of the (x,y,z) triplets, such as different registers to read these coordinates, +and thus implying that the component should be mounted in a certain orientation +relative to some specific device frame of reference. + +For example a device with some kind of screen, where the user is supposed to +interact with the environment using an accelerometer, gyroscope or magnetometer +mounted on the same chassis as this screen, will likely take the screen as +reference to (x,y,z) orientation, with (x,y) corresponding to these axes on the +screen and (z) being depth, the axis perpendicular to the screen. + +For a screen you probably want (x) coordinates to go from negative on the left +to positive on the right, (y) from negative on the bottom to positive on top +and (z) depth to be negative under the screen and positive in front of it, +toward the face of the user. + +A sensor can be mounted in any angle along the axes relative to the frame of +reference. This means that the sensor may be flipped upside-down, left-right, +or tilted at any angle relative to the frame of reference. + +Another frame of reference is how the device with its sensor relates to the +external world, the environment where the device is deployed. Usually the data +from the sensor is used to figure out how the device is oriented with respect +to this world. When using the mounting matrix, the sensor and device orientation +becomes identical and we can focus on the data as it relates to the surrounding +world. + +Device-to-world examples for some three-dimensional sensor types: + +- Accelerometers have their world frame of reference toward the center of + gravity, usually to the core of the planet. A reading of the (x,y,z) values + from the sensor will give a projection of the gravity vector through the + device relative to the center of the planet, i.e. relative to its surface at + this point. Up and down in the world relative to the device frame of + reference can thus be determined. and users would likely expect a value of + 9.81 m/s^2 upwards along the (z) axis, i.e. out of the screen when the device + is held with its screen flat on the planets surface and 0 on the other axes, + as the gravity vector is projected 1:1 onto the sensors (z)-axis. + + If you tilt the device, the g vector virtually coming out of the display + is projected onto the (x,y) plane of the display panel. + + Example: + + ^ z: +g ^ z: > 0 + ! /! + ! x=y=0 / ! x: > 0 + +--------+ +--------+ + ! ! ! ! + +--------+ +--------+ + ! / + ! / + v v + center of center of + gravity gravity + + + If the device is tilted to the left, you get a positive x value. If you point + its top towards surface, you get a negative y axis. + + (---------) + ! ! y: -g + ! ! ^ + ! ! ! + ! ! + ! ! x: +g <- z: +g -> x: -g + ! 1 2 3 ! + ! 4 5 6 ! ! + ! 7 8 9 ! v + ! * 0 # ! y: +g + (---------) + + +- Magnetometers (compasses) have their world frame of reference relative to the + geomagnetic field. The system orientation vis-a-vis the world is defined with + respect to the local earth geomagnetic reference frame where (y) is in the + ground plane and positive towards magnetic North, (x) is in the ground plane, + perpendicular to the North axis and positive towards the East and (z) is + perpendicular to the ground plane and positive upwards. + + + ^^^ North: y > 0 + + (---------) + ! ! + ! ! + ! ! + ! ! > + ! ! > North: x > 0 + ! 1 2 3 ! > + ! 4 5 6 ! + ! 7 8 9 ! + ! * 0 # ! + (---------) + + Since the geomagnetic field is not uniform this definition fails if we come + closer to the poles. + + Sensors and driver can not and should not take care of this because there + are complex calculations and empirical data to be taken care of. We leave + this up to user space. + + The definition we take: + + If the device is placed at the equator and the top is pointing north, the + display is readable by a person standing upright on the earth surface, this + defines a positive y value. + + +- Gyroscopes detects the movement relative the device itself. The angular + velocity is defined as orthogonal to the plane of rotation, so if you put the + device on a flat surface and spin it around the z axis (such as rotating a + device with a screen lying flat on a table), you should get a negative value + along the (z) axis if rotated clockwise, and a positive value if rotated + counter-clockwise according to the right-hand rule. + + + (---------) y > 0 + ! ! v---\ + ! ! + ! ! + ! ! <--\ + ! ! ! z > 0 + ! 1 2 3 ! --/ + ! 4 5 6 ! + ! 7 8 9 ! + ! * 0 # ! + (---------) + + +So unless the sensor is ideally mounted, we need a means to indicate the +relative orientation of any given sensor of this type with respect to the +frame of reference. + +To achieve this, use the device tree property "mount-matrix" for the sensor. + +This supplies a 3x3 rotation matrix in the strict linear algebraic sense, +to orient the senor axes relative to a desired point of reference. This means +the resulting values from the sensor, after scaling to proper units, should be +multiplied by this matrix to give the proper vectors values in three-dimensional +space, relative to the device or world point of reference. + +For more information, consult: +https://en.wikipedia.org/wiki/Rotation_matrix + +The mounting matrix has the layout: + + (mxx, myx, mzx) + (mxy, myy, mzy) + (mxz, myz, mzz) + +Values are intended to be multiplied as: + + x' = mxx * x + myx * y + mzx * z + y' = mxy * x + myy * y + mzy * z + z' = mxz * x + myz * y + mzz * z + +It is represented as an array of strings containing the real values for +producing the transformation matrix. + +Examples: + +Identity matrix (nothing happens to the coordinates, which means the device was +mechanically mounted in an ideal way and we need no transformation): + +mount-matrix = "1", "0", "0", + "0", "1", "0", + "0", "0", "1"; + +The sensor is mounted 30 degrees (Pi/6 radians) tilted along the X axis, so we +compensate by performing a -30 degrees rotation around the X axis: + +mount-matrix = "1", "0", "0", + "0", "0.866", "0.5", + "0", "-0.5", "0.866"; + +The sensor is flipped 180 degrees (Pi radians) around the Z axis, i.e. mounted +upside-down: + +mount-matrix = "0.998", "0.054", "0", + "-0.054", "0.998", "0", + "0", "0", "1"; + +???: this does not match "180 degrees" - factors indicate ca. 3 degrees compensation diff --git a/dts/Bindings/iio/potentiometer/max5432.yaml b/dts/Bindings/iio/potentiometer/max5432.yaml new file mode 100644 index 0000000000..5082f919df --- /dev/null +++ b/dts/Bindings/iio/potentiometer/max5432.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/potentiometer/max5432.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Maxim Integrated MAX5432-MAX5435 Digital Potentiometers + +maintainers: + - Martin Kaiser <martin@kaiser.cx> + +description: | + Maxim Integrated MAX5432-MAX5435 Digital Potentiometers connected via I2C + + Datasheet: + https://datasheets.maximintegrated.com/en/ds/MAX5432-MAX5435.pdf + +properties: + compatible: + enum: + - maxim,max5432 + - maxim,max5433 + - maxim,max5434 + - maxim,max5435 + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + max5434@28 { + compatible = "maxim,max5434"; + reg = <0x28>; + }; + }; diff --git a/dts/Bindings/input/allwinner,sun4i-a10-lradc-keys.yaml b/dts/Bindings/input/allwinner,sun4i-a10-lradc-keys.yaml new file mode 100644 index 0000000000..b3bd8ef7fb --- /dev/null +++ b/dts/Bindings/input/allwinner,sun4i-a10-lradc-keys.yaml @@ -0,0 +1,95 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/allwinner,sun4i-a10-lradc-keys.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner A10 LRADC Device Tree Bindings + +maintainers: + - Chen-Yu Tsai <wens@csie.org> + - Maxime Ripard <maxime.ripard@bootlin.com> + +properties: + compatible: + oneOf: + - const: allwinner,sun4i-a10-lradc-keys + - const: allwinner,sun8i-a83t-r-lradc + - items: + - const: allwinner,sun50i-a64-lradc + - const: allwinner,sun8i-a83t-r-lradc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + vref-supply: + description: + Regulator for the LRADC reference voltage + +patternProperties: + "^button-[0-9]+$": + type: object + properties: + label: + $ref: /schemas/types.yaml#/definitions/string + description: Descriptive name of the key + + linux,code: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Keycode to emit + + channel: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [0, 1] + description: ADC Channel this key is attached to + + voltage: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Voltage in microvolts at LRADC input when this key is + pressed + + required: + - label + - linux,code + - channel + - voltage + + additionalProperties: false + +required: + - compatible + - reg + - interrupts + - vref-supply + +additionalProperties: false + +examples: + - | + lradc: lradc@1c22800 { + compatible = "allwinner,sun4i-a10-lradc-keys"; + reg = <0x01c22800 0x100>; + interrupts = <31>; + vref-supply = <®_vcc3v0>; + + button-191 { + label = "Volume Up"; + linux,code = <115>; + channel = <0>; + voltage = <191274>; + }; + + button-392 { + label = "Volume Down"; + linux,code = <114>; + channel = <0>; + voltage = <392644>; + }; + }; + +... diff --git a/dts/Bindings/input/sun4i-lradc-keys.txt b/dts/Bindings/input/sun4i-lradc-keys.txt deleted file mode 100644 index 507b737612..0000000000 --- a/dts/Bindings/input/sun4i-lradc-keys.txt +++ /dev/null @@ -1,65 +0,0 @@ -Allwinner sun4i low res adc attached tablet keys ------------------------------------------------- - -Required properties: - - compatible: should be one of the following string: - "allwinner,sun4i-a10-lradc-keys" - "allwinner,sun8i-a83t-r-lradc" - "allwinner,sun50i-a64-lradc", "allwinner,sun8i-a83t-r-lradc" - - reg: mmio address range of the chip - - interrupts: interrupt to which the chip is connected - - vref-supply: powersupply for the lradc reference voltage - -Each key is represented as a sub-node of the compatible mentioned above: - -Required subnode-properties: - - label: Descriptive name of the key. - - linux,code: Keycode to emit. - - channel: Channel this key is attached to, must be 0 or 1. - - voltage: Voltage in µV at lradc input when this key is pressed. - -Example: - -#include <dt-bindings/input/input.h> - - lradc: lradc@1c22800 { - compatible = "allwinner,sun4i-a10-lradc-keys"; - reg = <0x01c22800 0x100>; - interrupts = <31>; - vref-supply = <®_vcc3v0>; - - button@191 { - label = "Volume Up"; - linux,code = <KEY_VOLUMEUP>; - channel = <0>; - voltage = <191274>; - }; - - button@392 { - label = "Volume Down"; - linux,code = <KEY_VOLUMEDOWN>; - channel = <0>; - voltage = <392644>; - }; - - button@601 { - label = "Menu"; - linux,code = <KEY_MENU>; - channel = <0>; - voltage = <601151>; - }; - - button@795 { - label = "Enter"; - linux,code = <KEY_ENTER>; - channel = <0>; - voltage = <795090>; - }; - - button@987 { - label = "Home"; - linux,code = <KEY_HOMEPAGE>; - channel = <0>; - voltage = <987387>; - }; - }; diff --git a/dts/Bindings/input/touchscreen/ads7846.txt b/dts/Bindings/input/touchscreen/ads7846.txt index 04413da513..81f6bda97d 100644 --- a/dts/Bindings/input/touchscreen/ads7846.txt +++ b/dts/Bindings/input/touchscreen/ads7846.txt @@ -32,7 +32,6 @@ Optional properties: (ADS7846). ti,keep-vref-on set to keep vref on for differential measurements as well - ti,swap-xy swap x and y axis ti,settle-delay-usec Settling time of the analog signals; a function of Vcc and the capacitance on the X/Y drivers. If set to non-zero, @@ -51,13 +50,6 @@ Optional properties: in Ohms (u16). ti,x-min Minimum value on the X axis (u16). ti,y-min Minimum value on the Y axis (u16). - ti,x-max Maximum value on the X axis (u16). - ti,y-max Minimum value on the Y axis (u16). - ti,pressure-min Minimum reported pressure value - (threshold) - u16. - ti,pressure-max Maximum reported pressure value (u16). - ti,debounce-max Max number of additional readings per - sample (u16). ti,debounce-tol Tolerance used for filtering (u16). ti,debounce-rep Additional consecutive good readings required after the first two (u16). @@ -67,7 +59,28 @@ Optional properties: line is connected to. wakeup-source use any event on touchscreen as wakeup event. (Legacy property support: "linux,wakeup") + touchscreen-size-x General touchscreen binding, see [1]. + touchscreen-size-y General touchscreen binding, see [1]. + touchscreen-max-pressure General touchscreen binding, see [1]. + touchscreen-min-pressure General touchscreen binding, see [1]. + touchscreen-average-samples General touchscreen binding, see [1]. + touchscreen-inverted-x General touchscreen binding, see [1]. + touchscreen-inverted-y General touchscreen binding, see [1]. + touchscreen-swapped-x-y General touchscreen binding, see [1]. + +[1] All general touchscreen properties are described in + Documentation/devicetree/bindings/input/touchscreen/touchscreen.txt. +Deprecated properties: + + ti,swap-xy swap x and y axis + ti,x-max Maximum value on the X axis (u16). + ti,y-max Maximum value on the Y axis (u16). + ti,pressure-min Minimum reported pressure value + (threshold) - u16. + ti,pressure-max Maximum reported pressure value (u16). + ti,debounce-max Max number of additional readings per + sample (u16). Example for a TSC2046 chip connected to an McSPI controller of an OMAP SoC:: diff --git a/dts/Bindings/input/touchscreen/bu21013.txt b/dts/Bindings/input/touchscreen/bu21013.txt index 56d835242a..da4c9d8b99 100644 --- a/dts/Bindings/input/touchscreen/bu21013.txt +++ b/dts/Bindings/input/touchscreen/bu21013.txt @@ -2,11 +2,24 @@ Required properties: - compatible : "rohm,bu21013_tp" - - reg : I2C device address + - reg : I2C device address + - reset-gpios : GPIO pin enabling (selecting) chip (CS) + - interrupt-parent : the phandle for the gpio controller + - interrupts : (gpio) interrupt to which the chip is connected Optional properties: - - touch-gpio : GPIO pin registering a touch event + - touch-gpios : GPIO pin registering a touch event - <supply_name>-supply : Phandle to a regulator supply + - touchscreen-size-x : General touchscreen binding, see [1]. + - touchscreen-size-y : General touchscreen binding, see [1]. + - touchscreen-inverted-x : General touchscreen binding, see [1]. + - touchscreen-inverted-y : General touchscreen binding, see [1]. + - touchscreen-swapped-x-y : General touchscreen binding, see [1]. + +[1] All general touchscreen properties are described in + Documentation/devicetree/bindings/input/touchscreen/touchscreen.txt. + +Deprecated properties: - rohm,touch-max-x : Maximum outward permitted limit in the X axis - rohm,touch-max-y : Maximum outward permitted limit in the Y axis - rohm,flip-x : Flip touch coordinates on the X axis @@ -18,11 +31,13 @@ Example: bu21013_tp@5c { compatible = "rohm,bu21013_tp"; reg = <0x5c>; - touch-gpio = <&gpio2 20 0x4>; + interrupt-parent = <&gpio2>; + interrupts <&20 IRQ_TYPE_LEVEL_LOW>; + touch-gpio = <&gpio2 20 GPIO_ACTIVE_LOW>; avdd-supply = <&ab8500_ldo_aux1_reg>; - rohm,touch-max-x = <384>; - rohm,touch-max-y = <704>; - rohm,flip-y; + touchscreen-size-x = <384>; + touchscreen-size-y = <704>; + touchscreen-inverted-y; }; }; diff --git a/dts/Bindings/interconnect/qcom,qcs404.txt b/dts/Bindings/interconnect/qcom,qcs404.txt new file mode 100644 index 0000000000..c07d89812b --- /dev/null +++ b/dts/Bindings/interconnect/qcom,qcs404.txt @@ -0,0 +1,45 @@ +Qualcomm QCS404 Network-On-Chip interconnect driver binding +----------------------------------------------------------- + +Required properties : +- compatible : shall contain only one of the following: + "qcom,qcs404-bimc" + "qcom,qcs404-pcnoc" + "qcom,qcs404-snoc" +- #interconnect-cells : should contain 1 + +reg : specifies the physical base address and size of registers +clocks : list of phandles and specifiers to all interconnect bus clocks +clock-names : clock names should include both "bus" and "bus_a" + +Example: + +soc { + ... + bimc: interconnect@400000 { + reg = <0x00400000 0x80000>; + compatible = "qcom,qcs404-bimc"; + #interconnect-cells = <1>; + clock-names = "bus", "bus_a"; + clocks = <&rpmcc RPM_SMD_BIMC_CLK>, + <&rpmcc RPM_SMD_BIMC_A_CLK>; + }; + + pnoc: interconnect@500000 { + reg = <0x00500000 0x15080>; + compatible = "qcom,qcs404-pcnoc"; + #interconnect-cells = <1>; + clock-names = "bus", "bus_a"; + clocks = <&rpmcc RPM_SMD_PNOC_CLK>, + <&rpmcc RPM_SMD_PNOC_A_CLK>; + }; + + snoc: interconnect@580000 { + reg = <0x00580000 0x23080>; + compatible = "qcom,qcs404-snoc"; + #interconnect-cells = <1>; + clock-names = "bus", "bus_a"; + clocks = <&rpmcc RPM_SMD_SNOC_CLK>, + <&rpmcc RPM_SMD_SNOC_A_CLK>; + }; +}; diff --git a/dts/Bindings/interrupt-controller/allwinner,sun4i-a10-ic.yaml b/dts/Bindings/interrupt-controller/allwinner,sun4i-a10-ic.yaml new file mode 100644 index 0000000000..23a202d24e --- /dev/null +++ b/dts/Bindings/interrupt-controller/allwinner,sun4i-a10-ic.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/allwinner,sun4i-a10-ic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner A10 Interrupt Controller Device Tree Bindings + +maintainers: + - Chen-Yu Tsai <wens@csie.org> + - Maxime Ripard <maxime.ripard@bootlin.com> + +allOf: + - $ref: /schemas/interrupt-controller.yaml# + +properties: + "#interrupt-cells": + const: 1 + + compatible: + enum: + - allwinner,sun4i-a10-ic + - allwinner,suniv-f1c100s-ic + + reg: + maxItems: 1 + + interrupt-controller: true + +required: + - "#interrupt-cells" + - compatible + - reg + - interrupt-controller + +additionalProperties: false + +examples: + - | + intc: interrupt-controller@1c20400 { + compatible = "allwinner,sun4i-a10-ic"; + reg = <0x01c20400 0x400>; + interrupt-controller; + #interrupt-cells = <1>; + }; + +... diff --git a/dts/Bindings/interrupt-controller/allwinner,sun4i-ic.txt b/dts/Bindings/interrupt-controller/allwinner,sun4i-ic.txt deleted file mode 100644 index 404352524c..0000000000 --- a/dts/Bindings/interrupt-controller/allwinner,sun4i-ic.txt +++ /dev/null @@ -1,20 +0,0 @@ -Allwinner Sunxi Interrupt Controller - -Required properties: - -- compatible : should be one of the following: - "allwinner,sun4i-a10-ic" - "allwinner,suniv-f1c100s-ic" -- reg : Specifies base physical address and size of the registers. -- interrupt-controller : Identifies the node as an interrupt controller -- #interrupt-cells : Specifies the number of cells needed to encode an - interrupt source. The value shall be 1. - -Example: - -intc: interrupt-controller { - compatible = "allwinner,sun4i-a10-ic"; - reg = <0x01c20400 0x400>; - interrupt-controller; - #interrupt-cells = <1>; -}; diff --git a/dts/Bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml b/dts/Bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml new file mode 100644 index 0000000000..0eccf55517 --- /dev/null +++ b/dts/Bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml @@ -0,0 +1,70 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner A20 Non-Maskable Interrupt Controller Device Tree Bindings + +maintainers: + - Chen-Yu Tsai <wens@csie.org> + - Maxime Ripard <maxime.ripard@bootlin.com> + +allOf: + - $ref: /schemas/interrupt-controller.yaml# + +properties: + "#interrupt-cells": + const: 2 + description: + The first cell is the IRQ number, the second cell the trigger + type as defined in interrupt.txt in this directory. + + compatible: + oneOf: + - const: allwinner,sun6i-a31-r-intc + - const: allwinner,sun6i-a31-sc-nmi + deprecated: true + - const: allwinner,sun7i-a20-sc-nmi + - items: + - const: allwinner,sun8i-a83t-r-intc + - const: allwinner,sun6i-a31-r-intc + - const: allwinner,sun9i-a80-sc-nmi + - items: + - const: allwinner,sun50i-a64-r-intc + - const: allwinner,sun6i-a31-r-intc + - items: + - const: allwinner,sun50i-h6-r-intc + - const: allwinner,sun6i-a31-r-intc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + interrupt-controller: true + +required: + - "#interrupt-cells" + - compatible + - reg + - interrupts + - interrupt-controller + +# FIXME: We should set it, but it would report all the generic +# properties as additional properties. +# additionalProperties: false + +examples: + - | + interrupt-controller@1c00030 { + compatible = "allwinner,sun7i-a20-sc-nmi"; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x01c00030 0x0c>; + interrupt-parent = <&gic>; + interrupts = <0 0 4>; + }; + +... diff --git a/dts/Bindings/interrupt-controller/allwinner,sunxi-nmi.txt b/dts/Bindings/interrupt-controller/allwinner,sunxi-nmi.txt deleted file mode 100644 index 24beadf7ba..0000000000 --- a/dts/Bindings/interrupt-controller/allwinner,sunxi-nmi.txt +++ /dev/null @@ -1,29 +0,0 @@ -Allwinner Sunxi NMI Controller -============================== - -Required properties: - -- compatible : should be one of the following: - - "allwinner,sun7i-a20-sc-nmi" - - "allwinner,sun6i-a31-sc-nmi" (deprecated) - - "allwinner,sun6i-a31-r-intc" - - "allwinner,sun9i-a80-nmi" -- reg : Specifies base physical address and size of the registers. -- interrupt-controller : Identifies the node as an interrupt controller -- #interrupt-cells : Specifies the number of cells needed to encode an - interrupt source. The value shall be 2. The first cell is the IRQ number, the - second cell the trigger type as defined in interrupt.txt in this directory. -- interrupts: Specifies the interrupt line (NMI) which is handled by - the interrupt controller in the parent controller's notation. This value - shall be the NMI. - -Example: - -sc-nmi-intc@1c00030 { - compatible = "allwinner,sun7i-a20-sc-nmi"; - interrupt-controller; - #interrupt-cells = <2>; - reg = <0x01c00030 0x0c>; - interrupt-parent = <&gic>; - interrupts = <0 0 4>; -}; diff --git a/dts/Bindings/interrupt-controller/amlogic,meson-gpio-intc.txt b/dts/Bindings/interrupt-controller/amlogic,meson-gpio-intc.txt index 7d531d5fff..684bb1cd75 100644 --- a/dts/Bindings/interrupt-controller/amlogic,meson-gpio-intc.txt +++ b/dts/Bindings/interrupt-controller/amlogic,meson-gpio-intc.txt @@ -16,6 +16,7 @@ Required properties: "amlogic,meson-gxl-gpio-intc" for GXL SoCs (S905X, S912) "amlogic,meson-axg-gpio-intc" for AXG SoCs (A113D, A113X) "amlogic,meson-g12a-gpio-intc" for G12A SoCs (S905D2, S905X2, S905Y2) + "amlogic,meson-sm1-gpio-intc" for SM1 SoCs (S905D3, S905X3, S905Y3) - reg : Specifies base physical address and size of the registers. - interrupt-controller : Identifies the node as an interrupt controller. - #interrupt-cells : Specifies the number of cells needed to encode an diff --git a/dts/Bindings/interrupt-controller/arm,gic-v3.yaml b/dts/Bindings/interrupt-controller/arm,gic-v3.yaml index c34df35a25..1fe147daca 100644 --- a/dts/Bindings/interrupt-controller/arm,gic-v3.yaml +++ b/dts/Bindings/interrupt-controller/arm,gic-v3.yaml @@ -44,11 +44,13 @@ properties: be at least 4. The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI - interrupts. Other values are reserved for future use. + interrupts, 2 for interrupts in the Extended SPI range, 3 for the + Extended PPI range. Other values are reserved for future use. The 2nd cell contains the interrupt number for the interrupt type. SPI interrupts are in the range [0-987]. PPI interrupts are in the - range [0-15]. + range [0-15]. Extented SPI interrupts are in the range [0-1023]. + Extended PPI interrupts are in the range [0-127]. The 3rd cell is the flags, encoded as follows: bits[3:0] trigger type and level flags. diff --git a/dts/Bindings/interrupt-controller/interrupts.txt b/dts/Bindings/interrupt-controller/interrupts.txt index 8a3c408298..4a3ee253f7 100644 --- a/dts/Bindings/interrupt-controller/interrupts.txt +++ b/dts/Bindings/interrupt-controller/interrupts.txt @@ -22,10 +22,10 @@ controller node. This property is inherited, so it may be specified in an interrupt client node or in any of its parent nodes. Interrupts listed in the "interrupts" property are always in reference to the node's interrupt parent. -The "interrupts-extended" property is a special form for use when a node needs -to reference multiple interrupt parents. Each entry in this property contains -both the parent phandle and the interrupt specifier. "interrupts-extended" -should only be used when a device has multiple interrupt parents. +The "interrupts-extended" property is a special form; useful when a node needs +to reference multiple interrupt parents or a different interrupt parent than +the inherited one. Each entry in this property contains both the parent phandle +and the interrupt specifier. Example: interrupts-extended = <&intc1 5 1>, <&intc2 1 0>; diff --git a/dts/Bindings/interrupt-controller/mediatek,sysirq.txt b/dts/Bindings/interrupt-controller/mediatek,sysirq.txt index 0e312fea2a..84ced3f417 100644 --- a/dts/Bindings/interrupt-controller/mediatek,sysirq.txt +++ b/dts/Bindings/interrupt-controller/mediatek,sysirq.txt @@ -15,6 +15,7 @@ Required properties: "mediatek,mt7629-sysirq", "mediatek,mt6577-sysirq": for MT7629 "mediatek,mt6795-sysirq", "mediatek,mt6577-sysirq": for MT6795 "mediatek,mt6797-sysirq", "mediatek,mt6577-sysirq": for MT6797 + "mediatek,mt6779-sysirq", "mediatek,mt6577-sysirq": for MT6779 "mediatek,mt6765-sysirq", "mediatek,mt6577-sysirq": for MT6765 "mediatek,mt6755-sysirq", "mediatek,mt6577-sysirq": for MT6755 "mediatek,mt6592-sysirq", "mediatek,mt6577-sysirq": for MT6592 diff --git a/dts/Bindings/iommu/mediatek,iommu.txt b/dts/Bindings/iommu/mediatek,iommu.txt index 6922db598d..ce59a505f5 100644 --- a/dts/Bindings/iommu/mediatek,iommu.txt +++ b/dts/Bindings/iommu/mediatek,iommu.txt @@ -11,10 +11,23 @@ ARM Short-Descriptor translation table format for address translation. | m4u (Multimedia Memory Management Unit) | + +--------+ + | | + gals0-rx gals1-rx (Global Async Local Sync rx) + | | + | | + gals0-tx gals1-tx (Global Async Local Sync tx) + | | Some SoCs may have GALS. + +--------+ + | SMI Common(Smart Multimedia Interface Common) | +----------------+------- | | + | gals-rx There may be GALS in some larbs. + | | + | | + | gals-tx | | SMI larb0 SMI larb1 ... SoCs have several SMI local arbiter(larb). (display) (vdec) @@ -36,6 +49,10 @@ each local arbiter. like display, video decode, and camera. And there are different ports in each larb. Take a example, There are many ports like MC, PP, VLD in the video decode local arbiter, all these ports are according to the video HW. + In some SoCs, there may be a GALS(Global Async Local Sync) module between +smi-common and m4u, and additional GALS module between smi-larb and +smi-common. GALS can been seen as a "asynchronous fifo" which could help +synchronize for the modules in different clock frequency. Required properties: - compatible : must be one of the following string: @@ -44,18 +61,25 @@ Required properties: "mediatek,mt7623-m4u", "mediatek,mt2701-m4u" for mt7623 which uses generation one m4u HW. "mediatek,mt8173-m4u" for mt8173 which uses generation two m4u HW. + "mediatek,mt8183-m4u" for mt8183 which uses generation two m4u HW. - reg : m4u register base and size. - interrupts : the interrupt of m4u. - clocks : must contain one entry for each clock-names. -- clock-names : must be "bclk", It is the block clock of m4u. +- clock-names : Only 1 optional clock: + - "bclk": the block clock of m4u. + Here is the list which require this "bclk": + - mt2701, mt2712, mt7623 and mt8173. + Note that m4u use the EMI clock which always has been enabled before kernel + if there is no this "bclk". - mediatek,larbs : List of phandle to the local arbiters in the current Socs. Refer to bindings/memory-controllers/mediatek,smi-larb.txt. It must sort according to the local arbiter index, like larb0, larb1, larb2... - iommu-cells : must be 1. This is the mtk_m4u_id according to the HW. Specifies the mtk_m4u_id as defined in dt-binding/memory/mt2701-larb-port.h for mt2701, mt7623 - dt-binding/memory/mt2712-larb-port.h for mt2712, and - dt-binding/memory/mt8173-larb-port.h for mt8173. + dt-binding/memory/mt2712-larb-port.h for mt2712, + dt-binding/memory/mt8173-larb-port.h for mt8173, and + dt-binding/memory/mt8183-larb-port.h for mt8183. Example: iommu: iommu@10205000 { diff --git a/dts/Bindings/leds/ams,as3645a.txt b/dts/Bindings/leds/ams,as3645a.txt index fdc40e354a..4af2987b25 100644 --- a/dts/Bindings/leds/ams,as3645a.txt +++ b/dts/Bindings/leds/ams,as3645a.txt @@ -39,7 +39,9 @@ ams,input-max-microamp: Maximum flash controller input current. The Optional properties of the flash child node =========================================== -label : The label of the flash LED. +function : See Documentation/devicetree/bindings/leds/common.txt. +color : See Documentation/devicetree/bindings/leds/common.txt. +label : See Documentation/devicetree/bindings/leds/common.txt (deprecated). Required properties of the indicator child node (1) @@ -52,28 +54,32 @@ led-max-microamp: Maximum indicator current. The allowed values are Optional properties of the indicator child node =============================================== -label : The label of the indicator LED. +function : See Documentation/devicetree/bindings/leds/common.txt. +color : See Documentation/devicetree/bindings/leds/common.txt. +label : See Documentation/devicetree/bindings/leds/common.txt (deprecated). Example ======= +#include <dt-bindings/leds/common.h> + as3645a@30 { - #address-cells: 1 - #size-cells: 0 + #address-cells = <1>; + #size-cells = <0>; reg = <0x30>; compatible = "ams,as3645a"; - flash@0 { + led@0 { reg = <0x0>; flash-timeout-us = <150000>; flash-max-microamp = <320000>; led-max-microamp = <60000>; ams,input-max-microamp = <1750000>; - label = "as3645a:flash"; + function = LED_FUNCTION_FLASH; }; - indicator@1 { + led@1 { reg = <0x1>; led-max-microamp = <10000>; - label = "as3645a:indicator"; + function = LED_FUNCTION_INDICATOR; }; }; diff --git a/dts/Bindings/leds/common.txt b/dts/Bindings/leds/common.txt index 70876ac113..9fa6f9795d 100644 --- a/dts/Bindings/leds/common.txt +++ b/dts/Bindings/leds/common.txt @@ -10,14 +10,30 @@ can influence the way of the LED device initialization, the LED components have to be tightly coupled with the LED device binding. They are represented by child nodes of the parent LED device binding. + Optional properties for child nodes: - led-sources : List of device current outputs the LED is connected to. The outputs are identified by the numbers that must be defined in the LED device binding documentation. + +- function: LED functon. Use one of the LED_FUNCTION_* prefixed definitions + from the header include/dt-bindings/leds/common.h. + If there is no matching LED_FUNCTION available, add a new one. + +- color : Color of the LED. Use one of the LED_COLOR_ID_* prefixed definitions + from the header include/dt-bindings/leds/common.h. + If there is no matching LED_COLOR_ID available, add a new one. + +- function-enumerator: Integer to be used when more than one instance + of the same function is needed, differing only with + an ordinal number. + - label : The label for this LED. If omitted, the label is taken from the node name (excluding the unit address). It has to uniquely identify a device, i.e. no other LED class device can be assigned the same - label. + label. This property is deprecated - use 'function' and 'color' + properties instead. function-enumerator has no effect when this + property is present. - default-state : The initial state of the LED. Valid values are "on", "off", and "keep". If the LED is already on or off and the default-state property is @@ -99,29 +115,59 @@ Required properties for trigger source: * Examples -gpio-leds { +#include <dt-bindings/leds/common.h> + +led-controller@0 { compatible = "gpio-leds"; - system-status { - label = "Status"; + led0 { + function = LED_FUNCTION_STATUS; linux,default-trigger = "heartbeat"; gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>; }; - usb { + led1 { + function = LED_FUNCTION_USB; gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>; trigger-sources = <&ohci_port1>, <&ehci_port1>; }; }; -max77693-led { +led-controller@0 { compatible = "maxim,max77693-led"; - camera-flash { - label = "Flash"; + led { + function = LED_FUNCTION_FLASH; + color = <LED_COLOR_ID_WHITE>; led-sources = <0>, <1>; led-max-microamp = <50000>; flash-max-microamp = <320000>; flash-max-timeout-us = <500000>; }; }; + +led-controller@30 { + compatible = "panasonic,an30259a"; + reg = <0x30>; + #address-cells = <1>; + #size-cells = <0>; + + led@1 { + reg = <1>; + linux,default-trigger = "heartbeat"; + function = LED_FUNCTION_INDICATOR; + function-enumerator = <1>; + }; + + led@2 { + reg = <2>; + function = LED_FUNCTION_INDICATOR; + function-enumerator = <2>; + }; + + led@3 { + reg = <3>; + function = LED_FUNCTION_INDICATOR; + function-enumerator = <3>; + }; +}; diff --git a/dts/Bindings/leds/leds-aat1290.txt b/dts/Bindings/leds/leds-aat1290.txt index 85c0c58617..62ed17ec07 100644 --- a/dts/Bindings/leds/leds-aat1290.txt +++ b/dts/Bindings/leds/leds-aat1290.txt @@ -32,15 +32,18 @@ Required properties of the LED child node: formula: T = 8.82 * 10^9 * Ct. Optional properties of the LED child node: -- label : see Documentation/devicetree/bindings/leds/common.txt +- function : see Documentation/devicetree/bindings/leds/common.txt +- color : see Documentation/devicetree/bindings/leds/common.txt +- label : see Documentation/devicetree/bindings/leds/common.txt (deprecated) Example (by Ct = 220nF, Rset = 160kohm and exynos4412-trats2 board with a switch that allows for routing strobe signal either from the host or from the camera sensor): #include "exynos4412.dtsi" +#include <dt-bindings/leds/common.h> -aat1290 { +led-controller { compatible = "skyworks,aat1290"; flen-gpios = <&gpj1 1 GPIO_ACTIVE_HIGH>; enset-gpios = <&gpj1 2 GPIO_ACTIVE_HIGH>; @@ -50,8 +53,9 @@ aat1290 { pinctrl-1 = <&camera_flash_host>; pinctrl-2 = <&camera_flash_isp>; - camera_flash: flash-led { - label = "aat1290-flash"; + camera_flash: led { + function = LED_FUNCTION_FLASH; + color = <LED_COLOR_ID_WHITE>; led-max-microamp = <520833>; flash-max-microamp = <1012500>; flash-max-timeout-us = <1940000>; diff --git a/dts/Bindings/leds/leds-an30259a.txt b/dts/Bindings/leds/leds-an30259a.txt index 6ffb861083..cbd833906b 100644 --- a/dts/Bindings/leds/leds-an30259a.txt +++ b/dts/Bindings/leds/leds-an30259a.txt @@ -15,10 +15,19 @@ Required sub-node properties: - reg: Pin that the LED is connected to. Must be 1, 2, or 3. Optional sub-node properties: - - label: see Documentation/devicetree/bindings/leds/common.txt - - linux,default-trigger: see Documentation/devicetree/bindings/leds/common.txt + - function : + see Documentation/devicetree/bindings/leds/common.txt + - color : + see Documentation/devicetree/bindings/leds/common.txt + - label : + see Documentation/devicetree/bindings/leds/common.txt (deprecated) + - linux,default-trigger : + see Documentation/devicetree/bindings/leds/common.txt Example: + +#include <dt-bindings/leds/common.h> + led-controller@30 { compatible = "panasonic,an30259a"; reg = <0x30>; @@ -28,16 +37,19 @@ led-controller@30 { led@1 { reg = <1>; linux,default-trigger = "heartbeat"; - label = "red:indicator"; + function = LED_FUNCTION_INDICATOR; + color = <LED_COLOR_ID_RED>; }; led@2 { reg = <2>; - label = "green:indicator"; + function = LED_FUNCTION_INDICATOR; + color = <LED_COLOR_ID_GREEN>; }; led@3 { reg = <3>; - label = "blue:indicator"; + function = LED_FUNCTION_INDICATOR; + color = <LED_COLOR_ID_BLUE>; }; }; diff --git a/dts/Bindings/leds/leds-cr0014114.txt b/dts/Bindings/leds/leds-cr0014114.txt index 4255b19ad2..f8de7516a3 100644 --- a/dts/Bindings/leds/leds-cr0014114.txt +++ b/dts/Bindings/leds/leds-cr0014114.txt @@ -11,14 +11,20 @@ Property rules described in Documentation/devicetree/bindings/spi/spi-bus.txt apply. In particular, "reg" and "spi-max-frequency" properties must be given. LED sub-node properties: -- label : +- function : + see Documentation/devicetree/bindings/leds/common.txt +- color : see Documentation/devicetree/bindings/leds/common.txt +- label : + see Documentation/devicetree/bindings/leds/common.txt (deprecated) - linux,default-trigger : (optional) see Documentation/devicetree/bindings/leds/common.txt Example ------- +#include <dt-bindings/leds/common.h> + led-controller@0 { compatible = "crane,cr0014114"; reg = <0>; @@ -28,27 +34,33 @@ led-controller@0 { led@0 { reg = <0>; - label = "red:coin"; + function = "coin"; + color = <LED_COLOR_ID_RED>; }; led@1 { reg = <1>; - label = "green:coin"; + function = "coin"; + color = <LED_COLOR_ID_GREEN>; }; led@2 { reg = <2>; - label = "blue:coin"; + function = "coin"; + color = <LED_COLOR_ID_BLUE>; }; led@3 { reg = <3>; - label = "red:bill"; + function = "bill"; + color = <LED_COLOR_ID_RED>; }; led@4 { reg = <4>; - label = "green:bill"; + function = "bill"; + color = <LED_COLOR_ID_GREEN>; }; led@5 { reg = <5>; - label = "blue:bill"; + function = "bill"; + color = <LED_COLOR_ID_BLUE>; }; ... }; diff --git a/dts/Bindings/leds/leds-gpio.txt b/dts/Bindings/leds/leds-gpio.txt index a48dda268f..d21281b63d 100644 --- a/dts/Bindings/leds/leds-gpio.txt +++ b/dts/Bindings/leds/leds-gpio.txt @@ -10,8 +10,12 @@ LED sub-node properties: - gpios : Should specify the LED's GPIO, see "gpios property" in Documentation/devicetree/bindings/gpio/gpio.txt. Active low LEDs should be indicated using flags in the GPIO specifier. -- label : (optional) +- function : (optional) + see Documentation/devicetree/bindings/leds/common.txt +- color : (optional) see Documentation/devicetree/bindings/leds/common.txt +- label : (optional) + see Documentation/devicetree/bindings/leds/common.txt (deprecated) - linux,default-trigger : (optional) see Documentation/devicetree/bindings/leds/common.txt - default-state: (optional) The initial state of the LED. @@ -27,30 +31,34 @@ LED sub-node properties: Examples: #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/leds/common.h> leds { compatible = "gpio-leds"; - hdd { - label = "Disk Activity"; + led0 { gpios = <&mcu_pio 0 GPIO_ACTIVE_LOW>; linux,default-trigger = "disk-activity"; + function = LED_FUNCTION_DISK; }; - fault { + led1 { gpios = <&mcu_pio 1 GPIO_ACTIVE_HIGH>; /* Keep LED on if BIOS detected hardware fault */ default-state = "keep"; + function = LED_FUNCTION_FAULT; }; }; run-control { compatible = "gpio-leds"; - red { + led0 { gpios = <&mpc8572 6 GPIO_ACTIVE_HIGH>; + color = <LED_COLOR_ID_RED>; default-state = "off"; }; - green { + led1 { gpios = <&mpc8572 7 GPIO_ACTIVE_HIGH>; + color = <LED_COLOR_ID_GREEN>; default-state = "on"; }; }; @@ -58,9 +66,10 @@ run-control { leds { compatible = "gpio-leds"; - charger-led { + led0 { gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; linux,default-trigger = "max8903-charger-charging"; retain-state-suspended; + function = LED_FUNCTION_CHARGE; }; }; diff --git a/dts/Bindings/leds/leds-lm3532.txt b/dts/Bindings/leds/leds-lm3532.txt index c087f85ddd..53793213dd 100644 --- a/dts/Bindings/leds/leds-lm3532.txt +++ b/dts/Bindings/leds/leds-lm3532.txt @@ -62,6 +62,9 @@ Optional LED child properties: - label : see Documentation/devicetree/bindings/leds/common.txt - linux,default-trigger : see Documentation/devicetree/bindings/leds/common.txt + - led-max-microamp : Defines the full scale current value for each control + bank. The range is from 5000uA-29800uA in increments + of 800uA. Example: led-controller@38 { @@ -85,6 +88,7 @@ led-controller@38 { reg = <0>; led-sources = <2>; ti,led-mode = <1>; + led-max-microamp = <21800>; label = ":backlight"; linux,default-trigger = "backlight"; }; diff --git a/dts/Bindings/leds/leds-lm3601x.txt b/dts/Bindings/leds/leds-lm3601x.txt index a88b2c41e7..095dafb6ec 100644 --- a/dts/Bindings/leds/leds-lm3601x.txt +++ b/dts/Bindings/leds/leds-lm3601x.txt @@ -22,9 +22,14 @@ Required properties for flash LED child nodes: - led-max-microamp : Range from 2.4mA - 376mA Optional child properties: - - label : see Documentation/devicetree/bindings/leds/common.txt + - function : see Documentation/devicetree/bindings/leds/common.txt + - color : see Documentation/devicetree/bindings/leds/common.txt + - label : see Documentation/devicetree/bindings/leds/common.txt (deprecated) Example: + +#include <dt-bindings/leds/common.h> + led-controller@64 { compatible = "ti,lm36010"; #address-cells = <1>; @@ -33,7 +38,8 @@ led-controller@64 { led@0 { reg = <1>; - label = "white:torch"; + function = LED_FUNCTION_TORCH; + color = <LED_COLOR_ID_WHITE>; led-max-microamp = <376000>; flash-max-microamp = <1500000>; flash-max-timeout-us = <1600000>; diff --git a/dts/Bindings/leds/leds-lm3692x.txt b/dts/Bindings/leds/leds-lm3692x.txt index 08b352840b..4c2d923f87 100644 --- a/dts/Bindings/leds/leds-lm3692x.txt +++ b/dts/Bindings/leds/leds-lm3692x.txt @@ -26,12 +26,16 @@ Required child properties: 3 - Will enable the LED3 sync (LM36923 only) Optional child properties: - - label : see Documentation/devicetree/bindings/leds/common.txt + - function : see Documentation/devicetree/bindings/leds/common.txt + - color : see Documentation/devicetree/bindings/leds/common.txt + - label : see Documentation/devicetree/bindings/leds/common.txt (deprecated) - linux,default-trigger : see Documentation/devicetree/bindings/leds/common.txt Example: +#include <dt-bindings/leds/common.h> + led-controller@36 { compatible = "ti,lm3692x"; reg = <0x36>; @@ -43,7 +47,8 @@ led-controller@36 { led@0 { reg = <0>; - label = "white:backlight_cluster"; + function = LED_FUNCTION_BACKLIGHT; + color = <LED_COLOR_ID_WHITE>; linux,default-trigger = "backlight"; }; } diff --git a/dts/Bindings/leds/leds-lp8860.txt b/dts/Bindings/leds/leds-lp8860.txt index 5f0e892ad7..9863220db4 100644 --- a/dts/Bindings/leds/leds-lp8860.txt +++ b/dts/Bindings/leds/leds-lp8860.txt @@ -20,12 +20,16 @@ Required child properties: - reg : 0 Optional child properties: - - label : see Documentation/devicetree/bindings/leds/common.txt + - function : see Documentation/devicetree/bindings/leds/common.txt + - color : see Documentation/devicetree/bindings/leds/common.txt + - label : see Documentation/devicetree/bindings/leds/common.txt (deprecated) - linux,default-trigger : see Documentation/devicetree/bindings/leds/common.txt Example: +#include <dt-bindings/leds/common.h> + led-controller@2d { compatible = "ti,lp8860"; #address-cells = <1>; @@ -36,7 +40,8 @@ led-controller@2d { led@0 { reg = <0>; - label = "white:backlight"; + function = LED_FUNCTION_BACKLIGHT; + color = <LED_COLOR_ID_WHITE>; linux,default-trigger = "backlight"; }; } diff --git a/dts/Bindings/leds/leds-lt3593.txt b/dts/Bindings/leds/leds-lt3593.txt index 6b2cabc36c..24eccdaa63 100644 --- a/dts/Bindings/leds/leds-lt3593.txt +++ b/dts/Bindings/leds/leds-lt3593.txt @@ -9,8 +9,10 @@ The hardware supports only one LED. The properties of this LED are configured in a sub-node in the device node. Optional sub-node properties: -- label: A label for the LED. If none is given, the LED will be - named "lt3595::". +- function: See Documentation/devicetree/bindings/leds/common.txt +- color: See Documentation/devicetree/bindings/leds/common.txt +- label: A label for the LED. If none is given, the LED will be + named "lt3595::" (deprecated) - linux,default-trigger: The default trigger for the LED. See Documentation/devicetree/bindings/leds/common.txt - default-state: The initial state of the LED. @@ -21,12 +23,15 @@ be handled by its own device node. Example: +#include <dt-bindings/leds/common.h> + led-controller { compatible = "lltc,lt3593"; lltc,ctrl-gpios = <&gpio 0 GPIO_ACTIVE_HIGH>; led { - label = "white:backlight"; + function = LED_FUNCTION_BACKLIGHT; + color = <LED_COLOR_ID_WHITE>; default-state = "on"; }; }; diff --git a/dts/Bindings/leds/leds-sc27xx-bltc.txt b/dts/Bindings/leds/leds-sc27xx-bltc.txt index dddf84f9c7..df2b4e1c49 100644 --- a/dts/Bindings/leds/leds-sc27xx-bltc.txt +++ b/dts/Bindings/leds/leds-sc27xx-bltc.txt @@ -14,7 +14,9 @@ Required child properties: - reg: Port this LED is connected to. Optional child properties: -- label: See Documentation/devicetree/bindings/leds/common.txt. +- function: See Documentation/devicetree/bindings/leds/common.txt. +- color: See Documentation/devicetree/bindings/leds/common.txt. +- label: See Documentation/devicetree/bindings/leds/common.txt (deprecated). Examples: @@ -25,17 +27,17 @@ led-controller@200 { reg = <0x200>; led@0 { - label = "red"; + color = <LED_COLOR_ID_RED>; reg = <0x0>; }; led@1 { - label = "green"; + color = <LED_COLOR_ID_GREEN>; reg = <0x1>; }; led@2 { - label = "blue"; + color = <LED_COLOR_ID_BLUE>; reg = <0x2>; }; }; diff --git a/dts/Bindings/mailbox/amlogic,meson-gxbb-mhu.yaml b/dts/Bindings/mailbox/amlogic,meson-gxbb-mhu.yaml new file mode 100644 index 0000000000..3192805636 --- /dev/null +++ b/dts/Bindings/mailbox/amlogic,meson-gxbb-mhu.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019 BayLibre, SAS +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/mailbox/amlogic,meson-gxbb-mhu.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Amlogic Meson Message-Handling-Unit Controller + +maintainers: + - Neil Armstrong <narmstrong@baylibre.com> + +description: | + The Amlogic's Meson SoCs Message-Handling-Unit (MHU) is a mailbox controller + that has 3 independent channels/links to communicate with remote processor(s). + MHU links are hardwired on a platform. A link raises interrupt for any + received data. However, there is no specified way of knowing if the sent + data has been read by the remote. This driver assumes the sender polls + STAT register and the remote clears it after having read the data. + +properties: + compatible: + enum: + - amlogic,meson-gxbb-mhu + + reg: + maxItems: 1 + + interrupts: + minItems: 3 + description: + Contains the interrupt information corresponding to each of the 3 links + of MHU. + + "#mbox-cells": + const: 1 + +required: + - compatible + - reg + - interrupts + - "#mbox-cells" + +examples: + - | + mailbox@c883c404 { + compatible = "amlogic,meson-gxbb-mhu"; + reg = <0xc883c404 0x4c>; + interrupts = <208>, <209>, <210>; + #mbox-cells = <1>; + }; + diff --git a/dts/Bindings/mailbox/meson-mhu.txt b/dts/Bindings/mailbox/meson-mhu.txt deleted file mode 100644 index a530310772..0000000000 --- a/dts/Bindings/mailbox/meson-mhu.txt +++ /dev/null @@ -1,34 +0,0 @@ -Amlogic Meson MHU Mailbox Driver -================================ - -The Amlogic's Meson SoCs Message-Handling-Unit (MHU) is a mailbox controller -that has 3 independent channels/links to communicate with remote processor(s). -MHU links are hardwired on a platform. A link raises interrupt for any -received data. However, there is no specified way of knowing if the sent -data has been read by the remote. This driver assumes the sender polls -STAT register and the remote clears it after having read the data. - -Mailbox Device Node: -==================== - -Required properties: --------------------- -- compatible: Shall be "amlogic,meson-gxbb-mhu" -- reg: Contains the mailbox register address range (base - address and length) -- #mbox-cells Shall be 1 - the index of the channel needed. -- interrupts: Contains the interrupt information corresponding to - each of the 2 links of MHU. - -Example: --------- - - mailbox: mailbox@c883c404 { - #mbox-cells = <1>; - compatible = "amlogic,meson-gxbb-mhu"; - reg = <0 0xc883c404 0 0x4c>; - interrupts = <0 208 IRQ_TYPE_EDGE_RISING>, - <0 209 IRQ_TYPE_EDGE_RISING>, - <0 210 IRQ_TYPE_EDGE_RISING>; - #mbox-cells = <1>; - }; diff --git a/dts/Bindings/mailbox/mtk-gce.txt b/dts/Bindings/mailbox/mtk-gce.txt index 7d72b21c9e..7b13787ab1 100644 --- a/dts/Bindings/mailbox/mtk-gce.txt +++ b/dts/Bindings/mailbox/mtk-gce.txt @@ -9,7 +9,7 @@ CMDQ driver uses mailbox framework for communication. Please refer to mailbox.txt for generic information about mailbox device-tree bindings. Required properties: -- compatible: Must be "mediatek,mt8173-gce" +- compatible: can be "mediatek,mt8173-gce" or "mediatek,mt8183-gce" - reg: Address range of the GCE unit - interrupts: The interrupt signal from the GCE block - clock: Clocks according to the common clock binding @@ -25,11 +25,19 @@ Required properties: Required properties for a client device: - mboxes: Client use mailbox to communicate with GCE, it should have this property and list of phandle, mailbox specifiers. -- mediatek,gce-subsys: u32, specify the sub-system id which is corresponding - to the register address. +Optional properties for a client device: +- mediatek,gce-client-reg: Specify the sub-system id which is corresponding + to the register address, it should have this property and list of phandle, + sub-system specifiers. + <&phandle subsys_number start_offset size> + phandle: Label name of a gce node. + subsys_number: specify the sub-system id which is corresponding + to the register address. + start_offset: the start offset of register address that GCE can access. + size: the total size of register address that GCE can access. -Some vaules of properties are defined in 'dt-bindings/gce/mt8173-gce.h'. Such as -sub-system ids, thread priority, event ids. +Some vaules of properties are defined in 'dt-bindings/gce/mt8173-gce.h' +or 'dt-binding/gce/mt8183-gce.h'. Such as sub-system ids, thread priority, event ids. Example: @@ -39,7 +47,6 @@ Example: interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_LOW>; clocks = <&infracfg CLK_INFRA_GCE>; clock-names = "gce"; - thread-num = CMDQ_THR_MAX_COUNT; #mbox-cells = <3>; }; @@ -49,9 +56,9 @@ Example for a client device: compatible = "mediatek,mt8173-mmsys"; mboxes = <&gce 0 CMDQ_THR_PRIO_LOWEST 1>, <&gce 1 CMDQ_THR_PRIO_LOWEST 1>; - mediatek,gce-subsys = <SUBSYS_1400XXXX>; mutex-event-eof = <CMDQ_EVENT_MUTEX0_STREAM_EOF CMDQ_EVENT_MUTEX1_STREAM_EOF>; - + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x3000 0x1000>, + <&gce SUBSYS_1401XXXX 0x2000 0x100>; ... }; diff --git a/dts/Bindings/mailbox/qcom,apcs-kpss-global.txt b/dts/Bindings/mailbox/qcom,apcs-kpss-global.txt index 1232fc9fc7..0278482af6 100644 --- a/dts/Bindings/mailbox/qcom,apcs-kpss-global.txt +++ b/dts/Bindings/mailbox/qcom,apcs-kpss-global.txt @@ -12,7 +12,10 @@ platforms. "qcom,msm8996-apcs-hmss-global" "qcom,msm8998-apcs-hmss-global" "qcom,qcs404-apcs-apps-global" + "qcom,sc7180-apss-shared" "qcom,sdm845-apss-shared" + "qcom,sm8150-apss-shared" + "qcom,ipq8074-apcs-apps-global" - reg: Usage: required diff --git a/dts/Bindings/media/allwinner,sun4i-a10-csi.yaml b/dts/Bindings/media/allwinner,sun4i-a10-csi.yaml new file mode 100644 index 0000000000..27f38eed38 --- /dev/null +++ b/dts/Bindings/media/allwinner,sun4i-a10-csi.yaml @@ -0,0 +1,109 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/allwinner,sun4i-a10-csi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner A10 CMOS Sensor Interface (CSI) Device Tree Bindings + +maintainers: + - Chen-Yu Tsai <wens@csie.org> + - Maxime Ripard <maxime.ripard@bootlin.com> + +description: |- + The Allwinner A10 and later has a CMOS Sensor Interface to retrieve + frames from a parallel or BT656 sensor. + +properties: + compatible: + const: allwinner,sun7i-a20-csi0 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: The CSI interface clock + - description: The CSI module clock + - description: The CSI ISP clock + - description: The CSI DRAM clock + + clock-names: + items: + - const: bus + - const: mod + - const: isp + - const: ram + + resets: + maxItems: 1 + + # See ./video-interfaces.txt for details + port: + type: object + additionalProperties: false + + properties: + endpoint: + type: object + + properties: + bus-width: + enum: [8, 16] + + data-active: true + hsync-active: true + pclk-sample: true + remote-endpoint: true + vsync-active: true + + required: + - bus-width + - data-active + - hsync-active + - pclk-sample + - remote-endpoint + - vsync-active + + required: + - endpoint + +required: + - compatible + - reg + - interrupts + - clocks + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/sun7i-a20-ccu.h> + #include <dt-bindings/reset/sun4i-a10-ccu.h> + + csi0: csi@1c09000 { + compatible = "allwinner,sun7i-a20-csi0"; + reg = <0x01c09000 0x1000>; + interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_AHB_CSI0>, <&ccu CLK_CSI0>, + <&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI0>; + clock-names = "bus", "mod", "isp", "ram"; + resets = <&ccu RST_CSI0>; + + port { + csi_from_ov5640: endpoint { + remote-endpoint = <&ov5640_to_csi>; + bus-width = <8>; + hsync-active = <1>; /* Active high */ + vsync-active = <0>; /* Active low */ + data-active = <1>; /* Active high */ + pclk-sample = <1>; /* Rising */ + }; + }; + }; + +... diff --git a/dts/Bindings/media/allwinner,sun4i-a10-ir.yaml b/dts/Bindings/media/allwinner,sun4i-a10-ir.yaml new file mode 100644 index 0000000000..98c1bdde9a --- /dev/null +++ b/dts/Bindings/media/allwinner,sun4i-a10-ir.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-ir.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner A10 Infrared Controller Device Tree Bindings + +maintainers: + - Chen-Yu Tsai <wens@csie.org> + - Maxime Ripard <maxime.ripard@bootlin.com> + +allOf: + - $ref: "rc.yaml#" + +properties: + compatible: + oneOf: + - const: allwinner,sun4i-a10-ir + - const: allwinner,sun5i-a13-ir + - items: + - const: allwinner,sun8i-a83t-ir + - const: allwinner,sun6i-a31-ir + - const: allwinner,sun6i-a31-ir + - items: + - const: allwinner,sun50i-a64-ir + - const: allwinner,sun6i-a31-ir + - items: + - const: allwinner,sun50i-h6-ir + - const: allwinner,sun6i-a31-ir + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: Bus Clock + - description: Module Clock + + clock-names: + items: + - const: apb + - const: ir + + resets: + maxItems: 1 + + clock-frequency: + default: 8000000 + description: + IR Receiver clock frequency, in Hertz. + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +# FIXME: We should set it, but it would report all the generic +# properties as additional properties. +# additionalProperties: false + +examples: + - | + ir0: ir@1c21800 { + compatible = "allwinner,sun4i-a10-ir"; + clocks = <&apb0_gates 6>, <&ir0_clk>; + clock-names = "apb", "ir"; + clock-frequency = <3000000>; + resets = <&apb0_rst 1>; + interrupts = <0 5 1>; + reg = <0x01C21800 0x40>; + linux,rc-map-name = "rc-rc6-mce"; + }; + +... diff --git a/dts/Bindings/media/amlogic,vdec.txt b/dts/Bindings/media/amlogic,vdec.txt index aabdd01bcf..9b6aace86c 100644 --- a/dts/Bindings/media/amlogic,vdec.txt +++ b/dts/Bindings/media/amlogic,vdec.txt @@ -26,6 +26,7 @@ Required properties: - GXBB (S905) : "amlogic,gxbb-vdec" - GXL (S905X, S905D) : "amlogic,gxl-vdec" - GXM (S912) : "amlogic,gxm-vdec" + followed by the common "amlogic,gx-vdec" - reg: base address and size of he following memory-mapped regions : - dos - esparser @@ -47,8 +48,8 @@ Required properties: Example: -vdec: video-decoder@c8820000 { - compatible = "amlogic,gxbb-vdec"; +vdec: video-codec@c8820000 { + compatible = "amlogic,gxbb-vdec", "amlogic,gx-vdec"; reg = <0x0 0xc8820000 0x0 0x10000>, <0x0 0xc110a580 0x0 0xe4>; reg-names = "dos", "esparser"; diff --git a/dts/Bindings/media/cdns,csi2tx.txt b/dts/Bindings/media/cdns,csi2tx.txt index 459c6e332f..751b9edf12 100644 --- a/dts/Bindings/media/cdns,csi2tx.txt +++ b/dts/Bindings/media/cdns,csi2tx.txt @@ -5,7 +5,8 @@ The Cadence MIPI-CSI2 TX controller is a CSI-2 bridge supporting up to 4 CSI lanes in output, and up to 4 different pixel streams in input. Required properties: - - compatible: must be set to "cdns,csi2tx" + - compatible: must be set to "cdns,csi2tx" or "cdns,csi2tx-1.3" + for version 1.3 of the controller, "cdns,csi2tx-2.1" for v2.1 - reg: base address and size of the memory mapped region - clocks: phandles to the clocks driving the controller - clock-names: must contain: diff --git a/dts/Bindings/media/i2c/nokia,smia.txt b/dts/Bindings/media/i2c/nokia,smia.txt index 8ee7c7972a..c3c3479233 100644 --- a/dts/Bindings/media/i2c/nokia,smia.txt +++ b/dts/Bindings/media/i2c/nokia,smia.txt @@ -7,6 +7,9 @@ of that. These definitions are valid for both types of sensors. More detailed documentation can be found in Documentation/devicetree/bindings/media/video-interfaces.txt . +The device node should contain a "port" node which may contain one or more +endpoint nodes, in accordance with video interface bindings defined in +Documentation/devicetree/bindings/media/video-interfaces.txt . Mandatory properties -------------------- @@ -37,9 +40,7 @@ Optional properties Endpoint node mandatory properties ---------------------------------- -- clock-lanes: <0> - data-lanes: <1..n> -- remote-endpoint: A phandle to the bus receiver's endpoint node. Example @@ -48,7 +49,7 @@ Example &i2c2 { clock-frequency = <400000>; - smiapp_1: camera@10 { + camera-sensor@10 { compatible = "nokia,smia"; reg = <0x10>; reset-gpios = <&gpio3 20 0>; @@ -58,8 +59,7 @@ Example nokia,nvm-size = <512>; /* 8 * 64 */ link-frequencies = /bits/ 64 <199200000 210000000 499200000>; port { - smiapp_1_1: endpoint { - clock-lanes = <0>; + smiapp_ep: endpoint { data-lanes = <1 2>; remote-endpoint = <&csi2a_ep>; }; diff --git a/dts/Bindings/media/imx7-csi.txt b/dts/Bindings/media/imx7-csi.txt index 443aef0735..d80ceefa0c 100644 --- a/dts/Bindings/media/imx7-csi.txt +++ b/dts/Bindings/media/imx7-csi.txt @@ -9,7 +9,7 @@ to connect directly to external CMOS image sensors. Required properties: -- compatible : "fsl,imx7-csi"; +- compatible : "fsl,imx7-csi" or "fsl,imx6ul-csi"; - reg : base address and length of the register set for the device; - interrupts : should contain CSI interrupt; - clocks : list of clock specifiers, see diff --git a/dts/Bindings/media/meson-ao-cec.txt b/dts/Bindings/media/meson-ao-cec.txt index c67fc41d4a..ad92ee41c0 100644 --- a/dts/Bindings/media/meson-ao-cec.txt +++ b/dts/Bindings/media/meson-ao-cec.txt @@ -5,10 +5,12 @@ to handle communication between HDMI connected devices over the CEC bus. Required properties: - compatible : value should be following depending on the SoC : - For GXBB, GXL, GXM and G12A (AO_CEC_A module) : + For GXBB, GXL, GXM, G12A and SM1 (AO_CEC_A module) : "amlogic,meson-gx-ao-cec" For G12A (AO_CEC_B module) : "amlogic,meson-g12a-ao-cec" + For SM1 (AO_CEC_B module) : + "amlogic,meson-sm1-ao-cec" - reg : Physical base address of the IP registers and length of memory mapped region. @@ -16,9 +18,9 @@ Required properties: - interrupts : AO-CEC interrupt number to the CPU. - clocks : from common clock binding: handle to AO-CEC clock. - clock-names : from common clock binding, must contain : - For GXBB, GXL, GXM and G12A (AO_CEC_A module) : + For GXBB, GXL, GXM, G12A and SM1 (AO_CEC_A module) : - "core" - For G12A (AO_CEC_B module) : + For G12A, SM1 (AO_CEC_B module) : - "oscin" corresponding to entry in the clocks property. - hdmi-phandle: phandle to the HDMI controller diff --git a/dts/Bindings/media/nvidia,tegra-vde.txt b/dts/Bindings/media/nvidia,tegra-vde.txt index 7302e949e6..602169b8aa 100644 --- a/dts/Bindings/media/nvidia,tegra-vde.txt +++ b/dts/Bindings/media/nvidia,tegra-vde.txt @@ -35,6 +35,7 @@ Optional properties: - resets : Must contain an entry for each entry in reset-names. - reset-names : Must include the following entries: - mc +- iommus: Must contain phandle to the IOMMU device node. Example: @@ -59,4 +60,5 @@ video-codec@6001a000 { clocks = <&tegra_car TEGRA20_CLK_VDE>; reset-names = "vde", "mc"; resets = <&tegra_car 61>, <&mc TEGRA20_MC_RESET_VDE>; + iommus = <&mc TEGRA_SWGROUP_VDE>; }; diff --git a/dts/Bindings/media/rc.txt b/dts/Bindings/media/rc.txt index d3e7a012bf..be629f7fa7 100644 --- a/dts/Bindings/media/rc.txt +++ b/dts/Bindings/media/rc.txt @@ -1,117 +1 @@ -The following properties are common to the infrared remote controllers: - -- linux,rc-map-name: string, specifies the scancode/key mapping table - defined in-kernel for the remote controller. Support values are: - * "rc-adstech-dvb-t-pci" - * "rc-alink-dtu-m" - * "rc-anysee" - * "rc-apac-viewcomp" - * "rc-asus-pc39" - * "rc-asus-ps3-100" - * "rc-ati-tv-wonder-hd-600" - * "rc-ati-x10" - * "rc-avermedia-a16d" - * "rc-avermedia-cardbus" - * "rc-avermedia-dvbt" - * "rc-avermedia-m135a" - * "rc-avermedia-m733a-rm-k6" - * "rc-avermedia-rm-ks" - * "rc-avermedia" - * "rc-avertv-303" - * "rc-azurewave-ad-tu700" - * "rc-behold-columbus" - * "rc-behold" - * "rc-budget-ci-old" - * "rc-cec" - * "rc-cinergy-1400" - * "rc-cinergy" - * "rc-delock-61959" - * "rc-dib0700-nec" - * "rc-dib0700-rc5" - * "rc-digitalnow-tinytwin" - * "rc-digittrade" - * "rc-dm1105-nec" - * "rc-dntv-live-dvbt-pro" - * "rc-dntv-live-dvb-t" - * "rc-dtt200u" - * "rc-dvbsky" - * "rc-empty" - * "rc-em-terratec" - * "rc-encore-enltv2" - * "rc-encore-enltv-fm53" - * "rc-encore-enltv" - * "rc-evga-indtube" - * "rc-eztv" - * "rc-flydvb" - * "rc-flyvideo" - * "rc-fusionhdtv-mce" - * "rc-gadmei-rm008z" - * "rc-geekbox" - * "rc-genius-tvgo-a11mce" - * "rc-gotview7135" - * "rc-hauppauge" - * "rc-imon-mce" - * "rc-imon-pad" - * "rc-iodata-bctv7e" - * "rc-it913x-v1" - * "rc-it913x-v2" - * "rc-kaiomy" - * "rc-kworld-315u" - * "rc-kworld-pc150u" - * "rc-kworld-plus-tv-analog" - * "rc-leadtek-y04g0051" - * "rc-lirc" - * "rc-lme2510" - * "rc-manli" - * "rc-medion-x10" - * "rc-medion-x10-digitainer" - * "rc-medion-x10-or2x" - * "rc-msi-digivox-ii" - * "rc-msi-digivox-iii" - * "rc-msi-tvanywhere-plus" - * "rc-msi-tvanywhere" - * "rc-nebula" - * "rc-nec-terratec-cinergy-xs" - * "rc-norwood" - * "rc-npgtech" - * "rc-pctv-sedna" - * "rc-pinnacle-color" - * "rc-pinnacle-grey" - * "rc-pinnacle-pctv-hd" - * "rc-pixelview-new" - * "rc-pixelview" - * "rc-pixelview-002t" - * "rc-pixelview-mk12" - * "rc-powercolor-real-angel" - * "rc-proteus-2309" - * "rc-purpletv" - * "rc-pv951" - * "rc-hauppauge" - * "rc-rc5-tv" - * "rc-rc6-mce" - * "rc-real-audio-220-32-keys" - * "rc-reddo" - * "rc-snapstream-firefly" - * "rc-streamzap" - * "rc-tbs-nec" - * "rc-technisat-ts35" - * "rc-technisat-usb2" - * "rc-terratec-cinergy-c-pci" - * "rc-terratec-cinergy-s2-hd" - * "rc-terratec-cinergy-xs" - * "rc-terratec-slim" - * "rc-terratec-slim-2" - * "rc-tevii-nec" - * "rc-tivo" - * "rc-total-media-in-hand" - * "rc-total-media-in-hand-02" - * "rc-trekstor" - * "rc-tt-1500" - * "rc-twinhan-dtv-cab-ci" - * "rc-twinhan1027" - * "rc-videomate-k100" - * "rc-videomate-s350" - * "rc-videomate-tv-pvr" - * "rc-winfast" - * "rc-winfast-usbii-deluxe" - * "rc-su3000" +This file has been moved to rc.yaml. diff --git a/dts/Bindings/media/rc.yaml b/dts/Bindings/media/rc.yaml new file mode 100644 index 0000000000..3d5c154fd2 --- /dev/null +++ b/dts/Bindings/media/rc.yaml @@ -0,0 +1,145 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/rc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Generic Infrared Remote Controller Device Tree Bindings + +maintainers: + - Mauro Carvalho Chehab <mchehab@kernel.org> + - Sean Young <sean@mess.org> + +properties: + $nodename: + pattern: "^ir(@[a-f0-9]+)?$" + + linux,rc-map-name: + description: + Specifies the scancode/key mapping table defined in-kernel for + the remote controller. + allOf: + - $ref: '/schemas/types.yaml#/definitions/string' + - enum: + - rc-adstech-dvb-t-pci + - rc-alink-dtu-m + - rc-anysee + - rc-apac-viewcomp + - rc-astrometa-t2hybrid + - rc-asus-pc39 + - rc-asus-ps3-100 + - rc-ati-tv-wonder-hd-600 + - rc-ati-x10 + - rc-avermedia + - rc-avermedia-a16d + - rc-avermedia-cardbus + - rc-avermedia-dvbt + - rc-avermedia-m135a + - rc-avermedia-m733a-rm-k6 + - rc-avermedia-rm-ks + - rc-avertv-303 + - rc-azurewave-ad-tu700 + - rc-behold + - rc-behold-columbus + - rc-budget-ci-old + - rc-cec + - rc-cinergy + - rc-cinergy-1400 + - rc-d680-dmb + - rc-delock-61959 + - rc-dib0700-nec + - rc-dib0700-rc5 + - rc-digitalnow-tinytwin + - rc-digittrade + - rc-dm1105-nec + - rc-dntv-live-dvb-t + - rc-dntv-live-dvbt-pro + - rc-dtt200u + - rc-dvbsky + - rc-dvico-mce + - rc-dvico-portable + - rc-em-terratec + - rc-empty + - rc-encore-enltv + - rc-encore-enltv-fm53 + - rc-encore-enltv2 + - rc-evga-indtube + - rc-eztv + - rc-flydvb + - rc-flyvideo + - rc-fusionhdtv-mce + - rc-gadmei-rm008z + - rc-geekbox + - rc-genius-tvgo-a11mce + - rc-gotview7135 + - rc-hauppauge + - rc-hauppauge + - rc-hisi-poplar + - rc-hisi-tv-demo + - rc-imon-mce + - rc-imon-pad + - rc-imon-rsc + - rc-iodata-bctv7e + - rc-it913x-v1 + - rc-it913x-v2 + - rc-kaiomy + - rc-kworld-315u + - rc-kworld-pc150u + - rc-kworld-plus-tv-analog + - rc-leadtek-y04g0051 + - rc-lme2510 + - rc-manli + - rc-medion-x10 + - rc-medion-x10-digitainer + - rc-medion-x10-or2x + - rc-msi-digivox-ii + - rc-msi-digivox-iii + - rc-msi-tvanywhere + - rc-msi-tvanywhere-plus + - rc-nebula + - rc-nec-terratec-cinergy-xs + - rc-norwood + - rc-npgtech + - rc-pctv-sedna + - rc-pinnacle-color + - rc-pinnacle-grey + - rc-pinnacle-pctv-hd + - rc-pixelview + - rc-pixelview-002t + - rc-pixelview-mk12 + - rc-pixelview-new + - rc-powercolor-real-angel + - rc-proteus-2309 + - rc-purpletv + - rc-pv951 + - rc-rc5-tv + - rc-rc6-mce + - rc-real-audio-220-32-keys + - rc-reddo + - rc-snapstream-firefly + - rc-streamzap + - rc-su3000 + - rc-tango + - rc-tbs-nec + - rc-technisat-ts35 + - rc-technisat-usb2 + - rc-terratec-cinergy-c-pci + - rc-terratec-cinergy-s2-hd + - rc-terratec-cinergy-xs + - rc-terratec-slim + - rc-terratec-slim-2 + - rc-tevii-nec + - rc-tivo + - rc-total-media-in-hand + - rc-total-media-in-hand-02 + - rc-trekstor + - rc-tt-1500 + - rc-twinhan-dtv-cab-ci + - rc-twinhan1027 + - rc-videomate-k100 + - rc-videomate-s350 + - rc-videomate-tv-pvr + - rc-winfast + - rc-winfast-usbii-deluxe + - rc-xbox-dvd + - rc-zx-irdec diff --git a/dts/Bindings/media/renesas,rcar-csi2.txt b/dts/Bindings/media/renesas,csi2.txt index 3314092597..3314092597 100644 --- a/dts/Bindings/media/renesas,rcar-csi2.txt +++ b/dts/Bindings/media/renesas,csi2.txt diff --git a/dts/Bindings/media/rcar_imr.txt b/dts/Bindings/media/renesas,imr.txt index b0614153ed..b0614153ed 100644 --- a/dts/Bindings/media/rcar_imr.txt +++ b/dts/Bindings/media/renesas,imr.txt diff --git a/dts/Bindings/media/rcar_vin.txt b/dts/Bindings/media/renesas,vin.txt index aa217b0962..aa217b0962 100644 --- a/dts/Bindings/media/rcar_vin.txt +++ b/dts/Bindings/media/renesas,vin.txt diff --git a/dts/Bindings/media/rockchip-vpu.txt b/dts/Bindings/media/rockchip-vpu.txt index 35dc464ad7..339252d9c5 100644 --- a/dts/Bindings/media/rockchip-vpu.txt +++ b/dts/Bindings/media/rockchip-vpu.txt @@ -1,14 +1,17 @@ device-tree bindings for rockchip VPU codec Rockchip (Video Processing Unit) present in various Rockchip platforms, -such as RK3288 and RK3399. +such as RK3288, RK3328 and RK3399. Required properties: - compatible: value should be one of the following "rockchip,rk3288-vpu"; + "rockchip,rk3328-vpu"; "rockchip,rk3399-vpu"; - interrupts: encoding and decoding interrupt specifiers -- interrupt-names: should be "vepu" and "vdpu" +- interrupt-names: should be + "vepu", "vdpu" on RK3288 and RK3399, + "vdpu" on RK3328. - clocks: phandle to VPU aclk, hclk clocks - clock-names: should be "aclk" and "hclk" - power-domains: phandle to power domain node @@ -27,3 +30,14 @@ SoC-specific DT entry: power-domains = <&power RK3288_PD_VIDEO>; iommus = <&vpu_mmu>; }; + + vpu: video-codec@ff350000 { + compatible = "rockchip,rk3328-vpu"; + reg = <0x0 0xff350000 0x0 0x800>; + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "vdpu"; + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; + clock-names = "aclk", "hclk"; + power-domains = <&power RK3328_PD_VPU>; + iommus = <&vpu_mmu>; + }; diff --git a/dts/Bindings/media/sunxi-ir.txt b/dts/Bindings/media/sunxi-ir.txt deleted file mode 100644 index 278098987e..0000000000 --- a/dts/Bindings/media/sunxi-ir.txt +++ /dev/null @@ -1,28 +0,0 @@ -Device-Tree bindings for SUNXI IR controller found in sunXi SoC family - -Required properties: -- compatible : "allwinner,sun4i-a10-ir" or "allwinner,sun5i-a13-ir" -- clocks : list of clock specifiers, corresponding to - entries in clock-names property; -- clock-names : should contain "apb" and "ir" entries; -- interrupts : should contain IR IRQ number; -- reg : should contain IO map address for IR. - -Optional properties: -- linux,rc-map-name: see rc.txt file in the same directory. -- resets : phandle + reset specifier pair -- clock-frequency : IR Receiver clock frequency, in Hertz. Defaults to 8 MHz - if missing. - -Example: - -ir0: ir@1c21800 { - compatible = "allwinner,sun4i-a10-ir"; - clocks = <&apb0_gates 6>, <&ir0_clk>; - clock-names = "apb", "ir"; - clock-frequency = <3000000>; - resets = <&apb0_rst 1>; - interrupts = <0 5 1>; - reg = <0x01C21800 0x40>; - linux,rc-map-name = "rc-rc6-mce"; -}; diff --git a/dts/Bindings/memory-controllers/mediatek,smi-common.txt b/dts/Bindings/memory-controllers/mediatek,smi-common.txt index e937ddd871..b478ade4da 100644 --- a/dts/Bindings/memory-controllers/mediatek,smi-common.txt +++ b/dts/Bindings/memory-controllers/mediatek,smi-common.txt @@ -2,9 +2,10 @@ SMI (Smart Multimedia Interface) Common The hardware block diagram please check bindings/iommu/mediatek,iommu.txt -Mediatek SMI have two generations of HW architecture, mt2712 and mt8173 use -the second generation of SMI HW while mt2701 uses the first generation HW of -SMI. +Mediatek SMI have two generations of HW architecture, here is the list +which generation the SoCs use: +generation 1: mt2701 and mt7623. +generation 2: mt2712, mt8173 and mt8183. There's slight differences between the two SMI, for generation 2, the register which control the iommu port is at each larb's register base. But @@ -19,6 +20,7 @@ Required properties: "mediatek,mt2712-smi-common" "mediatek,mt7623-smi-common", "mediatek,mt2701-smi-common" "mediatek,mt8173-smi-common" + "mediatek,mt8183-smi-common" - reg : the register and size of the SMI block. - power-domains : a phandle to the power domain of this local arbiter. - clocks : Must contain an entry for each entry in clock-names. @@ -30,6 +32,10 @@ Required properties: They may be the same if both source clocks are the same. - "async" : asynchronous clock, it help transform the smi clock into the emi clock domain, this clock is only needed by generation 1 smi HW. + and these 2 option clocks for generation 2 smi HW: + - "gals0": the path0 clock of GALS(Global Async Local Sync). + - "gals1": the path1 clock of GALS(Global Async Local Sync). + Here is the list which has this GALS: mt8183. Example: smi_common: smi@14022000 { diff --git a/dts/Bindings/memory-controllers/mediatek,smi-larb.txt b/dts/Bindings/memory-controllers/mediatek,smi-larb.txt index 94eddcae77..4b369b3e1a 100644 --- a/dts/Bindings/memory-controllers/mediatek,smi-larb.txt +++ b/dts/Bindings/memory-controllers/mediatek,smi-larb.txt @@ -8,6 +8,7 @@ Required properties: "mediatek,mt2712-smi-larb" "mediatek,mt7623-smi-larb", "mediatek,mt2701-smi-larb" "mediatek,mt8173-smi-larb" + "mediatek,mt8183-smi-larb" - reg : the register and size of this local arbiter. - mediatek,smi : a phandle to the smi_common node. - power-domains : a phandle to the power domain of this local arbiter. @@ -16,6 +17,9 @@ Required properties: - "apb" : Advanced Peripheral Bus clock, It's the clock for setting the register. - "smi" : It's the clock for transfer data and command. + and this optional clock name: + - "gals": the clock for GALS(Global Async Local Sync). + Here is the list which has this GALS: mt8183. Required property for mt2701, mt2712 and mt7623: - mediatek,larb-id :the hardware id of this larb. diff --git a/dts/Bindings/memory-controllers/renesas-memory-controllers.txt b/dts/Bindings/memory-controllers/renesas,dbsc.txt index 9f78e6c827..9f78e6c827 100644 --- a/dts/Bindings/memory-controllers/renesas-memory-controllers.txt +++ b/dts/Bindings/memory-controllers/renesas,dbsc.txt diff --git a/dts/Bindings/mfd/allwinner,sun4i-a10-ts.yaml b/dts/Bindings/mfd/allwinner,sun4i-a10-ts.yaml new file mode 100644 index 0000000000..4b1a09acb9 --- /dev/null +++ b/dts/Bindings/mfd/allwinner,sun4i-a10-ts.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/allwinner,sun4i-a10-ts.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner A10 Resistive Touchscreen Controller Device Tree Bindings + +maintainers: + - Chen-Yu Tsai <wens@csie.org> + - Maxime Ripard <maxime.ripard@bootlin.com> + +properties: + "#thermal-sensor-cells": + const: 0 + + compatible: + enum: + - allwinner,sun4i-a10-ts + - allwinner,sun5i-a13-ts + - allwinner,sun6i-a31-ts + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + allwinner,ts-attached: + $ref: /schemas/types.yaml#/definitions/flag + description: A touchscreen is attached to the controller + + allwinner,tp-sensitive-adjust: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - minimum: 0 + maximum: 15 + default: 15 + description: Sensitivity of pen down detection + + allwinner,filter-type: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - minimum: 0 + maximum: 3 + default: 1 + description: | + Select median and averaging filter. Sample used for median / + averaging filter: + 0: 4/2 + 1: 5/3 + 2: 8/4 + 3: 16/8 + +required: + - "#thermal-sensor-cells" + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + rtp: rtp@1c25000 { + compatible = "allwinner,sun4i-a10-ts"; + reg = <0x01c25000 0x100>; + interrupts = <29>; + allwinner,ts-attached; + #thermal-sensor-cells = <0>; + /* sensitive/noisy touch panel */ + allwinner,tp-sensitive-adjust = <0>; + allwinner,filter-type = <3>; + }; + +... diff --git a/dts/Bindings/mfd/aspeed-scu.txt b/dts/Bindings/mfd/aspeed-scu.txt index ce8cf0ec62..4d92c0bb66 100644 --- a/dts/Bindings/mfd/aspeed-scu.txt +++ b/dts/Bindings/mfd/aspeed-scu.txt @@ -4,9 +4,7 @@ configuring elements such as clocks, pinmux, and reset. Required properties: - compatible: One of: "aspeed,ast2400-scu", "syscon", "simple-mfd" - "aspeed,g4-scu", "syscon", "simple-mfd" "aspeed,ast2500-scu", "syscon", "simple-mfd" - "aspeed,g5-scu", "syscon", "simple-mfd" - reg: contains the offset and length of the SCU memory region - #clock-cells: should be set to <1> - the system controller is also a diff --git a/dts/Bindings/mfd/mt6397.txt b/dts/Bindings/mfd/mt6397.txt index 0ebd08af77..a9b105ac00 100644 --- a/dts/Bindings/mfd/mt6397.txt +++ b/dts/Bindings/mfd/mt6397.txt @@ -8,11 +8,12 @@ MT6397/MT6323 is a multifunction device with the following sub modules: - Clock - LED - Keys +- Power controller It is interfaced to host controller using SPI interface by a proprietary hardware called PMIC wrapper or pwrap. MT6397/MT6323 MFD is a child device of pwrap. See the following for pwarp node definitions: -Documentation/devicetree/bindings/soc/mediatek/pwrap.txt +../soc/mediatek/pwrap.txt This document describes the binding for MFD device and its sub module. @@ -22,14 +23,16 @@ compatible: "mediatek,mt6397" or "mediatek,mt6323" Optional subnodes: - rtc - Required properties: + Required properties: Should be one of follows + - compatible: "mediatek,mt6323-rtc" - compatible: "mediatek,mt6397-rtc" + For details, see ../rtc/rtc-mt6397.txt - regulators Required properties: - compatible: "mediatek,mt6397-regulator" - see Documentation/devicetree/bindings/regulator/mt6397-regulator.txt + see ../regulator/mt6397-regulator.txt - compatible: "mediatek,mt6323-regulator" - see Documentation/devicetree/bindings/regulator/mt6323-regulator.txt + see ../regulator/mt6323-regulator.txt - codec Required properties: - compatible: "mediatek,mt6397-codec" @@ -39,12 +42,17 @@ Optional subnodes: - led Required properties: - compatible: "mediatek,mt6323-led" - see Documentation/devicetree/bindings/leds/leds-mt6323.txt + see ../leds/leds-mt6323.txt - keys Required properties: - compatible: "mediatek,mt6397-keys" or "mediatek,mt6323-keys" - see Documentation/devicetree/bindings/input/mtk-pmic-keys.txt + see ../input/mtk-pmic-keys.txt + +- power-controller + Required properties: + - compatible: "mediatek,mt6323-pwrc" + For details, see ../power/reset/mt6323-poweroff.txt Example: pwrap: pwrap@1000f000 { diff --git a/dts/Bindings/mfd/rn5t618.txt b/dts/Bindings/mfd/rn5t618.txt index 65c23263cc..b74e5e94d1 100644 --- a/dts/Bindings/mfd/rn5t618.txt +++ b/dts/Bindings/mfd/rn5t618.txt @@ -14,6 +14,10 @@ Required properties: "ricoh,rc5t619" - reg: the I2C slave address of the device +Optional properties: + - system-power-controller: + See Documentation/devicetree/bindings/power/power-controller.txt + Sub-nodes: - regulators: the node is required if the regulator functionality is needed. The valid regulator names are: DCDC1, DCDC2, DCDC3, DCDC4 @@ -28,6 +32,7 @@ Example: pmic@32 { compatible = "ricoh,rn5t618"; reg = <0x32>; + system-power-controller; regulators { DCDC1 { diff --git a/dts/Bindings/mfd/sun4i-gpadc.txt b/dts/Bindings/mfd/sun4i-gpadc.txt deleted file mode 100644 index 86dd8191b0..0000000000 --- a/dts/Bindings/mfd/sun4i-gpadc.txt +++ /dev/null @@ -1,59 +0,0 @@ -Allwinner SoCs' GPADC Device Tree bindings ------------------------------------------- -The Allwinner SoCs all have an ADC that can also act as a thermal sensor -and sometimes as a touchscreen controller. - -Required properties: - - compatible: "allwinner,sun8i-a33-ths", - - reg: mmio address range of the chip, - - #thermal-sensor-cells: shall be 0, - - #io-channel-cells: shall be 0, - -Example: - ths: ths@1c25000 { - compatible = "allwinner,sun8i-a33-ths"; - reg = <0x01c25000 0x100>; - #thermal-sensor-cells = <0>; - #io-channel-cells = <0>; - }; - -sun4i, sun5i and sun6i SoCs are also supported via the older binding: - -sun4i resistive touchscreen controller --------------------------------------- - -Required properties: - - compatible: "allwinner,sun4i-a10-ts", "allwinner,sun5i-a13-ts" or - "allwinner,sun6i-a31-ts" - - reg: mmio address range of the chip - - interrupts: interrupt to which the chip is connected - - #thermal-sensor-cells: shall be 0 - -Optional properties: - - allwinner,ts-attached : boolean indicating that an actual touchscreen - is attached to the controller - - allwinner,tp-sensitive-adjust : integer (4 bits) - adjust sensitivity of pen down detection - between 0 (least sensitive) and 15 - (defaults to 15) - - allwinner,filter-type : integer (2 bits) - select median and averaging filter - samples used for median / averaging filter - 0: 4/2 - 1: 5/3 - 2: 8/4 - 3: 16/8 - (defaults to 1) - -Example: - - rtp: rtp@1c25000 { - compatible = "allwinner,sun4i-a10-ts"; - reg = <0x01c25000 0x100>; - interrupts = <29>; - allwinner,ts-attached; - #thermal-sensor-cells = <0>; - /* sensitive/noisy touch panel */ - allwinner,tp-sensitive-adjust = <0>; - allwinner,filter-type = <3>; - }; diff --git a/dts/Bindings/misc/aspeed-p2a-ctrl.txt b/dts/Bindings/misc/aspeed-p2a-ctrl.txt index 854bd67ffe..0e1fa5bc6a 100644 --- a/dts/Bindings/misc/aspeed-p2a-ctrl.txt +++ b/dts/Bindings/misc/aspeed-p2a-ctrl.txt @@ -26,9 +26,7 @@ property: - compatible : Should be one of the following: "aspeed,ast2400-scu", "syscon", "simple-mfd" - "aspeed,g4-scu", "syscon", "simple-mfd" "aspeed,ast2500-scu", "syscon", "simple-mfd" - "aspeed,g5-scu", "syscon", "simple-mfd" Example =================== diff --git a/dts/Bindings/mmc/allwinner,sun4i-a10-mmc.yaml b/dts/Bindings/mmc/allwinner,sun4i-a10-mmc.yaml index df0280edef..d2d4308596 100644 --- a/dts/Bindings/mmc/allwinner,sun4i-a10-mmc.yaml +++ b/dts/Bindings/mmc/allwinner,sun4i-a10-mmc.yaml @@ -30,16 +30,22 @@ properties: - const: allwinner,sun8i-a83t-mmc - const: allwinner,sun7i-a20-mmc - items: - - const: allwinner,sun50i-h6-emmc + - const: allwinner,sun8i-r40-emmc - const: allwinner,sun50i-a64-emmc - items: - - const: allwinner,sun50i-h6-mmc + - const: allwinner,sun8i-r40-mmc - const: allwinner,sun50i-a64-mmc - items: - - const: allwinner,sun8i-r40-emmc + - const: allwinner,sun50i-h5-emmc - const: allwinner,sun50i-a64-emmc - items: - - const: allwinner,sun8i-r40-mmc + - const: allwinner,sun50i-h5-mmc + - const: allwinner,sun50i-a64-mmc + - items: + - const: allwinner,sun50i-h6-emmc + - const: allwinner,sun50i-a64-emmc + - items: + - const: allwinner,sun50i-h6-mmc - const: allwinner,sun50i-a64-mmc reg: diff --git a/dts/Bindings/mmc/arasan,sdhci.txt b/dts/Bindings/mmc/arasan,sdhci.txt index 1edbb049cc..7ca0aa7ccc 100644 --- a/dts/Bindings/mmc/arasan,sdhci.txt +++ b/dts/Bindings/mmc/arasan,sdhci.txt @@ -17,6 +17,8 @@ Required Properties: For this device it is strongly suggested to include arasan,soc-ctl-syscon. - "ti,am654-sdhci-5.1", "arasan,sdhci-5.1": TI AM654 MMC PHY Note: This binding has been deprecated and moved to [5]. + - "intel,lgm-sdhci-5.1-emmc", "arasan,sdhci-5.1": Intel LGM eMMC PHY + For this device it is strongly suggested to include arasan,soc-ctl-syscon. [5] Documentation/devicetree/bindings/mmc/sdhci-am654.txt @@ -80,3 +82,18 @@ Example: phy-names = "phy_arasan"; #clock-cells = <0>; }; + + emmc: sdhci@ec700000 { + compatible = "intel,lgm-sdhci-5.1-emmc", "arasan,sdhci-5.1"; + reg = <0xec700000 0x300>; + interrupt-parent = <&ioapic1>; + interrupts = <44 1>; + clocks = <&cgu0 LGM_CLK_EMMC5>, <&cgu0 LGM_CLK_NGI>, + <&cgu0 LGM_GCLK_EMMC>; + clock-names = "clk_xin", "clk_ahb", "gate"; + clock-output-names = "emmc_cardclock"; + #clock-cells = <0>; + phys = <&emmc_phy>; + phy-names = "phy_arasan"; + arasan,soc-ctl-syscon = <&sysconf>; + }; diff --git a/dts/Bindings/mmc/aspeed,sdhci.yaml b/dts/Bindings/mmc/aspeed,sdhci.yaml new file mode 100644 index 0000000000..200de93960 --- /dev/null +++ b/dts/Bindings/mmc/aspeed,sdhci.yaml @@ -0,0 +1,106 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# Copyright 2019 IBM Corp. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mmc/aspeed,sdhci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ASPEED SD/SDIO/MMC Controller + +maintainers: + - Andrew Jeffery <andrew@aj.id.au> + - Ryan Chen <ryanchen.aspeed@gmail.com> + +description: |+ + The ASPEED SD/SDIO/eMMC controller exposes two slots implementing the SDIO + Host Specification v2.00, with 1 or 4 bit data buses, or an 8 bit data bus if + only a single slot is enabled. + + The two slots are supported by a common configuration area. As the SDHCIs for + the slots are dependent on the common configuration area, they are described + as child nodes. + +properties: + compatible: + enum: + - aspeed,ast2400-sd-controller + - aspeed,ast2500-sd-controller + - aspeed,ast2600-sd-controller + reg: + maxItems: 1 + description: Common configuration registers + "#address-cells": + const: 1 + "#size-cells": + const: 1 + ranges: true + clocks: + maxItems: 1 + description: The SD/SDIO controller clock gate + +patternProperties: + "^sdhci@[0-9a-f]+$": + type: object + allOf: + - $ref: mmc-controller.yaml + properties: + compatible: + enum: + - aspeed,ast2400-sdhci + - aspeed,ast2500-sdhci + - aspeed,ast2600-sdhci + reg: + maxItems: 1 + description: The SDHCI registers + clocks: + maxItems: 1 + description: The SD bus clock + interrupts: + maxItems: 1 + description: The SD interrupt shared between both slots + sdhci,auto-cmd12: + type: boolean + description: Specifies that controller should use auto CMD12 + required: + - compatible + - reg + - clocks + - interrupts + +additionalProperties: false + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + - ranges + - clocks + +examples: + - | + #include <dt-bindings/clock/aspeed-clock.h> + sdc@1e740000 { + compatible = "aspeed,ast2500-sd-controller"; + reg = <0x1e740000 0x100>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x1e740000 0x20000>; + clocks = <&syscon ASPEED_CLK_GATE_SDCLK>; + + sdhci0: sdhci@100 { + compatible = "aspeed,ast2500-sdhci"; + reg = <0x100 0x100>; + interrupts = <26>; + sdhci,auto-cmd12; + clocks = <&syscon ASPEED_CLK_SDIO>; + }; + + sdhci1: sdhci@200 { + compatible = "aspeed,ast2500-sdhci"; + reg = <0x200 0x100>; + interrupts = <26>; + sdhci,auto-cmd12; + clocks = <&syscon ASPEED_CLK_SDIO>; + }; + }; diff --git a/dts/Bindings/mmc/brcm,sdhci-iproc.txt b/dts/Bindings/mmc/brcm,sdhci-iproc.txt index fa90d253dc..09d87cc118 100644 --- a/dts/Bindings/mmc/brcm,sdhci-iproc.txt +++ b/dts/Bindings/mmc/brcm,sdhci-iproc.txt @@ -6,10 +6,12 @@ by mmc.txt and the properties that represent the IPROC SDHCI controller. Required properties: - compatible : Should be one of the following "brcm,bcm2835-sdhci" + "brcm,bcm2711-emmc2" "brcm,sdhci-iproc-cygnus" "brcm,sdhci-iproc" -Use brcm2835-sdhci for Rasperry PI. +Use brcm2835-sdhci for the eMMC controller on the BCM2835 (Raspberry Pi) and +bcm2711-emmc2 for the additional eMMC2 controller on BCM2711. Use sdhci-iproc-cygnus for Broadcom SDHCI Controllers restricted to 32bit host accesses to SDHCI registers. diff --git a/dts/Bindings/mtd/mxic-nand.txt b/dts/Bindings/mtd/mxic-nand.txt new file mode 100644 index 0000000000..46c55295a3 --- /dev/null +++ b/dts/Bindings/mtd/mxic-nand.txt @@ -0,0 +1,36 @@ +Macronix Raw NAND Controller Device Tree Bindings +------------------------------------------------- + +Required properties: +- compatible: should be "mxic,multi-itfc-v009-nand-controller" +- reg: should contain 1 entry for the registers +- #address-cells: should be set to 1 +- #size-cells: should be set to 0 +- interrupts: interrupt line connected to this raw NAND controller +- clock-names: should contain "ps", "send" and "send_dly" +- clocks: should contain 3 phandles for the "ps", "send" and + "send_dly" clocks + +Children nodes: +- children nodes represent the available NAND chips. + +See Documentation/devicetree/bindings/mtd/nand-controller.yaml +for more details on generic bindings. + +Example: + + nand: nand-controller@43c30000 { + compatible = "mxic,multi-itfc-v009-nand-controller"; + reg = <0x43c30000 0x10000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <GIC_SPI 0x1d IRQ_TYPE_EDGE_RISING>; + clocks = <&clkwizard 0>, <&clkwizard 1>, <&clkc 15>; + clock-names = "send", "send_dly", "ps"; + + nand@0 { + reg = <0>; + nand-ecc-mode = "soft"; + nand-ecc-algo = "bch"; + }; + }; diff --git a/dts/Bindings/net/adi,adin.yaml b/dts/Bindings/net/adi,adin.yaml new file mode 100644 index 0000000000..d95cc691a6 --- /dev/null +++ b/dts/Bindings/net/adi,adin.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: GPL-2.0+ +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/adi,adin.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices ADIN1200/ADIN1300 PHY + +maintainers: + - Alexandru Ardelean <alexandru.ardelean@analog.com> + +description: | + Bindings for Analog Devices Industrial Ethernet PHYs + +allOf: + - $ref: ethernet-phy.yaml# + +properties: + adi,rx-internal-delay-ps: + description: | + RGMII RX Clock Delay used only when PHY operates in RGMII mode with + internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds. + enum: [ 1600, 1800, 2000, 2200, 2400 ] + default: 2000 + + adi,tx-internal-delay-ps: + description: | + RGMII TX Clock Delay used only when PHY operates in RGMII mode with + internal delay (phy-mode is 'rgmii-id' or 'rgmii-txid') in pico-seconds. + enum: [ 1600, 1800, 2000, 2200, 2400 ] + default: 2000 + + adi,fifo-depth-bits: + description: | + When operating in RMII mode, this option configures the FIFO depth. + enum: [ 4, 8, 12, 16, 20, 24 ] + default: 8 + +examples: + - | + ethernet { + #address-cells = <1>; + #size-cells = <0>; + + phy-mode = "rgmii-id"; + + ethernet-phy@0 { + reg = <0>; + + adi,rx-internal-delay-ps = <1800>; + adi,tx-internal-delay-ps = <2200>; + }; + }; + - | + ethernet { + #address-cells = <1>; + #size-cells = <0>; + + phy-mode = "rmii"; + + ethernet-phy@1 { + reg = <1>; + + adi,fifo-depth-bits = <16>; + }; + }; diff --git a/dts/Bindings/net/allwinner,sun7i-a20-gmac.yaml b/dts/Bindings/net/allwinner,sun7i-a20-gmac.yaml index 06b1cc8bea..ef446ae166 100644 --- a/dts/Bindings/net/allwinner,sun7i-a20-gmac.yaml +++ b/dts/Bindings/net/allwinner,sun7i-a20-gmac.yaml @@ -17,6 +17,9 @@ properties: compatible: const: allwinner,sun7i-a20-gmac + reg: + maxItems: 1 + interrupts: maxItems: 1 diff --git a/dts/Bindings/net/amlogic,meson-dwmac.yaml b/dts/Bindings/net/amlogic,meson-dwmac.yaml new file mode 100644 index 0000000000..ae91aa9d86 --- /dev/null +++ b/dts/Bindings/net/amlogic,meson-dwmac.yaml @@ -0,0 +1,113 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019 BayLibre, SAS +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/net/amlogic,meson-dwmac.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Amlogic Meson DWMAC Ethernet controller + +maintainers: + - Neil Armstrong <narmstrong@baylibre.com> + - Martin Blumenstingl <martin.blumenstingl@googlemail.com> + +# We need a select here so we don't match all nodes with 'snps,dwmac' +select: + properties: + compatible: + contains: + enum: + - amlogic,meson6-dwmac + - amlogic,meson8b-dwmac + - amlogic,meson8m2-dwmac + - amlogic,meson-gxbb-dwmac + - amlogic,meson-axg-dwmac + required: + - compatible + +allOf: + - $ref: "snps,dwmac.yaml#" + - if: + properties: + compatible: + contains: + enum: + - amlogic,meson8b-dwmac + - amlogic,meson8m2-dwmac + - amlogic,meson-gxbb-dwmac + - amlogic,meson-axg-dwmac + + then: + properties: + clocks: + items: + - description: GMAC main clock + - description: First parent clock of the internal mux + - description: Second parent clock of the internal mux + + clock-names: + minItems: 3 + maxItems: 3 + items: + - const: stmmaceth + - const: clkin0 + - const: clkin1 + + amlogic,tx-delay-ns: + $ref: /schemas/types.yaml#definitions/uint32 + description: + The internal RGMII TX clock delay (provided by this driver) in + nanoseconds. Allowed values are 0ns, 2ns, 4ns, 6ns. + When phy-mode is set to "rgmii" then the TX delay should be + explicitly configured. When not configured a fallback of 2ns is + used. When the phy-mode is set to either "rgmii-id" or "rgmii-txid" + the TX clock delay is already provided by the PHY. In that case + this property should be set to 0ns (which disables the TX clock + delay in the MAC to prevent the clock from going off because both + PHY and MAC are adding a delay). + Any configuration is ignored when the phy-mode is set to "rmii". + +properties: + compatible: + additionalItems: true + maxItems: 3 + items: + - enum: + - amlogic,meson6-dwmac + - amlogic,meson8b-dwmac + - amlogic,meson8m2-dwmac + - amlogic,meson-gxbb-dwmac + - amlogic,meson-axg-dwmac + contains: + enum: + - snps,dwmac-3.70a + - snps,dwmac + + reg: + items: + - description: + The first register range should be the one of the DWMAC controller + - description: + The second range is is for the Amlogic specific configuration + (for example the PRG_ETHERNET register range on Meson8b and newer) + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + - phy-mode + +examples: + - | + ethmac: ethernet@c9410000 { + compatible = "amlogic,meson-gxbb-dwmac", "snps,dwmac"; + reg = <0xc9410000 0x10000>, <0xc8834540 0x8>; + interrupts = <8>; + interrupt-names = "macirq"; + clocks = <&clk_eth>, <&clkc_fclk_div2>, <&clk_mpll2>; + clock-names = "stmmaceth", "clkin0", "clkin1"; + phy-mode = "rgmii"; + }; diff --git a/dts/Bindings/net/aspeed,ast2600-mdio.yaml b/dts/Bindings/net/aspeed,ast2600-mdio.yaml new file mode 100644 index 0000000000..71808e78a4 --- /dev/null +++ b/dts/Bindings/net/aspeed,ast2600-mdio.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/aspeed,ast2600-mdio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ASPEED AST2600 MDIO Controller + +maintainers: + - Andrew Jeffery <andrew@aj.id.au> + +description: |+ + The ASPEED AST2600 MDIO controller is the third iteration of ASPEED's MDIO + bus register interface, this time also separating out the controller from the + MAC. + +allOf: + - $ref: "mdio.yaml#" + +properties: + compatible: + const: aspeed,ast2600-mdio + reg: + maxItems: 1 + description: The register range of the MDIO controller instance + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + +examples: + - | + mdio0: mdio@1e650000 { + compatible = "aspeed,ast2600-mdio"; + reg = <0x1e650000 0x8>; + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0>; + }; + }; diff --git a/dts/Bindings/net/broadcom-bluetooth.txt b/dts/Bindings/net/broadcom-bluetooth.txt index c26f4e1103..4fa00e2eaf 100644 --- a/dts/Bindings/net/broadcom-bluetooth.txt +++ b/dts/Bindings/net/broadcom-bluetooth.txt @@ -13,6 +13,7 @@ Required properties: * "brcm,bcm20702a1" * "brcm,bcm4330-bt" * "brcm,bcm43438-bt" + * "brcm,bcm4345c5" Optional properties: diff --git a/dts/Bindings/net/can/fsl-flexcan.txt b/dts/Bindings/net/can/fsl-flexcan.txt index bc77477c68..94c0f8bf4d 100644 --- a/dts/Bindings/net/can/fsl-flexcan.txt +++ b/dts/Bindings/net/can/fsl-flexcan.txt @@ -32,6 +32,15 @@ Optional properties: ack_gpr is the gpr register offset of CAN stop acknowledge. ack_bit is the bit offset of CAN stop acknowledge. +- fsl,clk-source: Select the clock source to the CAN Protocol Engine (PE). + It's SoC Implementation dependent. Refer to RM for detailed + definition. If this property is not set in device tree node + then driver selects clock source 1 by default. + 0: clock source 0 (oscillator clock) + 1: clock source 1 (peripheral clock) + +- wakeup-source: enable CAN remote wakeup + Example: can@1c000 { @@ -40,4 +49,5 @@ Example: interrupts = <48 0x2>; interrupt-parent = <&mpic>; clock-frequency = <200000000>; // filled in by bootloader + fsl,clk-source = <0>; // select clock source 0 for PE }; diff --git a/dts/Bindings/net/can/rcar_can.txt b/dts/Bindings/net/can/rcar_can.txt index b463e1268a..19e4a7d915 100644 --- a/dts/Bindings/net/can/rcar_can.txt +++ b/dts/Bindings/net/can/rcar_can.txt @@ -5,6 +5,7 @@ Required properties: - compatible: "renesas,can-r8a7743" if CAN controller is a part of R8A7743 SoC. "renesas,can-r8a7744" if CAN controller is a part of R8A7744 SoC. "renesas,can-r8a7745" if CAN controller is a part of R8A7745 SoC. + "renesas,can-r8a77470" if CAN controller is a part of R8A77470 SoC. "renesas,can-r8a774a1" if CAN controller is a part of R8A774A1 SoC. "renesas,can-r8a774c0" if CAN controller is a part of R8A774C0 SoC. "renesas,can-r8a7778" if CAN controller is a part of R8A7778 SoC. @@ -17,6 +18,8 @@ Required properties: "renesas,can-r8a7795" if CAN controller is a part of R8A7795 SoC. "renesas,can-r8a7796" if CAN controller is a part of R8A7796 SoC. "renesas,can-r8a77965" if CAN controller is a part of R8A77965 SoC. + "renesas,can-r8a77990" if CAN controller is a part of R8A77990 SoC. + "renesas,can-r8a77995" if CAN controller is a part of R8A77995 SoC. "renesas,rcar-gen1-can" for a generic R-Car Gen1 compatible device. "renesas,rcar-gen2-can" for a generic R-Car Gen2 or RZ/G1 compatible device. @@ -33,7 +36,8 @@ Required properties: - pinctrl-0: pin control group to be used for this controller. - pinctrl-names: must be "default". -Required properties for R8A7795, R8A7796 and R8A77965: +Required properties for R8A774A1, R8A774C0, R8A7795, R8A7796, R8A77965, +R8A77990, and R8A77995: For the denoted SoCs, "clkp2" can be CANFD clock. This is a div6 clock and can be used by both CAN and CAN FD controller at the same time. It needs to be scaled to maximum frequency if any of these controllers use it. This is done diff --git a/dts/Bindings/net/can/rcar_canfd.txt b/dts/Bindings/net/can/rcar_canfd.txt index 32f051f6d3..a901cd9be2 100644 --- a/dts/Bindings/net/can/rcar_canfd.txt +++ b/dts/Bindings/net/can/rcar_canfd.txt @@ -4,6 +4,7 @@ Renesas R-Car CAN FD controller Device Tree Bindings Required properties: - compatible: Must contain one or more of the following: - "renesas,rcar-gen3-canfd" for R-Car Gen3 and RZ/G2 compatible controllers. + - "renesas,r8a774a1-canfd" for R8A774A1 (RZ/G2M) compatible controller. - "renesas,r8a774c0-canfd" for R8A774C0 (RZ/G2E) compatible controller. - "renesas,r8a7795-canfd" for R8A7795 (R-Car H3) compatible controller. - "renesas,r8a7796-canfd" for R8A7796 (R-Car M3-W) compatible controller. @@ -11,6 +12,7 @@ Required properties: - "renesas,r8a77970-canfd" for R8A77970 (R-Car V3M) compatible controller. - "renesas,r8a77980-canfd" for R8A77980 (R-Car V3H) compatible controller. - "renesas,r8a77990-canfd" for R8A77990 (R-Car E3) compatible controller. + - "renesas,r8a77995-canfd" for R8A77995 (R-Car D3) compatible controller. When compatible with the generic version, nodes must list the SoC-specific version corresponding to the platform first, followed by the @@ -29,13 +31,12 @@ The name of the child nodes are "channel0" and "channel1" respectively. Each child node supports the "status" property only, which is used to enable/disable the respective channel. -Required properties for "renesas,r8a774c0-canfd", "renesas,r8a7795-canfd", -"renesas,r8a7796-canfd", "renesas,r8a77965-canfd", and "renesas,r8a77990-canfd" -compatible: -In R8A774C0, R8A7795, R8A7796, R8A77965, and R8A77990 SoCs, canfd clock is a -div6 clock and can be used by both CAN and CAN FD controller at the same time. -It needs to be scaled to maximum frequency if any of these controllers use it. -This is done using the below properties: +Required properties for R8A774A1, R8A774C0, R8A7795, R8A7796, R8A77965, +R8A77990, and R8A77995: +In the denoted SoCs, canfd clock is a div6 clock and can be used by both CAN +and CAN FD controller at the same time. It needs to be scaled to maximum +frequency if any of these controllers use it. This is done using the below +properties: - assigned-clocks: phandle of canfd clock. - assigned-clock-rates: maximum frequency of this clock. diff --git a/dts/Bindings/net/can/tcan4x5x.txt b/dts/Bindings/net/can/tcan4x5x.txt new file mode 100644 index 0000000000..27e1b4cebf --- /dev/null +++ b/dts/Bindings/net/can/tcan4x5x.txt @@ -0,0 +1,40 @@ +Texas Instruments TCAN4x5x CAN Controller +================================================ + +This file provides device node information for the TCAN4x5x interface contains. + +Required properties: + - compatible: "ti,tcan4x5x" + - reg: 0 + - #address-cells: 1 + - #size-cells: 0 + - spi-max-frequency: Maximum frequency of the SPI bus the chip can + operate at should be less than or equal to 18 MHz. + - device-wake-gpios: Wake up GPIO to wake up the TCAN device. + - interrupt-parent: the phandle to the interrupt controller which provides + the interrupt. + - interrupts: interrupt specification for data-ready. + +See Documentation/devicetree/bindings/net/can/m_can.txt for additional +required property details. + +Optional properties: + - reset-gpios: Hardwired output GPIO. If not defined then software + reset. + - device-state-gpios: Input GPIO that indicates if the device is in + a sleep state or if the device is active. + +Example: +tcan4x5x: tcan4x5x@0 { + compatible = "ti,tcan4x5x"; + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + spi-max-frequency = <10000000>; + bosch,mram-cfg = <0x0 0 0 32 0 0 1 1>; + interrupt-parent = <&gpio1>; + interrupts = <14 GPIO_ACTIVE_LOW>; + device-state-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>; + device-wake-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>; +}; diff --git a/dts/Bindings/net/dsa/ksz.txt b/dts/Bindings/net/dsa/ksz.txt index 113e7ac79a..95e91e8415 100644 --- a/dts/Bindings/net/dsa/ksz.txt +++ b/dts/Bindings/net/dsa/ksz.txt @@ -5,6 +5,9 @@ Required properties: - compatible: For external switch chips, compatible string must be exactly one of the following: + - "microchip,ksz8765" + - "microchip,ksz8794" + - "microchip,ksz8795" - "microchip,ksz9477" - "microchip,ksz9897" - "microchip,ksz9896" diff --git a/dts/Bindings/net/dsa/marvell.txt b/dts/Bindings/net/dsa/marvell.txt index 6f9538974b..30c11fea49 100644 --- a/dts/Bindings/net/dsa/marvell.txt +++ b/dts/Bindings/net/dsa/marvell.txt @@ -22,7 +22,7 @@ which is at a different MDIO base address in different switch families. - "marvell,mv88e6190" : Switch has base address 0x00. Use with models: 6190, 6190X, 6191, 6290, 6390, 6390X - "marvell,mv88e6250" : Switch has base address 0x08 or 0x18. Use with model: - 6250 + 6220, 6250 Required properties: - compatible : Should be one of "marvell,mv88e6085", diff --git a/dts/Bindings/net/dsa/mt7530.txt b/dts/Bindings/net/dsa/mt7530.txt index 47aa205ee0..c5ed5d25f6 100644 --- a/dts/Bindings/net/dsa/mt7530.txt +++ b/dts/Bindings/net/dsa/mt7530.txt @@ -35,6 +35,42 @@ Required properties for the child nodes within ports container: - phy-mode: String, must be either "trgmii" or "rgmii" for port labeled "cpu". +Port 5 of the switch is muxed between: +1. GMAC5: GMAC5 can interface with another external MAC or PHY. +2. PHY of port 0 or port 4: PHY interfaces with an external MAC like 2nd GMAC + of the SOC. Used in many setups where port 0/4 becomes the WAN port. + Note: On a MT7621 SOC with integrated switch: 2nd GMAC can only connected to + GMAC5 when the gpios for RGMII2 (GPIO 22-33) are not used and not + connected to external component! + +Port 5 modes/configurations: +1. Port 5 is disabled and isolated: An external phy can interface to the 2nd + GMAC of the SOC. + In the case of a build-in MT7530 switch, port 5 shares the RGMII bus with 2nd + GMAC and an optional external phy. Mind the GPIO/pinctl settings of the SOC! +2. Port 5 is muxed to PHY of port 0/4: Port 0/4 interfaces with 2nd GMAC. + It is a simple MAC to PHY interface, port 5 needs to be setup for xMII mode + and RGMII delay. +3. Port 5 is muxed to GMAC5 and can interface to an external phy. + Port 5 becomes an extra switch port. + Only works on platform where external phy TX<->RX lines are swapped. + Like in the Ubiquiti ER-X-SFP. +4. Port 5 is muxed to GMAC5 and interfaces with the 2nd GAMC as 2nd CPU port. + Currently a 2nd CPU port is not supported by DSA code. + +Depending on how the external PHY is wired: +1. normal: The PHY can only connect to 2nd GMAC but not to the switch +2. swapped: RGMII TX, RX are swapped; external phy interface with the switch as + a ethernet port. But can't interface to the 2nd GMAC. + +Based on the DT the port 5 mode is configured. + +Driver tries to lookup the phy-handle of the 2nd GMAC of the master device. +When phy-handle matches PHY of port 0 or 4 then port 5 set-up as mode 2. +phy-mode must be set, see also example 2 below! + * mt7621: phy-mode = "rgmii-txid"; + * mt7623: phy-mode = "rgmii"; + See Documentation/devicetree/bindings/net/dsa/dsa.txt for a list of additional required, optional properties and how the integrated switch subnodes must be specified. @@ -94,3 +130,181 @@ Example: }; }; }; + +Example 2: MT7621: Port 4 is WAN port: 2nd GMAC -> Port 5 -> PHY port 4. + +ð { + gmac0: mac@0 { + compatible = "mediatek,eth-mac"; + reg = <0>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + }; + }; + + gmac1: mac@1 { + compatible = "mediatek,eth-mac"; + reg = <1>; + phy-mode = "rgmii-txid"; + phy-handle = <&phy4>; + }; + + mdio: mdio-bus { + #address-cells = <1>; + #size-cells = <0>; + + /* Internal phy */ + phy4: ethernet-phy@4 { + reg = <4>; + }; + + mt7530: switch@1f { + compatible = "mediatek,mt7621"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x1f>; + pinctrl-names = "default"; + mediatek,mcm; + + resets = <&rstctrl 2>; + reset-names = "mcm"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan0"; + }; + + port@1 { + reg = <1>; + label = "lan1"; + }; + + port@2 { + reg = <2>; + label = "lan2"; + }; + + port@3 { + reg = <3>; + label = "lan3"; + }; + +/* Commented out. Port 4 is handled by 2nd GMAC. + port@4 { + reg = <4>; + label = "lan4"; + }; +*/ + + cpu_port0: port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&gmac0>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + }; + }; + }; + }; + }; +}; + +Example 3: MT7621: Port 5 is connected to external PHY: Port 5 -> external PHY. + +ð { + gmac0: mac@0 { + compatible = "mediatek,eth-mac"; + reg = <0>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + }; + }; + + mdio: mdio-bus { + #address-cells = <1>; + #size-cells = <0>; + + /* External phy */ + ephy5: ethernet-phy@7 { + reg = <7>; + }; + + mt7530: switch@1f { + compatible = "mediatek,mt7621"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x1f>; + pinctrl-names = "default"; + mediatek,mcm; + + resets = <&rstctrl 2>; + reset-names = "mcm"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan0"; + }; + + port@1 { + reg = <1>; + label = "lan1"; + }; + + port@2 { + reg = <2>; + label = "lan2"; + }; + + port@3 { + reg = <3>; + label = "lan3"; + }; + + port@4 { + reg = <4>; + label = "lan4"; + }; + + port@5 { + reg = <5>; + label = "lan5"; + phy-mode = "rgmii"; + phy-handle = <&ephy5>; + }; + + cpu_port0: port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&gmac0>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + }; + }; + }; + }; + }; +}; diff --git a/dts/Bindings/net/fsl-enetc.txt b/dts/Bindings/net/fsl-enetc.txt index 25fc687419..b7034ccbc1 100644 --- a/dts/Bindings/net/fsl-enetc.txt +++ b/dts/Bindings/net/fsl-enetc.txt @@ -11,7 +11,9 @@ Required properties: to parent node bindings. - compatible : Should be "fsl,enetc". -1) The ENETC external port is connected to a MDIO configurable phy: +1. The ENETC external port is connected to a MDIO configurable phy + +1.1. Using the local ENETC Port MDIO interface In this case, the ENETC node should include a "mdio" sub-node that in turn should contain the "ethernet-phy" node describing the @@ -47,8 +49,42 @@ Example: }; }; -2) The ENETC port is an internal port or has a fixed-link external -connection: +1.2. Using the central MDIO PCIe endpoint device + +In this case, the mdio node should be defined as another PCIe +endpoint node, at the same level with the ENETC port nodes. + +Required properties: + +- reg : Specifies PCIe Device Number and Function + Number of the ENETC endpoint device, according + to parent node bindings. +- compatible : Should be "fsl,enetc-mdio". + +The remaining required mdio bus properties are standard, their bindings +already defined in Documentation/devicetree/bindings/net/mdio.txt. + +Example: + + ethernet@0,0 { + compatible = "fsl,enetc"; + reg = <0x000000 0 0 0 0>; + phy-handle = <&sgmii_phy0>; + phy-connection-type = "sgmii"; + }; + + mdio@0,3 { + compatible = "fsl,enetc-mdio"; + reg = <0x000300 0 0 0 0>; + #address-cells = <1>; + #size-cells = <0>; + sgmii_phy0: ethernet-phy@2 { + reg = <0x2>; + }; + }; + +2. The ENETC port is an internal port or has a fixed-link external +connection In this case, the ENETC port node defines a fixed link connection, as specified by Documentation/devicetree/bindings/net/fixed-link.txt. diff --git a/dts/Bindings/net/mediatek-net.txt b/dts/Bindings/net/mediatek-net.txt index 770ff98d45..72d03e07cf 100644 --- a/dts/Bindings/net/mediatek-net.txt +++ b/dts/Bindings/net/mediatek-net.txt @@ -12,6 +12,7 @@ Required properties: "mediatek,mt7623-eth", "mediatek,mt2701-eth": for MT7623 SoC "mediatek,mt7622-eth": for MT7622 SoC "mediatek,mt7629-eth": for MT7629 SoC + "ralink,rt5350-eth": for Ralink Rt5350F and MT7628/88 SoC - reg: Address and length of the register set for the device - interrupts: Should contain the three frame engines interrupts in numeric order. These are fe_int0, fe_int1 and fe_int2. diff --git a/dts/Bindings/net/meson-dwmac.txt b/dts/Bindings/net/meson-dwmac.txt deleted file mode 100644 index 1321bb194e..0000000000 --- a/dts/Bindings/net/meson-dwmac.txt +++ /dev/null @@ -1,71 +0,0 @@ -* Amlogic Meson DWMAC Ethernet controller - -The device inherits all the properties of the dwmac/stmmac devices -described in the file stmmac.txt in the current directory with the -following changes. - -Required properties on all platforms: - -- compatible: Depending on the platform this should be one of: - - "amlogic,meson6-dwmac" - - "amlogic,meson8b-dwmac" - - "amlogic,meson8m2-dwmac" - - "amlogic,meson-gxbb-dwmac" - - "amlogic,meson-axg-dwmac" - Additionally "snps,dwmac" and any applicable more - detailed version number described in net/stmmac.txt - should be used. - -- reg: The first register range should be the one of the DWMAC - controller. The second range is is for the Amlogic specific - configuration (for example the PRG_ETHERNET register range - on Meson8b and newer) - -Required properties on Meson8b, Meson8m2, GXBB and newer: -- clock-names: Should contain the following: - - "stmmaceth" - see stmmac.txt - - "clkin0" - first parent clock of the internal mux - - "clkin1" - second parent clock of the internal mux - -Optional properties on Meson8b, Meson8m2, GXBB and newer: -- amlogic,tx-delay-ns: The internal RGMII TX clock delay (provided - by this driver) in nanoseconds. Allowed values - are: 0ns, 2ns, 4ns, 6ns. - When phy-mode is set to "rgmii" then the TX - delay should be explicitly configured. When - not configured a fallback of 2ns is used. - When the phy-mode is set to either "rgmii-id" - or "rgmii-txid" the TX clock delay is already - provided by the PHY. In that case this - property should be set to 0ns (which disables - the TX clock delay in the MAC to prevent the - clock from going off because both PHY and MAC - are adding a delay). - Any configuration is ignored when the phy-mode - is set to "rmii". - -Example for Meson6: - - ethmac: ethernet@c9410000 { - compatible = "amlogic,meson6-dwmac", "snps,dwmac"; - reg = <0xc9410000 0x10000 - 0xc1108108 0x4>; - interrupts = <0 8 1>; - interrupt-names = "macirq"; - clocks = <&clk81>; - clock-names = "stmmaceth"; - } - -Example for GXBB: - ethmac: ethernet@c9410000 { - compatible = "amlogic,meson-gxbb-dwmac", "snps,dwmac"; - reg = <0x0 0xc9410000 0x0 0x10000>, - <0x0 0xc8834540 0x0 0x8>; - interrupts = <0 8 1>; - interrupt-names = "macirq"; - clocks = <&clkc CLKID_ETH>, - <&clkc CLKID_FCLK_DIV2>, - <&clkc CLKID_MPLL2>; - clock-names = "stmmaceth", "clkin0", "clkin1"; - phy-mode = "rgmii"; - }; diff --git a/dts/Bindings/net/micrel-ksz90x1.txt b/dts/Bindings/net/micrel-ksz90x1.txt index 5100358177..b921731cd9 100644 --- a/dts/Bindings/net/micrel-ksz90x1.txt +++ b/dts/Bindings/net/micrel-ksz90x1.txt @@ -12,8 +12,36 @@ and therefore may overwrite them. KSZ9021: All skew control options are specified in picoseconds. The minimum - value is 0, the maximum value is 3000, and it is incremented by 200ps - steps. + value is 0, the maximum value is 3000, and it can be specified in 200ps + steps, *but* these values are in not fact what you get because this chip's + skew values actually increase in 120ps steps, starting from -840ps. The + incorrect values came from an error in the original KSZ9021 datasheet + before it was corrected in revision 1.2 (Feb 2014), but it is too late to + change the driver now because of the many existing device trees that have + been created using values that go up in increments of 200. + + The following table shows the actual skew delay you will get for each of the + possible devicetree values, and the number that will be programmed into the + corresponding pad skew register: + + Device Tree Value Delay Pad Skew Register Value + ----------------------------------------------------- + 0 -840ps 0000 + 200 -720ps 0001 + 400 -600ps 0010 + 600 -480ps 0011 + 800 -360ps 0100 + 1000 -240ps 0101 + 1200 -120ps 0110 + 1400 0ps 0111 + 1600 120ps 1000 + 1800 240ps 1001 + 2000 360ps 1010 + 2200 480ps 1011 + 2400 600ps 1100 + 2600 720ps 1101 + 2800 840ps 1110 + 3000 960ps 1111 Optional properties: diff --git a/dts/Bindings/net/mscc-ocelot.txt b/dts/Bindings/net/mscc-ocelot.txt index 9e5c17d426..3b6290b45c 100644 --- a/dts/Bindings/net/mscc-ocelot.txt +++ b/dts/Bindings/net/mscc-ocelot.txt @@ -12,13 +12,15 @@ Required properties: - "sys" - "rew" - "qs" + - "ptp" (optional due to backward compatibility) - "qsys" - "ana" - "portX" with X from 0 to the number of last port index available on that switch -- interrupts: Should contain the switch interrupts for frame extraction and - frame injection -- interrupt-names: should contain the interrupt names: "xtr", "inj" +- interrupts: Should contain the switch interrupts for frame extraction, + frame injection and PTP ready. +- interrupt-names: should contain the interrupt names: "xtr", "inj". Can contain + "ptp_rdy" which is optional due to backward compatibility. - ethernet-ports: A container for child nodes representing switch ports. The ethernet-ports container has the following properties @@ -44,6 +46,7 @@ Example: reg = <0x1010000 0x10000>, <0x1030000 0x10000>, <0x1080000 0x100>, + <0x10e0000 0x10000>, <0x11e0000 0x100>, <0x11f0000 0x100>, <0x1200000 0x100>, @@ -57,11 +60,12 @@ Example: <0x1280000 0x100>, <0x1800000 0x80000>, <0x1880000 0x10000>; - reg-names = "sys", "rew", "qs", "port0", "port1", "port2", - "port3", "port4", "port5", "port6", "port7", - "port8", "port9", "port10", "qsys", "ana"; - interrupts = <21 22>; - interrupt-names = "xtr", "inj"; + reg-names = "sys", "rew", "qs", "ptp", "port0", "port1", + "port2", "port3", "port4", "port5", "port6", + "port7", "port8", "port9", "port10", "qsys", + "ana"; + interrupts = <18 21 22>; + interrupt-names = "ptp_rdy", "xtr", "inj"; ethernet-ports { #address-cells = <1>; diff --git a/dts/Bindings/net/renesas,ravb.txt b/dts/Bindings/net/renesas,ravb.txt index 7ad3621309..5df4aa7f68 100644 --- a/dts/Bindings/net/renesas,ravb.txt +++ b/dts/Bindings/net/renesas,ravb.txt @@ -18,6 +18,7 @@ Required properties: R-Car Gen2 and RZ/G1 devices. - "renesas,etheravb-r8a774a1" for the R8A774A1 SoC. + - "renesas,etheravb-r8a774b1" for the R8A774B1 SoC. - "renesas,etheravb-r8a774c0" for the R8A774C0 SoC. - "renesas,etheravb-r8a7795" for the R8A7795 SoC. - "renesas,etheravb-r8a7796" for the R8A7796 SoC. diff --git a/dts/Bindings/net/snps,dwmac.yaml b/dts/Bindings/net/snps,dwmac.yaml index 76fea2be66..4845e29411 100644 --- a/dts/Bindings/net/snps,dwmac.yaml +++ b/dts/Bindings/net/snps,dwmac.yaml @@ -50,6 +50,11 @@ properties: - allwinner,sun8i-r40-emac - allwinner,sun8i-v3s-emac - allwinner,sun50i-a64-emac + - amlogic,meson6-dwmac + - amlogic,meson8b-dwmac + - amlogic,meson8m2-dwmac + - amlogic,meson-gxbb-dwmac + - amlogic,meson-axg-dwmac - snps,dwmac - snps,dwmac-3.50a - snps,dwmac-3.610 @@ -61,7 +66,8 @@ properties: - snps,dwxgmac-2.10 reg: - maxItems: 1 + minItems: 1 + maxItems: 2 interrupts: minItems: 1 @@ -106,6 +112,14 @@ properties: reset-names: const: stmmaceth + mac-mode: + $ref: ethernet-controller.yaml#/properties/phy-connection-type + description: + The property is identical to 'phy-mode', and assumes that there is mode + converter in-between the MAC & PHY (e.g. GMII-to-RGMII). This converter + can be passive (no SW requirement), and requires that the MAC operate + in a different mode than the PHY in order to function. + snps,axi-config: $ref: /schemas/types.yaml#definitions/phandle description: diff --git a/dts/Bindings/net/ti,dp83867.txt b/dts/Bindings/net/ti,dp83867.txt index db6aa3f221..388ff48f53 100644 --- a/dts/Bindings/net/ti,dp83867.txt +++ b/dts/Bindings/net/ti,dp83867.txt @@ -37,6 +37,10 @@ Optional property: for applicable values. The CLK_OUT pin can also be disabled by this property. When omitted, the PHY's default will be left as is. + - ti,sgmii-ref-clock-output-enable - This denotes which + SGMII configuration is used (4 or 6-wire modes). + Some MACs work with differential SGMII clock. + See data manual for details. Note: ti,min-output-impedance and ti,max-output-impedance are mutually exclusive. When both properties are present ti,max-output-impedance diff --git a/dts/Bindings/nvmem/imx-ocotp.txt b/dts/Bindings/nvmem/imx-ocotp.txt index 96ffd06d2c..904dadf3d0 100644 --- a/dts/Bindings/nvmem/imx-ocotp.txt +++ b/dts/Bindings/nvmem/imx-ocotp.txt @@ -2,7 +2,7 @@ Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings This binding represents the on-chip eFuse OTP controller found on i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX, i.MX6UL, i.MX6ULL/ULZ, i.MX6SLL, -i.MX7D/S, i.MX7ULP and i.MX8MQ SoCs. +i.MX7D/S, i.MX7ULP, i.MX8MQ, i.MX8MM and i.MX8MN SoCs. Required properties: - compatible: should be one of @@ -16,6 +16,7 @@ Required properties: "fsl,imx7ulp-ocotp" (i.MX7ULP), "fsl,imx8mq-ocotp" (i.MX8MQ), "fsl,imx8mm-ocotp" (i.MX8MM), + "fsl,imx8mn-ocotp" (i.MX8MN), followed by "syscon". - #address-cells : Should be 1 - #size-cells : Should be 1 diff --git a/dts/Bindings/opp/opp.txt b/dts/Bindings/opp/opp.txt index 76b6c79604..6859227146 100644 --- a/dts/Bindings/opp/opp.txt +++ b/dts/Bindings/opp/opp.txt @@ -140,8 +140,8 @@ Optional properties: frequency for a short duration of time limited by the device's power, current and thermal limits. -- opp-suspend: Marks the OPP to be used during device suspend. Only one OPP in - the table should have this. +- opp-suspend: Marks the OPP to be used during device suspend. If multiple OPPs + in the table have this, the OPP with highest opp-hz will be used. - opp-supported-hw: This enables us to select only a subset of OPPs from the larger OPP table, based on what version of the hardware we are running on. We diff --git a/dts/Bindings/opp/kryo-cpufreq.txt b/dts/Bindings/opp/qcom-nvmem-cpufreq.txt index c2127b9680..4751029b9b 100644 --- a/dts/Bindings/opp/kryo-cpufreq.txt +++ b/dts/Bindings/opp/qcom-nvmem-cpufreq.txt @@ -1,25 +1,38 @@ -Qualcomm Technologies, Inc. KRYO CPUFreq and OPP bindings +Qualcomm Technologies, Inc. NVMEM CPUFreq and OPP bindings =================================== -In Certain Qualcomm Technologies, Inc. SoCs like apq8096 and msm8996 -that have KRYO processors, the CPU ferequencies subset and voltage value -of each OPP varies based on the silicon variant in use. +In Certain Qualcomm Technologies, Inc. SoCs like apq8096 and msm8996, +the CPU frequencies subset and voltage value of each OPP varies based on +the silicon variant in use. Qualcomm Technologies, Inc. Process Voltage Scaling Tables defines the voltage and frequency value based on the msm-id in SMEM and speedbin blown in the efuse combination. -The qcom-cpufreq-kryo driver reads the msm-id and efuse value from the SoC +The qcom-cpufreq-nvmem driver reads the msm-id and efuse value from the SoC to provide the OPP framework with required information (existing HW bitmap). This is used to determine the voltage and frequency value for each OPP of operating-points-v2 table when it is parsed by the OPP framework. Required properties: -------------------- -In 'cpus' nodes: +In 'cpu' nodes: - operating-points-v2: Phandle to the operating-points-v2 table to use. In 'operating-points-v2' table: - compatible: Should be - 'operating-points-v2-kryo-cpu' for apq8096 and msm8996. + +Optional properties: +-------------------- +In 'cpu' nodes: +- power-domains: A phandle pointing to the PM domain specifier which provides + the performance states available for active state management. + Please refer to the power-domains bindings + Documentation/devicetree/bindings/power/power_domain.txt + and also examples below. +- power-domain-names: Should be + - 'cpr' for qcs404. + +In 'operating-points-v2' table: - nvmem-cells: A phandle pointing to a nvmem-cells node representing the efuse registers that has information about the speedbin that is used to select the right frequency/voltage @@ -678,3 +691,105 @@ soc { }; }; }; + +Example 2: +--------- + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + CPU0: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x100>; + .... + clocks = <&apcs_glb>; + operating-points-v2 = <&cpu_opp_table>; + power-domains = <&cpr>; + power-domain-names = "cpr"; + }; + + CPU1: cpu@101 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x101>; + .... + clocks = <&apcs_glb>; + operating-points-v2 = <&cpu_opp_table>; + power-domains = <&cpr>; + power-domain-names = "cpr"; + }; + + CPU2: cpu@102 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x102>; + .... + clocks = <&apcs_glb>; + operating-points-v2 = <&cpu_opp_table>; + power-domains = <&cpr>; + power-domain-names = "cpr"; + }; + + CPU3: cpu@103 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x103>; + .... + clocks = <&apcs_glb>; + operating-points-v2 = <&cpu_opp_table>; + power-domains = <&cpr>; + power-domain-names = "cpr"; + }; + }; + + cpu_opp_table: cpu-opp-table { + compatible = "operating-points-v2-kryo-cpu"; + opp-shared; + + opp-1094400000 { + opp-hz = /bits/ 64 <1094400000>; + required-opps = <&cpr_opp1>; + }; + opp-1248000000 { + opp-hz = /bits/ 64 <1248000000>; + required-opps = <&cpr_opp2>; + }; + opp-1401600000 { + opp-hz = /bits/ 64 <1401600000>; + required-opps = <&cpr_opp3>; + }; + }; + + cpr_opp_table: cpr-opp-table { + compatible = "operating-points-v2-qcom-level"; + + cpr_opp1: opp1 { + opp-level = <1>; + qcom,opp-fuse-level = <1>; + }; + cpr_opp2: opp2 { + opp-level = <2>; + qcom,opp-fuse-level = <2>; + }; + cpr_opp3: opp3 { + opp-level = <3>; + qcom,opp-fuse-level = <3>; + }; + }; + +.... + +soc { +.... + cpr: power-controller@b018000 { + compatible = "qcom,qcs404-cpr", "qcom,cpr"; + reg = <0x0b018000 0x1000>; + .... + vdd-apc-supply = <&pms405_s3>; + #power-domain-cells = <0>; + operating-points-v2 = <&cpr_opp_table>; + .... + }; +}; diff --git a/dts/Bindings/opp/qcom-opp.txt b/dts/Bindings/opp/qcom-opp.txt new file mode 100644 index 0000000000..32eb0793c7 --- /dev/null +++ b/dts/Bindings/opp/qcom-opp.txt @@ -0,0 +1,19 @@ +Qualcomm OPP bindings to describe OPP nodes + +The bindings are based on top of the operating-points-v2 bindings +described in Documentation/devicetree/bindings/opp/opp.txt +Additional properties are described below. + +* OPP Table Node + +Required properties: +- compatible: Allow OPPs to express their compatibility. It should be: + "operating-points-v2-qcom-level" + +* OPP Node + +Required properties: +- qcom,opp-fuse-level: A positive value representing the fuse corner/level + associated with this OPP node. Sometimes several corners/levels shares + a certain fuse corner/level. A fuse corner/level contains e.g. ref uV, + min uV, and max uV. diff --git a/dts/Bindings/opp/sun50i-nvmem-cpufreq.txt b/dts/Bindings/opp/sun50i-nvmem-cpufreq.txt new file mode 100644 index 0000000000..7deae57a58 --- /dev/null +++ b/dts/Bindings/opp/sun50i-nvmem-cpufreq.txt @@ -0,0 +1,167 @@ +Allwinner Technologies, Inc. NVMEM CPUFreq and OPP bindings +=================================== + +For some SoCs, the CPU frequency subset and voltage value of each OPP +varies based on the silicon variant in use. Allwinner Process Voltage +Scaling Tables defines the voltage and frequency value based on the +speedbin blown in the efuse combination. The sun50i-cpufreq-nvmem driver +reads the efuse value from the SoC to provide the OPP framework with +required information. + +Required properties: +-------------------- +In 'cpus' nodes: +- operating-points-v2: Phandle to the operating-points-v2 table to use. + +In 'operating-points-v2' table: +- compatible: Should be + - 'allwinner,sun50i-h6-operating-points'. +- nvmem-cells: A phandle pointing to a nvmem-cells node representing the + efuse registers that has information about the speedbin + that is used to select the right frequency/voltage value + pair. Please refer the for nvmem-cells bindings + Documentation/devicetree/bindings/nvmem/nvmem.txt and + also examples below. + +In every OPP node: +- opp-microvolt-<name>: Voltage in micro Volts. + At runtime, the platform can pick a <name> and + matching opp-microvolt-<name> property. + [See: opp.txt] + HW: <name>: + sun50i-h6 speed0 speed1 speed2 + +Example 1: +--------- + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + compatible = "arm,cortex-a53"; + device_type = "cpu"; + reg = <0>; + enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; + clock-latency-ns = <244144>; /* 8 32k periods */ + operating-points-v2 = <&cpu_opp_table>; + #cooling-cells = <2>; + }; + + cpu1: cpu@1 { + compatible = "arm,cortex-a53"; + device_type = "cpu"; + reg = <1>; + enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; + clock-latency-ns = <244144>; /* 8 32k periods */ + operating-points-v2 = <&cpu_opp_table>; + #cooling-cells = <2>; + }; + + cpu2: cpu@2 { + compatible = "arm,cortex-a53"; + device_type = "cpu"; + reg = <2>; + enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; + clock-latency-ns = <244144>; /* 8 32k periods */ + operating-points-v2 = <&cpu_opp_table>; + #cooling-cells = <2>; + }; + + cpu3: cpu@3 { + compatible = "arm,cortex-a53"; + device_type = "cpu"; + reg = <3>; + enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; + clock-latency-ns = <244144>; /* 8 32k periods */ + operating-points-v2 = <&cpu_opp_table>; + #cooling-cells = <2>; + }; + }; + + cpu_opp_table: opp_table { + compatible = "allwinner,sun50i-h6-operating-points"; + nvmem-cells = <&speedbin_efuse>; + opp-shared; + + opp@480000000 { + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-hz = /bits/ 64 <480000000>; + + opp-microvolt-speed0 = <880000>; + opp-microvolt-speed1 = <820000>; + opp-microvolt-speed2 = <800000>; + }; + + opp@720000000 { + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-hz = /bits/ 64 <720000000>; + + opp-microvolt-speed0 = <880000>; + opp-microvolt-speed1 = <820000>; + opp-microvolt-speed2 = <800000>; + }; + + opp@816000000 { + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-hz = /bits/ 64 <816000000>; + + opp-microvolt-speed0 = <880000>; + opp-microvolt-speed1 = <820000>; + opp-microvolt-speed2 = <800000>; + }; + + opp@888000000 { + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-hz = /bits/ 64 <888000000>; + + opp-microvolt-speed0 = <940000>; + opp-microvolt-speed1 = <820000>; + opp-microvolt-speed2 = <800000>; + }; + + opp@1080000000 { + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-hz = /bits/ 64 <1080000000>; + + opp-microvolt-speed0 = <1060000>; + opp-microvolt-speed1 = <880000>; + opp-microvolt-speed2 = <840000>; + }; + + opp@1320000000 { + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-hz = /bits/ 64 <1320000000>; + + opp-microvolt-speed0 = <1160000>; + opp-microvolt-speed1 = <940000>; + opp-microvolt-speed2 = <900000>; + }; + + opp@1488000000 { + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-hz = /bits/ 64 <1488000000>; + + opp-microvolt-speed0 = <1160000>; + opp-microvolt-speed1 = <1000000>; + opp-microvolt-speed2 = <960000>; + }; + }; +.... +soc { +.... + sid: sid@3006000 { + compatible = "allwinner,sun50i-h6-sid"; + reg = <0x03006000 0x400>; + #address-cells = <1>; + #size-cells = <1>; + .... + speedbin_efuse: speed@1c { + reg = <0x1c 4>; + }; + }; +}; diff --git a/dts/Bindings/pci/designware-pcie.txt b/dts/Bindings/pci/designware-pcie.txt index 5561a1c060..78494c4050 100644 --- a/dts/Bindings/pci/designware-pcie.txt +++ b/dts/Bindings/pci/designware-pcie.txt @@ -11,7 +11,6 @@ Required properties: the ATU address space. (The old way of getting the configuration address space from "ranges" is deprecated and should be avoided.) -- num-lanes: number of lanes to use RC mode: - #address-cells: set to <3> - #size-cells: set to <2> @@ -34,6 +33,11 @@ Optional properties: - clock-names: Must include the following entries: - "pcie" - "pcie_bus" +- snps,enable-cdm-check: This is a boolean property and if present enables + automatic checking of CDM (Configuration Dependent Module) registers + for data corruption. CDM registers include standard PCIe configuration + space registers, Port Logic registers, DMA and iATU (internal Address + Translation Unit) registers. RC mode: - num-viewport: number of view ports configured in hardware. If a platform d |