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| author | Lucas Stach <l.stach@pengutronix.de> | 2022-12-07 23:09:24 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2022-12-09 08:10:38 +0100 |
| commit | 203c8e3a7cafc7e39273b7eefe2984fee951cc11 (patch) | |
| tree | 6537cec685872ce0d059a1614ecc7fba1ed62090 | |
| parent | ddc58eaa2ae31242dd652b5c19467c21a6f17291 (diff) | |
| download | barebox-203c8e3a7cafc7e39273b7eefe2984fee951cc11.tar.gz barebox-203c8e3a7cafc7e39273b7eefe2984fee951cc11.tar.xz | |
ARM: phytec-som-imx8mq: include DDR firmware in image
This board uses the legacy DRAM initialization and doesn't call
imx8mq_ddr_init(), so there is no point where the DRAM firmware is
referenced from the image. Fix this by calling ddr_get_firmware()
from the legacy DRAM init.
Fixes: e770d18108de ("ARM: i.MX8M: include only necessary ddrphy firmwares in image")
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Link: https://lore.barebox.org/20221207220924.148327-4-l.stach@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| -rw-r--r-- | arch/arm/boards/phytec-som-imx8mq/ddrphy_train.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boards/phytec-som-imx8mq/ddrphy_train.c b/arch/arm/boards/phytec-som-imx8mq/ddrphy_train.c index 2c84a0f5fd..2ed6578093 100644 --- a/arch/arm/boards/phytec-som-imx8mq/ddrphy_train.c +++ b/arch/arm/boards/phytec-som-imx8mq/ddrphy_train.c @@ -12,6 +12,8 @@ void ddr_cfg_phy(void) { unsigned int tmp, tmp_t; + ddr_get_firmware(DRAM_TYPE_LPDDR4); + //Init DDRPHY register... reg32_write(0x3c080440,0x2); reg32_write(0x3c080444,0x3); |