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author | Pierre-Olivier Huard <pierre-olivier.huard@rtone.fr> | 2024-02-15 13:01:39 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2024-02-16 13:01:49 +0100 |
commit | 21cdaeab3cf35a889dffffabaecbe8d1cf02bca9 (patch) | |
tree | 8500468cb7701dac3660f8548d8b79ffbb2ac8e1 | |
parent | 749e11023eb8dacd994cae7b0c286b03bc090ffc (diff) | |
download | barebox-21cdaeab3cf3.tar.gz barebox-21cdaeab3cf3.tar.xz |
mci: bcm2835: support 8bit bus width
Using Raspberry Pi CM4s target generate a warning:
WARNING: bcm2835_mci fe340000.mmc@7e340000.of: Unsupported width received: 3
mmc0: mci_send_ext_csd failed with -5
Adding the support of 8 bits bus width resolve the issue.
Signed-off-by: Pierre-Olivier Huard <pierre-olivier.huard@rtone.fr>
Link: https://lore.barebox.org/20240215120139.23881-1-pierre-olivier.huard@rtone.fr
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r-- | drivers/mci/mci-bcm2835.c | 7 | ||||
-rw-r--r-- | drivers/mci/mci-bcm2835.h | 1 |
2 files changed, 8 insertions, 0 deletions
diff --git a/drivers/mci/mci-bcm2835.c b/drivers/mci/mci-bcm2835.c index 2b541e4c05..35cf0c4241 100644 --- a/drivers/mci/mci-bcm2835.c +++ b/drivers/mci/mci-bcm2835.c @@ -225,6 +225,13 @@ static void bcm2835_mci_set_ios(struct mci_host *mci, struct mci_ios *ios) SDHCI_HOST_CONTROL__POWER_CONTROL__BLOCK_GAP_CONTROL); switch (ios->bus_width) { + case MMC_BUS_WIDTH_8: + sdhci_write32(&host->sdhci, + SDHCI_HOST_CONTROL__POWER_CONTROL__BLOCK_GAP_CONTROL, + (current_val & ~CONTROL0_4DATA) | CONTROL0_8DATA); + host->bus_width = 2; + dev_dbg(host->hw_dev, "Changing bus width to 8\n"); + break; case MMC_BUS_WIDTH_4: sdhci_write32(&host->sdhci, SDHCI_HOST_CONTROL__POWER_CONTROL__BLOCK_GAP_CONTROL, diff --git a/drivers/mci/mci-bcm2835.h b/drivers/mci/mci-bcm2835.h index 608764c23d..71448642ad 100644 --- a/drivers/mci/mci-bcm2835.h +++ b/drivers/mci/mci-bcm2835.h @@ -10,6 +10,7 @@ #define CONTROL0_HISPEED (1 << 2) #define CONTROL0_4DATA (1 << 1) +#define CONTROL0_8DATA (1 << 5) #define CONTROL1_DATARST (1 << 26) #define CONTROL1_CMDRST (1 << 25) |