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authorSascha Hauer <s.hauer@pengutronix.de>2019-11-08 09:25:39 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2019-11-08 09:25:41 +0100
commit38b62d07a6109f7e00714316afbe2aead8c3dfa3 (patch)
tree06f55f19ac5b4f83255a898c30211cea507cf7c1
parent422069498f814b3fd02e2dd7ec231258865b0ca0 (diff)
downloadbarebox-38b62d07a6109f7e00714316afbe2aead8c3dfa3.tar.gz
ARM: mmu-early: On i.MX6 with HAB map ROM is mapped without XN
On i.MX6 with HAB enabled we call into the ROM later in imx6_hab_get_status(). This only works when the XN bit is not set for this area, so remap the first MiB as cached which doesn't have the XN bit set. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r--arch/arm/cpu/mmu-early.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/cpu/mmu-early.c b/arch/arm/cpu/mmu-early.c
index 7c30526..b985aa4 100644
--- a/arch/arm/cpu/mmu-early.c
+++ b/arch/arm/cpu/mmu-early.c
@@ -58,5 +58,12 @@ void mmu_early_enable(unsigned long membase, unsigned long memsize,
/* maps main memory as cachable */
map_region(membase, memsize, PMD_SECT_DEF_CACHED);
+ /*
+ * With HAB enabled we call into the ROM code later in imx6_hab_get_status().
+ * Map the ROM cached which has the effect that the XN bit is not set.
+ */
+ if (IS_ENABLED(CONFIG_HABV4) && IS_ENABLED(CONFIG_ARCH_IMX6))
+ map_region(0x0, SZ_1M, PMD_SECT_DEF_CACHED);
+
__mmu_cache_on();
}