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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2018-12-07 08:12:40 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-12-07 08:12:40 +0100 |
| commit | 4f23fb1070262255443d5fe0c5db757b1b8ea2c2 (patch) | |
| tree | cc5935ef43329e2202e3ad55e034df5561162e66 | |
| parent | 05bc268ec5c5bcf1eca52f2aaa9ebdcaf2edee25 (diff) | |
| parent | 1d3735498ace79322db05cf36c5ab595dd0c8112 (diff) | |
| download | barebox-4f23fb1070262255443d5fe0c5db757b1b8ea2c2.tar.gz barebox-4f23fb1070262255443d5fe0c5db757b1b8ea2c2.tar.xz | |
Merge branch 'for-next/mtd'
| -rw-r--r-- | drivers/mtd/core.c | 3 | ||||
| -rw-r--r-- | drivers/mtd/nand/nand_base.c | 18 | ||||
| -rw-r--r-- | drivers/mtd/nand/nand_denali.c | 2 | ||||
| -rw-r--r-- | drivers/mtd/spi-nor/spi-nor.c | 2 |
4 files changed, 24 insertions, 1 deletions
diff --git a/drivers/mtd/core.c b/drivers/mtd/core.c index 56e85b3d8f..d3cbe502fa 100644 --- a/drivers/mtd/core.c +++ b/drivers/mtd/core.c @@ -178,6 +178,9 @@ static int mtd_op_erase(struct cdev *cdev, loff_t count, loff_t offset) loff_t addr; int ret; + if (mtd->flags & MTD_NO_ERASE) + return -EOPNOTSUPP; + ret = mtd_erase_align(mtd, &count, &offset); if (ret) return ret; diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index ccf9615042..128802fa5c 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -852,6 +852,15 @@ int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len) chip->select_chip(mtd, chipnr); + /* + * Reset the chip. + * If we want to check the WP through READ STATUS and check the bit 7 + * we must reset the chip + * some operation can also clear the bit 7 of status register + * eg. erase/program a locked block + */ + chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); + /* Check, if it is write protected */ if (nand_check_wp(mtd)) { pr_debug("%s: device is write protected!\n", @@ -902,6 +911,15 @@ int nand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len) chip->select_chip(mtd, chipnr); + /* + * Reset the chip. + * If we want to check the WP through READ STATUS and check the bit 7 + * we must reset the chip + * some operation can also clear the bit 7 of status register + * eg. erase/program a locked block + */ + chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); + /* Check, if it is write protected */ if (nand_check_wp(mtd)) { pr_debug("%s: device is write protected!\n", diff --git a/drivers/mtd/nand/nand_denali.c b/drivers/mtd/nand/nand_denali.c index ef3395864c..2561966243 100644 --- a/drivers/mtd/nand/nand_denali.c +++ b/drivers/mtd/nand/nand_denali.c @@ -511,7 +511,7 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali) get_hynix_nand_para(denali, device_id); } - dev_info(denali->dev, + dev_dbg(denali->dev, "Dump timing register values:\n" "acc_clks: %d, re_2_we: %d, re_2_re: %d\n" "we_2_re: %d, addr_2_data: %d, rdwr_en_lo_cnt: %d\n" diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index d15a795413..85b55c6982 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -594,6 +594,8 @@ static const struct spi_device_id spi_nor_ids[] = { { "sst25wf512", INFO(0xbf2501, 0, 64 * 1024, 1, SECT_4K | SST_WRITE) }, { "sst25wf010", INFO(0xbf2502, 0, 64 * 1024, 2, SECT_4K | SST_WRITE) }, { "sst25wf020", INFO(0xbf2503, 0, 64 * 1024, 4, SECT_4K | SST_WRITE) }, + { "sst25wf020a", INFO(0x621612, 0, 64 * 1024, 4, SECT_4K) }, + { "sst25wf040b", INFO(0x621613, 0, 64 * 1024, 8, SECT_4K) }, { "sst25wf040", INFO(0xbf2504, 0, 64 * 1024, 8, SECT_4K | SST_WRITE) }, { "sst25wf080", INFO(0xbf2505, 0, 64 * 1024, 16, SECT_4K | SST_WRITE) }, |