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authorLucas Stach <dev@lynxeye.de>2020-01-06 21:29:44 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2020-01-08 12:24:55 +0100
commit536a4a5b5dade4e8e6ec37ff48fd4a8d4cdca860 (patch)
tree82f33ba1acbb98d6f3ffe2ffe2115cb309eef173
parentb53e8d86c00eed24574ba57ff87f3af5ed7aa816 (diff)
downloadbarebox-536a4a5b5dade4e8e6ec37ff48fd4a8d4cdca860.tar.gz
barebox-536a4a5b5dade4e8e6ec37ff48fd4a8d4cdca860.tar.xz
ARM: zynq: add Zynq specific lowlevel CPU init function
This adds a Zynq specific CPU lowlevel init function, which applies the required workarounds for the Cortex A9 r3p0 core. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r--arch/arm/mach-zynq/Makefile1
-rw-r--r--arch/arm/mach-zynq/cpu_init.c15
-rw-r--r--arch/arm/mach-zynq/include/mach/init.h8
3 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/mach-zynq/Makefile b/arch/arm/mach-zynq/Makefile
index c88ab4666f..06c2ce996c 100644
--- a/arch/arm/mach-zynq/Makefile
+++ b/arch/arm/mach-zynq/Makefile
@@ -1 +1,2 @@
obj-y += zynq.o bootm-zynqimg.o
+lwl-y += cpu_init.o
diff --git a/arch/arm/mach-zynq/cpu_init.c b/arch/arm/mach-zynq/cpu_init.c
new file mode 100644
index 0000000000..ec5ee59e16
--- /dev/null
+++ b/arch/arm/mach-zynq/cpu_init.c
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <common.h>
+#include <asm/barebox-arm-head.h>
+#include <asm/errata.h>
+#include <mach/init.h>
+
+void zynq_cpu_lowlevel_init(void)
+{
+ arm_cpu_lowlevel_init();
+
+ enable_arm_errata_761320_war();
+ enable_arm_errata_794072_war();
+ enable_arm_errata_845369_war();
+}
diff --git a/arch/arm/mach-zynq/include/mach/init.h b/arch/arm/mach-zynq/include/mach/init.h
new file mode 100644
index 0000000000..c458f602e4
--- /dev/null
+++ b/arch/arm/mach-zynq/include/mach/init.h
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef __MACH_INIT_H
+#define __MACH_INIT_H
+
+void zynq_cpu_lowlevel_init(void);
+
+#endif