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authorSascha Hauer <s.hauer@pengutronix.de>2019-08-26 10:49:06 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2019-08-26 10:51:04 +0200
commit5723266adbaf7b835c9bee4ca1ca05a96f1bb25c (patch)
tree8d02783b2650280ff1f6d9cc5efa17109bb66fa1
parenta4cea873ff85d95c6f184cdef78a5d3ff0af5e1e (diff)
downloadbarebox-5723266adbaf7b835c9bee4ca1ca05a96f1bb25c.tar.gz
barebox-5723266adbaf7b835c9bee4ca1ca05a96f1bb25c.tar.xz
mtd: nand: denali: Add variables for mtd_info and nand_chip
Accessing the mtd_info from the nand_chip will change in the next patch, so instead of accessing it each time when used create a variable for mtd_info to keep the next patch smaller. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r--drivers/mtd/nand/nand_denali.c103
1 files changed, 52 insertions, 51 deletions
diff --git a/drivers/mtd/nand/nand_denali.c b/drivers/mtd/nand/nand_denali.c
index 2561966243..f55e2bd5b0 100644
--- a/drivers/mtd/nand/nand_denali.c
+++ b/drivers/mtd/nand/nand_denali.c
@@ -1372,6 +1372,8 @@ static void denali_drv_init(struct denali_nand_info *denali)
int denali_init(struct denali_nand_info *denali)
{
+ struct nand_chip *nand = &denali->nand;
+ struct mtd_info *mtd = &denali->mtd;
int ret = 0;
uint32_t val;
@@ -1396,15 +1398,15 @@ int denali_init(struct denali_nand_info *denali)
denali_drv_init(denali);
denali_set_intr_modes(denali, true);
- denali->mtd.name = "denali-nand";
- denali->mtd.priv = &denali->nand;
+ mtd->name = "denali-nand";
+ mtd->priv = &denali->nand;
/* register the driver with the NAND core subsystem */
- denali->nand.read_buf = denali_read_buf;
- denali->nand.select_chip = denali_select_chip;
- denali->nand.cmdfunc = denali_cmdfunc;
- denali->nand.read_byte = denali_read_byte;
- denali->nand.waitfunc = denali_waitfunc;
+ nand->read_buf = denali_read_buf;
+ nand->select_chip = denali_select_chip;
+ nand->cmdfunc = denali_cmdfunc;
+ nand->read_byte = denali_read_byte;
+ nand->waitfunc = denali_waitfunc;
/*
* scan for NAND devices attached to the controller
@@ -1418,7 +1420,7 @@ int denali_init(struct denali_nand_info *denali)
/* allocate the right size buffer now */
kfree(denali->buf.buf);
- denali->buf.buf = kzalloc(denali->mtd.writesize + denali->mtd.oobsize,
+ denali->buf.buf = kzalloc(mtd->writesize + mtd->oobsize,
GFP_KERNEL);
if (!denali->buf.buf) {
ret = -ENOMEM;
@@ -1431,17 +1433,16 @@ int denali_init(struct denali_nand_info *denali)
* the real pagesize and anything necessery
*/
denali->devnum = ioread32(denali->flash_reg + DEVICES_CONNECTED);
- denali->nand.chipsize <<= (denali->devnum - 1);
- denali->nand.page_shift += (denali->devnum - 1);
- denali->nand.pagemask = (denali->nand.chipsize >>
- denali->nand.page_shift) - 1;
- denali->nand.bbt_erase_shift += (denali->devnum - 1);
- denali->nand.phys_erase_shift = denali->nand.bbt_erase_shift;
- denali->nand.chip_shift += (denali->devnum - 1);
- denali->mtd.writesize <<= (denali->devnum - 1);
- denali->mtd.oobsize <<= (denali->devnum - 1);
- denali->mtd.erasesize <<= (denali->devnum - 1);
- denali->mtd.size = denali->nand.numchips * denali->nand.chipsize;
+ nand->chipsize <<= (denali->devnum - 1);
+ nand->page_shift += (denali->devnum - 1);
+ nand->pagemask = (nand->chipsize >> nand->page_shift) - 1;
+ nand->bbt_erase_shift += (denali->devnum - 1);
+ nand->phys_erase_shift = nand->bbt_erase_shift;
+ nand->chip_shift += (denali->devnum - 1);
+ mtd->writesize <<= (denali->devnum - 1);
+ mtd->oobsize <<= (denali->devnum - 1);
+ mtd->erasesize <<= (denali->devnum - 1);
+ mtd->size = nand->numchips * nand->chipsize;
denali->bbtskipbytes *= denali->devnum;
/*
@@ -1453,19 +1454,19 @@ int denali_init(struct denali_nand_info *denali)
/* Bad block table description is set by nand framework,
see nand_bbt.c */
- denali->nand.bbt_options |= NAND_BBT_USE_FLASH;
- denali->nand.ecc.mode = NAND_ECC_HW_SYNDROME;
+ nand->bbt_options |= NAND_BBT_USE_FLASH;
+ nand->ecc.mode = NAND_ECC_HW_SYNDROME;
if (denali->have_hw_ecc_fixup) {
/* We have OOB support, so allow scan of BBT
and leave the OOB alone */
- denali->nand.bbt_options |= NAND_BBT_NO_OOB;
+ nand->bbt_options |= NAND_BBT_NO_OOB;
} else {
/* skip the scan for now until we have OOB read and write support */
- denali->nand.options |= NAND_SKIP_BBTSCAN;
+ nand->options |= NAND_SKIP_BBTSCAN;
}
/* no subpage writes on denali */
- denali->nand.options |= NAND_NO_SUBPAGE_WRITE;
+ nand->options |= NAND_NO_SUBPAGE_WRITE;
/*
* Denali Controller only support 15bit and 8bit ECC in MRST,
@@ -1473,34 +1474,34 @@ int denali_init(struct denali_nand_info *denali)
* SLC if possible.
* */
if (!nand_is_slc(&denali->nand) &&
- (denali->mtd.oobsize > (denali->bbtskipbytes +
- ECC_15BITS * (denali->mtd.writesize /
+ (mtd->oobsize > (denali->bbtskipbytes +
+ ECC_15BITS * (mtd->writesize /
ECC_SECTOR_SIZE)))) {
/* if MLC OOB size is large enough, use 15bit ECC*/
- denali->nand.ecc.strength = 15;
- denali->nand.ecc.layout = &nand_15bit_oob;
- denali->nand.ecc.bytes = ECC_15BITS;
+ nand->ecc.strength = 15;
+ nand->ecc.layout = &nand_15bit_oob;
+ nand->ecc.bytes = ECC_15BITS;
iowrite32(15, denali->flash_reg + ECC_CORRECTION);
- } else if (denali->mtd.oobsize < (denali->bbtskipbytes +
- ECC_8BITS * (denali->mtd.writesize /
+ } else if (mtd->oobsize < (denali->bbtskipbytes +
+ ECC_8BITS * (mtd->writesize /
ECC_SECTOR_SIZE))) {
pr_err("Your NAND chip OOB is not large enough to contain 8bit ECC correction codes");
goto failed_req_irq;
} else {
- denali->nand.ecc.strength = 8;
- denali->nand.ecc.layout = &nand_8bit_oob;
- denali->nand.ecc.bytes = ECC_8BITS;
+ nand->ecc.strength = 8;
+ nand->ecc.layout = &nand_8bit_oob;
+ nand->ecc.bytes = ECC_8BITS;
iowrite32(8, denali->flash_reg + ECC_CORRECTION);
}
- denali->nand.ecc.bytes *= denali->devnum;
- denali->nand.ecc.strength *= denali->devnum;
- denali->nand.ecc.layout->eccbytes *=
- denali->mtd.writesize / ECC_SECTOR_SIZE;
- denali->nand.ecc.layout->oobfree[0].offset =
- denali->bbtskipbytes + denali->nand.ecc.layout->eccbytes;
- denali->nand.ecc.layout->oobfree[0].length =
- denali->mtd.oobsize - denali->nand.ecc.layout->eccbytes -
+ nand->ecc.bytes *= denali->devnum;
+ nand->ecc.strength *= denali->devnum;
+ nand->ecc.layout->eccbytes *=
+ mtd->writesize / ECC_SECTOR_SIZE;
+ nand->ecc.layout->oobfree[0].offset =
+ denali->bbtskipbytes + nand->ecc.layout->eccbytes;
+ nand->ecc.layout->oobfree[0].length =
+ mtd->oobsize - nand->ecc.layout->eccbytes -
denali->bbtskipbytes;
/*
@@ -1508,17 +1509,17 @@ int denali_init(struct denali_nand_info *denali)
* contained by each nand chip. blksperchip will help driver to
* know how many blocks is taken by FW.
*/
- denali->totalblks = denali->mtd.size >> denali->nand.phys_erase_shift;
- denali->blksperchip = denali->totalblks / denali->nand.numchips;
+ denali->totalblks = mtd->size >> nand->phys_erase_shift;
+ denali->blksperchip = denali->totalblks / nand->numchips;
/* override the default read operations */
- denali->nand.ecc.size = ECC_SECTOR_SIZE * denali->devnum;
- denali->nand.ecc.read_page = denali_read_page;
- denali->nand.ecc.read_page_raw = denali_read_page_raw;
- denali->nand.ecc.write_page = denali_write_page;
- denali->nand.ecc.write_page_raw = denali_write_page_raw;
- denali->nand.ecc.read_oob = denali_read_oob;
- denali->nand.ecc.write_oob = denali_write_oob;
+ nand->ecc.size = ECC_SECTOR_SIZE * denali->devnum;
+ nand->ecc.read_page = denali_read_page;
+ nand->ecc.read_page_raw = denali_read_page_raw;
+ nand->ecc.write_page = denali_write_page;
+ nand->ecc.write_page_raw = denali_write_page_raw;
+ nand->ecc.read_oob = denali_read_oob;
+ nand->ecc.write_oob = denali_write_oob;
/* Occasionally the controller is in SPARE or MAIN+SPARE
mode upon startup, and we want it to be MAIN only */