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authorRoland Hieber <rhi@pengutronix.de>2023-03-20 12:41:23 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2023-03-21 09:13:35 +0100
commit6bd5212b3d431d4fdc2a0022a06c68939b145c52 (patch)
tree053188dc9077c25a494e129e162d73559ac03905
parent6de2256898e79c47cd1694cc5e6031e753ab1ea0 (diff)
downloadbarebox-6bd5212b3d431d4fdc2a0022a06c68939b145c52.tar.gz
barebox-6bd5212b3d431d4fdc2a0022a06c68939b145c52.tar.xz
Documentation: imx: improve reboot mode section
Signed-off-by: Roland Hieber <rhi@pengutronix.de> Link: https://lore.barebox.org/20230320114123.2202362-1-rhi@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r--Documentation/boards/imx.rst15
1 files changed, 11 insertions, 4 deletions
diff --git a/Documentation/boards/imx.rst b/Documentation/boards/imx.rst
index 6c16923340..6fbf1554d1 100644
--- a/Documentation/boards/imx.rst
+++ b/Documentation/boards/imx.rst
@@ -86,8 +86,8 @@ The images can also always be started as second stage on the target:
BootROM Reboot mode codes (bmode)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
-For select SoCs, barebox supports communicating an alternative boot medium
-that BootROM should select after a warm reset::
+For selected SoCs, barebox supports communicating an alternative boot medium
+that the BootROM should select after a warm reset::
barebox@FSL i.MX8MM EVK board:/ devinfo gpr.reboot_mode
Driver: syscon-reboot-mode
@@ -107,10 +107,17 @@ that BootROM should select after a warm reset::
barebox@FSL i.MX8MM EVK board:/ gpr.reboot_mode.next=serial reset -w
-This will cause barebox to fall into serial download mode on an i.MX8MM.
+The example above will cause barebox to jump back into serial download mode on
+an i.MX8MM by writing 0x10 into the *SRC_GPR9* register (offset 0x30390094) and
+0x40000000 into the *SRC_GPR10* register (offset 0x30390098), and then issuing a
+warm :ref:`reset <command_reset>`.
Different SoCs may have more possible reboot modes available.
-See the section on :ref:`Reboot modes<reboot_mode>` for more information.
+Look for documentation of the *SRC_SBMR* and *SRC_GPR* registers in the
+Reference Manual of your SoC; the values for the ``mode-*`` properties often
+correspond directly to the boot fusemap settings.
+
+See the section on :ref:`Reboot modes<reboot_mode>` for general information.
High Assurance Boot
^^^^^^^^^^^^^^^^^^^