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author | Ahmad Fatoum <a.fatoum@pengutronix.de> | 2022-10-17 09:07:01 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2022-10-27 11:13:29 +0200 |
commit | 6f216e784ae9fe87860b48dfc886ff9f07dd14ce (patch) | |
tree | 9bc3533877e936c328480dc86c380f0bdd701b05 | |
parent | 8130fc34366e123dbd459ed085fea280a575c0dc (diff) | |
download | barebox-6f216e784ae9fe87860b48dfc886ff9f07dd14ce.tar.gz barebox-6f216e784ae9fe87860b48dfc886ff9f07dd14ce.tar.xz |
ARM: i.MX7: replace hardcoded UART clocking defines
We currently have the clock defines for 1-3, but lack 4-6.
Add generic defines that can be used for all of 1-6 and
start using them in the header.
The old defines are not used outside the file, so drop them.
Out-of-tree users can just move the number into the parenthesis:
IMX7_CCM_CCGR_UART1 -> IMX7_CCM_CCGR_UART(1)
IMX7_UART1_CLK_ROOT -> IMX7_UART_CLK_ROOT(1)
Consulting the data sheet also showed that IMX7_UART_CLK_ROOT__OSC_24M
is the same value for all UARTs, so we omit the argument there.
No functional change.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20221017070702.1457936-1-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r-- | arch/arm/mach-imx/include/mach/imx7-ccm-regs.h | 25 |
1 files changed, 10 insertions, 15 deletions
diff --git a/arch/arm/mach-imx/include/mach/imx7-ccm-regs.h b/arch/arm/mach-imx/include/mach/imx7-ccm-regs.h index aecf9a26d0..89a41156cd 100644 --- a/arch/arm/mach-imx/include/mach/imx7-ccm-regs.h +++ b/arch/arm/mach-imx/include/mach/imx7-ccm-regs.h @@ -3,24 +3,17 @@ #ifndef __MACH_IMX7_CCM_REGS_H__ #define __MACH_IMX7_CCM_REGS_H__ -#define IMX7_CCM_CCGR_UART1 148 -#define IMX7_CCM_CCGR_UART2 149 -#define IMX7_CCM_CCGR_UART3 150 - #define IMX7_CLOCK_ROOT_INDEX(x) (((x) - 0x8000) / 128) /* * Taken from "Table 5-11. Clock Root Table" from i.MX7 Dual Processor * Reference Manual */ -#define IMX7_UART1_CLK_ROOT IMX7_CLOCK_ROOT_INDEX(0xaf80) -#define IMX7_UART1_CLK_ROOT__OSC_24M IMX7_CCM_TARGET_ROOTn_MUX(0b000) - -#define IMX7_UART2_CLK_ROOT IMX7_CLOCK_ROOT_INDEX(0xb000) -#define IMX7_UART2_CLK_ROOT__OSC_24M IMX7_CCM_TARGET_ROOTn_MUX(0b000) -#define IMX7_UART3_CLK_ROOT IMX7_CLOCK_ROOT_INDEX(0xb080) -#define IMX7_UART3_CLK_ROOT__OSC_24M IMX7_CCM_TARGET_ROOTn_MUX(0b000) +/* 1 <= n <= 6 */ +#define IMX7_CCM_CCGR_UART(n) (148 + (n) - 1) +#define IMX7_UART_CLK_ROOT(n) IMX7_CLOCK_ROOT_INDEX(0xaf80 + (n - 1) * 0x80) +#define IMX7_UART_CLK_ROOT__OSC_24M IMX7_CCM_TARGET_ROOTn_MUX(0b000) /* 0 <= n <= 190 */ #define IMX7_CCM_CCGRn_SET(n) (0x4004 + 16 * (n)) @@ -39,16 +32,18 @@ #define IMX7_CCM_CCGR_SETTINGn_NEEDED_RUN_WAIT(n) IMX7_CCM_CCGR_SETTINGn(n, 0b10) #define IMX7_CCM_CCGR_SETTINGn_NEEDED(n) IMX7_CCM_CCGR_SETTINGn(n, 0b11) +/* UART counting starts for 1, like in the datasheet/dt-bindings */ + static inline void imx7_early_setup_uart_clock(void) { void __iomem *ccm = IOMEM(MX7_CCM_BASE_ADDR); writel(IMX7_CCM_CCGR_SETTINGn_NEEDED(0), - ccm + IMX7_CCM_CCGRn_CLR(IMX7_CCM_CCGR_UART1)); - writel(IMX7_CCM_TARGET_ROOTn_ENABLE | IMX7_UART1_CLK_ROOT__OSC_24M, - ccm + IMX7_CCM_TARGET_ROOTn(IMX7_UART1_CLK_ROOT)); + ccm + IMX7_CCM_CCGRn_CLR(IMX7_CCM_CCGR_UART(1))); + writel(IMX7_CCM_TARGET_ROOTn_ENABLE | IMX7_UART_CLK_ROOT__OSC_24M, + ccm + IMX7_CCM_TARGET_ROOTn(IMX7_UART_CLK_ROOT(1))); writel(IMX7_CCM_CCGR_SETTINGn_NEEDED(0), - ccm + IMX7_CCM_CCGRn_SET(IMX7_CCM_CCGR_UART1)); + ccm + IMX7_CCM_CCGRn_SET(IMX7_CCM_CCGR_UART(1))); } #endif |