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authorGiorgio Dal Molin <giorgio.nicole@arcor.de>2020-04-07 17:32:17 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2020-04-14 12:06:03 +0200
commit754f35fd9df11ece4513be6d1a305fb2bf178f62 (patch)
tree2b6e667c52358549ba2ce19d80f355dad491f701
parentb1d30239ccde137bcd998437ef96d4af3a696415 (diff)
downloadbarebox-754f35fd9df11ece4513be6d1a305fb2bf178f62.tar.gz
ARM: sm.c: add the attribute 'volatile' to some asm() statements.
Prevent the compiler to eventually cache register values read/written to/from CP15. Signed-off-by: Giorgio Dal Molin <giorgio.nicole@arcor.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r--arch/arm/cpu/sm.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/cpu/sm.c b/arch/arm/cpu/sm.c
index cb33d96..f5a1edb 100644
--- a/arch/arm/cpu/sm.c
+++ b/arch/arm/cpu/sm.c
@@ -26,7 +26,7 @@ static unsigned int read_id_pfr1(void)
{
unsigned int reg;
- asm("mrc p15, 0, %0, c0, c1, 1\n" : "=r"(reg));
+ asm volatile ("mrc p15, 0, %0, c0, c1, 1\n" : "=r"(reg));
return reg;
}
@@ -34,18 +34,18 @@ static u32 read_nsacr(void)
{
unsigned int reg;
- asm("mrc p15, 0, %0, c1, c1, 2\n" : "=r"(reg));
+ asm volatile ("mrc p15, 0, %0, c1, c1, 2\n" : "=r"(reg));
return reg;
}
static void write_nsacr(u32 val)
{
- asm("mcr p15, 0, %0, c1, c1, 2" : : "r"(val));
+ asm volatile ("mcr p15, 0, %0, c1, c1, 2" : : "r"(val));
}
static void write_mvbar(u32 val)
{
- asm("mcr p15, 0, %0, c12, c0, 1" : : "r"(val));
+ asm volatile ("mcr p15, 0, %0, c12, c0, 1" : : "r"(val));
}
static int cpu_is_virt_capable(void)