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authorLucas Stach <dev@lynxeye.de>2019-12-18 23:43:49 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2019-12-20 16:10:51 +0100
commitb53e8d86c00eed24574ba57ff87f3af5ed7aa816 (patch)
tree6664ed5a3a8f8bd51bfef98dffe6255b3732f8c9
parent7423f1e0c0d7aaefa8808aebd3f3b1728045114b (diff)
downloadbarebox-b53e8d86c00eed24574ba57ff87f3af5ed7aa816.tar.gz
barebox-b53e8d86c00eed24574ba57ff87f3af5ed7aa816.tar.xz
ARM: zynq: zed: add QSPI flash support
Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r--arch/arm/boards/avnet-zedboard/lowlevel.c9
-rw-r--r--arch/arm/dts/zynq-zed.dts18
2 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm/boards/avnet-zedboard/lowlevel.c b/arch/arm/boards/avnet-zedboard/lowlevel.c
index 9b90ef112b..58f9e40d11 100644
--- a/arch/arm/boards/avnet-zedboard/lowlevel.c
+++ b/arch/arm/boards/avnet-zedboard/lowlevel.c
@@ -241,9 +241,18 @@ static void avnet_zedboard_ps7_init(void)
/* UART1 pinmux */
writel(0x000002E1, ZYNQ_MIO_BASE + 0xC8);
writel(0x000002E0, ZYNQ_MIO_BASE + 0xCC);
+ /* QSPI pinmux */
+ writel(0x00001602, ZYNQ_MIO_BASE + 0x04);
+ writel(0x00000702, ZYNQ_MIO_BASE + 0x08);
+ writel(0x00000702, ZYNQ_MIO_BASE + 0x0c);
+ writel(0x00000702, ZYNQ_MIO_BASE + 0x10);
+ writel(0x00000702, ZYNQ_MIO_BASE + 0x14);
+ writel(0x00000702, ZYNQ_MIO_BASE + 0x18);
+ writel(0x00000602, ZYNQ_MIO_BASE + 0x20);
/* poor mans clkctrl */
writel(0x00001403, ZYNQ_CLOCK_CTRL_BASE + ZYNQ_UART_CLK_CTRL);
+ writel(0x00000101, ZYNQ_CLOCK_CTRL_BASE + ZYNQ_LQSPI_CLK_CTRL);
/* GEM0 */
writel(0x00000001, 0xf8000138);
diff --git a/arch/arm/dts/zynq-zed.dts b/arch/arm/dts/zynq-zed.dts
index 52d6833249..a6b1da854b 100644
--- a/arch/arm/dts/zynq-zed.dts
+++ b/arch/arm/dts/zynq-zed.dts
@@ -1,7 +1,25 @@
#include <arm/zynq-zed.dts>
+#include "zynq-7000.dtsi"
/ {
chosen {
stdout-path = &uart1;
};
};
+
+&qspi {
+ status = "okay";
+ num-cs = <1>;
+
+ qspi_flash: flash@0 {
+ compatible = "spansion,s25fl256s1", "jedec,spi-nor";
+ reg = <0>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <4>;
+ spi-max-frequency = <50000000>;
+ m25p,fast-read;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ };
+};